JPH08340082A - Power semiconductor device - Google Patents

Abstract

PURPOSE: To evenly switch a main current path and a control current path by reducing the inductances of the current paths and, even when semiconductor chips are connected in parallel with each other, making the inductance of each current path nearly equal to each other. CONSTITUTION: In a semiconductor device for electric power, the first and second main current electrodes and control signal electrodes of one or more semiconductor chips are electrically connected to corresponding first, second, and third electrode pads. The first and third electrode pads 4 and 5 are fixed to a first electric insulating plate 1 at a distance to each other and a semiconductor element 7 is mounted on the first electrode pad 4 and the first main current electrode is connected to the element 7 and, at the same time, a second electric insulating plate 6 is fixed to the pad 4. In addition, the second electrode pad 9 is fixed to the second insulating plate 6. Conductive terminals are respectively extended from the first, second, and third electrode pads 4, 9, and 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power semiconductor device having one or more semiconductor elements mounted and connected to electrode pads fixed to an electric insulating plate such as a ceramic substrate.
In particular, the present invention relates to a power semiconductor device suitable for a high-speed switching semiconductor module such as a high power MOSFET.

[0002]

2. Description of the Related Art As a power semiconductor device in which a semiconductor element is brazed to an electrode pad made of a metal plate fixed on an electric insulating plate by various methods, there is disclosed in Japanese Patent Laid-Open No. 60-103649.
JP-A-61-140158, JP-A-62-140158
-209834, or Japanese Patent Laid-Open No. 4-287952
Some of them are disclosed in Japanese publications.

With respect to the structures disclosed in these documents, an example of a field effect transistor (hereinafter referred to as FET) will be described with reference to FIG. The drain electrode pad 4, the source electrode pad 9, and the gate electrode pad 5 are fixed to one main surface 1A of the electric insulating plate 1 fixed to a heat dissipation plate (not shown) made of a relatively thick metal plate. . The four FET chips arranged side by side, which are the semiconductor elements 7, are provided with a drain electrode (not shown) on the lower surface thereof and a plurality of small source electrodes and gate electrodes on the upper surface thereof. Soldered to the pad 4, the source small electrode and the gate electrode are connected to the source electrode pad 9 and the gate electrode pad 5 by bonding wires 11 and 12, respectively. A conductive terminal 4A extending outside from the drain electrode pad 4 and a conductive terminal 5A extending from the gate electrode pad 5 respectively extend from one end of the source electrode pad 9 to a conductive terminal 9A for source current, and the other. The conductive terminals 10A for source sensing extend from the ends.

[0004]

However, the present invention is not limited to the power semiconductor device having this structure, but in the conventional one, the drain electrode pad 4, the source electrode pad 9, and the gate are formed on one main surface 1A of the electric insulating plate 1. Since all the electrode pads 5 are fixed in a plane, the source electrodes of a plurality of semiconductor elements,
The length of the bonding wire that connects the gate electrode to each electrode pad is different, and mainly because of this, there is a difference in the magnitude of the inductance of the main current path and signal path of each semiconductor element. The switching time of each semiconductor element slightly differs, which has been a major obstacle to high frequency operation.

Since the source electrode pad 9 also serves as the source / sense electrode pad, the drain current, which is the main current, naturally flows through a part of the signal loop from the gate electrode to the source / sense electrode. The existing inductance will feed back the drain current, which is adversely affected. Furthermore, since all electrode pads etc. are planarly fixed to the electrically insulating substrate, the bonding wires must cross or become long when incorporating multiple semiconductor elements and other electronic component elements. Had the drawback of being complicated.

The present invention solves the above-mentioned conventional problems, has a small inductance, is easy to manufacture with a relatively simple wiring structure, and has a structure in which a plurality of semiconductor elements are connected in parallel is applied to all semiconductor elements. It is an object of the present invention to provide a power semiconductor device in which the inductances of related main current paths can be made substantially the same.

[0007]

In order to solve the above problems, in the invention of claim 1, the first main current electrode, the second main current electrode, and the control signal electrode of one or more semiconductor elements are provided. In a power semiconductor device electrically connected to the corresponding first, second, and third electrode pads, the first electrode pad and the third electrode pad are separated from each other. The semiconductor element is mounted on the first electrode pad, the first main current electrode is connected to the first electrode pad, and the second electrical insulation plate is fixed to the first electrode pad;
Further, the second electrode pad is fixed to the second electric insulating plate, and conductive terminals extend from the first, second, and third electrode pads, respectively. Provide a device.

In order to solve the above-mentioned problems, in the invention of claim 2, a third electric insulating plate is fixed on the third electrode pad, and a fourth electric insulating plate is fixed on the third electric insulating plate. 2. The power semiconductor device according to claim 1, wherein the electrode pad is connected to the second main current electrode of the semiconductor element.

In order to solve the above-mentioned problem, in the invention of claim 3, the first main current electrode, the second main current electrode, and the control signal electrode of one or more semiconductor elements respectively correspond to the first main current electrode. , A power semiconductor device electrically connected to the second, fourth, and third electrode pads, wherein the first electrode pad and the fourth electrode pad are separated from each other by the first electrical insulation. A second electric insulating plate fixed to a plate, the semiconductor element is mounted on the first electrode pad to connect the first main current electrode, and a second electric insulating plate is fixed to the second electric insulating plate. The second electrode pad is fixed to the
Further, a third electric insulating plate is fixed to the fourth electrode pad, the third electrode pad is fixed to the third electric insulating plate, and the first, second, third, and Provided is a power semiconductor device in which conductive terminals extend from the fourth electrode pads.

In order to solve the above-mentioned problems, in the invention of claim 4, in a power semiconductor device in which a plurality of pairs of single or parallel-connected semiconductor elements are connected in series, one semiconductor element is The first main current electrode is mounted on the first electrode pad fixed to the first electric insulating plate, and the first main current electrode is connected to the first electric current plate, and the control signal electrode is separated from the first electrode pad. The second main current electrode is connected to a third electrode pad fixed to the insulating plate, and the second main current electrode is connected to a common electrode pad fixed to the second electric insulating plate fixed on the first electrode pad; Further, the other semiconductor element is mounted on the common electrode pad and the first main current electrode thereof is connected, and the second main current electrode thereof is the fourth electric insulating plate fixed on the common electrode pad. Contact another second electrode pad that is fixed to Is, in the control signal electrodes to provide a power semiconductor device, characterized in that it is connected to another third electrode pad fixed to the first electric insulating plate.

In order to solve the above-mentioned problem, in the invention of claim 5, a third electric insulating plate is fixed on the third electrode pad and the other third electrode pad, and the third electric insulating plate is fixed.
The fourth electrode pad and another fourth electrode pad fixed to the electrical insulating plate of the second semiconductor element of the pair of semiconductor elements.
The power semiconductor device according to claim 3, wherein the power semiconductor device is connected to the main current electrode.

In order to solve the above problems, in the invention of claim 6, one of the semiconductor elements is a power semiconductor device in which a plurality of pairs of single or parallel-connected semiconductor elements are connected in series. Is mounted on a first electrode pad fixedly attached to a first electrical insulating plate and connected to the first main current electrode, and the second main current electrode is separated from the first electrode pad and It is connected to a fourth electrode pad fixed to the first electric insulating plate and is connected to a common electrode pad fixed to the second electric insulating plate fixed to the first electrode pad, The control signal electrode is the fourth
Connected to a third electrode pad fixed on a third electric insulating plate fixed on the electrode pad of the first electrode pad, and the other semiconductor element is mounted on the common electrode pad, and the first semiconductor element is mounted on the common electrode pad.
Main current electrode is connected to the second main current electrode, the second main current electrode is connected to another second electrode pad fixed to the fourth electric insulating plate fixed to the common electrode pad, and One of the control signal electrodes is connected to another fourth electrode pad fixed to the one electric insulating plate, and its control signal electrode is fixed to the third electric insulating plate fixed to the other fourth electrode pad. Provided is a power semiconductor device, which is connected to a third electrode pad.

In order to solve the above-mentioned problem, in the invention of claim 7, the capacitance between the first electrode pad and the second electrode pad is set to the third electrode pad and the fourth electrode pad. A power semiconductor device according to any one of claims 1 to 6, wherein the power semiconductor device is larger than a capacitance between the power semiconductor devices.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a MOSFET as a power semiconductor device according to the present invention will be described below with reference to the drawings. First, one embodiment of the present invention will be described with reference to FIG. 1. The first electrical insulating plate 1 is a heat-dissipating member made of a copper plate or the like having good thermal conductivity through a metal layer 2 whose back surface is metallized by a usual method. It consists of something like a ceramic substrate fixed to the plate 3.
On the pre-metallized surface of the first electrically insulating plate 1, a drain electrode pad 4 which is a first electrode pad and a gate electrode pad 5 which is a third electrode pad are made of a thin copper plate or the like.
However, they are fixed by facing each other with a small and constant gap. From the drain electrode pad 4 and the gate electrode pad 5, conductive terminals 4A and 5A formed at the same time as the drain electrode pad 4 and the gate electrode pad 5 respectively extend in a metal plate punching process, and the conductive terminals 4A and 5A are respectively drained. Tapered portions 4a and 5a extending from the electrode pad 4 and the gate electrode pad 5 are provided.

Next, a second electric insulating plate 6 made of a ceramic material or the like is fixed to the drain electrode pad 4, which is the first electrode pad, on the side close to the conductive terminal 4A. The second electric insulating plate 6 is also like a ceramic substrate whose front and back surfaces are metallized in advance, and is fixed with a brazing material as described above. The second electric insulating plate 6 is smaller than the first electric insulating plate 1, so that a plurality of MOSFET chips 7 can be mounted on the drain electrode pad 4 and in a portion close to the gate electrode pad 5, as described later. A portion of the drain electrode pad 4 near the gate electrode pad 5 is exposed.

Drain electrodes (not shown) of the four MOSFET chips 7 which are semiconductor elements are soldered to the exposed surface of the drain electrode pad 4 so that they are aligned at substantially constant intervals.

A third electric insulating plate 8 similar to the second electric insulating plate 6 is fixed to the gate electrode pad 5 which is the third electrode pad, on the side close to the conductive terminal 5A. Therefore,
The surface area of the gate electrode pad 5 on the side close to the drain electrode pad 4 is exposed for wire bonding as described later. The third electric insulating plate 8 may be integrated with the second electric insulating plate 6, but in this case, each MO
At least a window for mounting the SFET chip 7 and a window for bonding, which will be described later, are required.

A source electrode pad 9, which is a second electrode pad, is fixed to the second electric insulating plate 6. Similar to the drain electrode pad 4 and the gate electrode pad 5, a conductive terminal 9A formed simultaneously with the source electrode pad 9 extends from the source electrode pad 9 in the metal plate punching step. The conductive terminal 9A includes a tapered tapered portion 9a extending from the source electrode pad 9. Where the second
The source electrode pad 9 which is the electrode pad of the above is overlapped with the drain electrode pad 4 which is the first electrode pad with the second electric insulating plate 6 interposed therebetween, and the inductance due to these electrode pads is reduced.

A source / sense electrode pad 10, which is a fourth electrode pad, is fixed to the third electric insulating plate 8 made of a ceramic material such as aluminum nitride. From the source / sense electrode pad 10, similar to the above-mentioned three types of electrode pads, the conductive terminals 10 formed simultaneously with the source / sense electrode pad 10 in the punching step of the metal plate.
A is extended. The conductive terminal 10A has a tapered taper portion 10a extending from the source / sense electrode pad 10.
Is provided. The source / sense electrode pad 10, which is the fourth electrode pad, overlaps with the gate electrode pad 5, which is the third electrode pad, with the third electric insulating plate 8 sandwiched therebetween, and serves to reduce the inductance due to these electrode pads. There is.

Next, the source electrode (not shown) of each MOSFET chip 7 is bonded to the source electrode pad 9 and the source / sense electrode pad 10 by the usual method by the bonding wire 11. Further, the gate electrode (not shown) is formed by the bonding wire 12.
The gate electrode pad 5 is bonded by a usual method. At this time, in order to reduce the inductance, the bonding wires 11 and 12 are designed to be as short as possible so that the bonding wires 11 and 12 can be connected to each electrode pad at a substantially shortest distance.
After that, the semiconductor element 5 is subjected to usual insulation treatment and further resin-molded, and if necessary, each conductive terminal 4A, 9
A, 5A, and 10A are bent substantially at right angles from the respective electrode pads to the tapered portion, or at appropriate portions of the tapered portion.

In this embodiment, even if there are a plurality of semiconductor elements, the terminal structure is provided with a tapered portion in which each conductive terminal is tapered from the corresponding electrode pad. Since the current paths have substantially the same length and their inductances have substantially the same magnitude, it goes without saying that a plurality of MOSFETs can be turned on and off uniformly, and in the drawing, the left side of the semiconductor element 7 is shown. Drain electrode pad 4 and conductive terminal 4A,
The source electrode pad 9 and its conductive terminal 9A, and the gate electrode pad 5 and its conductive terminal 5A on the right side of the semiconductor element 7,
Since the source / sense electrode pad 10 and its conductive terminal 10A are provided and completely separated, the signal current flowing between the gate electrode pad 5 and its conductive terminal 5A and between the source / sense electrode pad 10 and its conductive terminal 10A. Are only gate signals provided by a gate signal source (not shown). Therefore, since no drain current flows, the drain current is fed back even if there is some inductance in the signal path between the gate electrode pad 5 and its conductive terminal 5A and between the source / sense electrode pad 10 and its conductive terminal 10A. Therefore, even better high-frequency operation can be performed.

Next, another embodiment will be described with reference to FIG. The same symbols as those shown in FIG. 1 indicate corresponding members. In this embodiment, the conductive terminals 4A, 5A, 9A and 10 are provided in the structure as described in FIG.
The structure of A is changed. In this terminal structure, the left and right tapered portions 4a of the conductive terminals 4A and 9A have different lengths, and the left and right tapered portions 4a of the conductive terminals 4A and 9A have opposite lengths. The main current paths from to the conductive terminal 9A through the drain-source of each semiconductor element 7 have substantially the same length.
Further, the signal current paths from the conductive terminal 5A through the gate-source sense of each semiconductor element 7 to the conductive terminal 10A have substantially the same length, and therefore, the respective inductances of these current paths are substantially the same. There is no difference in the switching of the semiconductor element 7 due to the difference in the inductance of the current path. Also in this embodiment, since the drain current does not flow even in a small part of the gate-source / sense current path, there is no influence of the drain current due to the extremely small inductance of the gate-source / sense current path, and therefore, its power consumption is reduced. There is no loss and its effect on switching.

Next, another embodiment will be described with reference to FIG. The same symbols as those shown in FIG. 1 indicate corresponding members. In this embodiment, the first semiconductor device S1 and the second semiconductor device S2 as described in FIG. 1 are used.
2 shows a semiconductor device having a half-bridge structure in which and are connected in series. Reference numeral 9'denotes a common electrode pad of the first semiconductor device S1 and the second semiconductor device S2, which serves as the source electrode pad of the first semiconductor device S1 as described with reference to FIG. Semiconductor device S
2 also serves as a drain electrode pad.

The second semiconductor device S2 is formed on the common electrode pad 9'extending to the second semiconductor device S2 side.
Are mounted side by side, and each drain electrode (not shown) is soldered. Further, another third electric insulating plate 13 is fixed on the common electrode pad 9 ', and the source electrode pad 14 of the second semiconductor device S2 is fixed on it. The source electrode (not shown) of the second semiconductor device S2 is the bonding wire 1
1 ′ connects to the source electrode pad 14 and the source / sense electrode pad 10 ′. The gate electrode (not shown) of the second semiconductor device S2 is connected to the gate electrode pad 5'by a bonding wire 12 '.

In order to make the level of the common electrode pad 9'in the first semiconductor device S1 and the second semiconductor device S2 the same, the drain electrode pad 4 of the first semiconductor device S1 and the second electrode thereabove. Electrical insulation board 6
Extends to the surface area of the first electrically insulating substrate 1 on which the second semiconductor device S2 is mounted. However, the drain electrode pads 4 of the first semiconductor device S1 and the second electric insulating plate 6 thereon do not necessarily extend to the second semiconductor device S2 side, and the common electrode pad 9 ′ is not necessary.
The first semiconductor device S1 and the second semiconductor device S
Bending downward at the boundary with the second semiconductor device S
In the area of 2, the electrode pads 5 and 5 ′ can also be fixed on the first electrically insulating plate 1. This structure is at least advantageous in terms of heat dissipation.

Next, another embodiment which is a modification of FIG. 3 will be described with reference to FIG. The same symbols as those shown in FIG. 3 indicate corresponding members. In this embodiment, the conductive terminals 9'A extending from the common electrode pad 9'are unified to form the conductive terminal 4A for the source of the first semiconductor device S1 and the conductive terminal 14A for the source of the second semiconductor device S2. It is located in the middle of. In addition, the conductive terminal 4
A and the left and right tapered portions 4a and 14a of the conductive terminal 14A are made different in inclination, and the inclination of the tapered portion on the conductive terminal 9'A side is made gentle, so that the conductive terminals 4A and 9'A
And the distance between the conductive terminals 9'A and 14A,
Further, the lengths of the drain-source current paths of the respective semiconductor elements are made substantially equal.

When such a power MOSFET is used as a switching semiconductor element of a switching power supply device, a capacitor having an appropriate capacitance is often connected between the drain and the source for resonance, while a high frequency operation is required. Due to the relationship, there is a demand to minimize the capacitance on the signal side. Therefore, in the embodiments described above, when the materials of the electrical insulating plate between the drain electrode pad and the source electrode pad and the electrical insulating plate between the signal electrode electrode pad and the source / sense electrode pad are the same, If it is desired to increase the thickness of both sides and to make the thicknesses of both electrical insulation plates approximately equal, use an aluminum nitride plate as the electrical insulation plate between the drain electrode pad and the source electrode pad, and use the As the material, a polyimide resin plate having a lower dielectric constant and higher heat resistance than an aluminum nitride plate may be used.

Further, in the case where the drain-source capacitance is made as large as possible under the limited conditions, particularly in the embodiment shown in FIGS. 3 and 4, the source electrode pad 14 and the second electrode of the second semiconductor device S2 are formed. It is preferable that the electric insulating plate 13 therebelow be extended to the common electrode pad 9 ′ on the first semiconductor device S1 side and have a size substantially the same as that of the common electrode pad 9 ′. Further, in order to increase the capacitance, the distance between the drain electrode pad 4 and the common electrode pad 9 ′ of the first semiconductor device S1 and the distance between the common electrode pad 9 ′ and the source electrode pad 14 of the second semiconductor device S2 are narrowed. The more it does, the smaller the inductance is.

Further, in each of the above embodiments, the third electrode pads 5 and 5'which are gate electrode pads are fixed to the first electric insulating plate 1, but the fourth electrode which is a source / sense electrode pad. The electrode pads 10 and 10 'are connected to the first electrical insulating plate 1
The upper part is fixed, and the third electric insulating plate 8 is fixed on the upper part,
Even if the third electrode pads 5 and 5'are fixedly attached thereto, the same effect as in the above-described embodiment can be obtained.

Further, since each conductive terminal extending from each electrode pad has a portion in parallel with a small distance, a capacitor such as a leadless ceramic capacitor is directly soldered between the portions. Alternatively, a leadless diode opposite to the main current path can be directly soldered, and a capacitor and a diode can be arranged between the main current terminals of the semiconductor element with a small inductance.

Although the MOSFET has been described as the semiconductor element in the above embodiments, it is applied to a power semiconductor device having a relatively high frequency response such as an electrostatic induction type semiconductor device and an IGBT (insulated gate type bipolar transistor). Also has the same effect as described above. In addition, other semiconductor elements, resistance elements, or the like can be easily incorporated as needed, and the number of semiconductor elements may be one or arbitrary. The tapered portion of the conductive terminal is not always necessary, and is not particularly necessary for a single semiconductor element or a semiconductor element having a small number of parallel elements.

[0032]

As described above, according to the present invention, since the inductance of the main current path and the control current path can be reduced, it is possible to provide a power semiconductor device having a good high frequency response. Even with the parallel-connected configuration, the inductances of the main current path and the control current path associated with all semiconductor elements can be made to have substantially the same size, so that the switching timing can be made the same and many practical effects are obtained.

In addition, a semiconductor device having a complicated circuit structure can be relatively easily configured with a small amount of wiring, and at the same time, the capacitance between the drain electrode pad and the source electrode pad can be easily controlled as needed. Since this semiconductor device can be used as a capacitor for resonance when it is used in a power supply circuit, and the capacitance between the signal electrode pad and the source / sense electrode pad can be reduced, it is a power semiconductor suitable for high frequency operation. A device can be provided.

[Brief description of drawings]

FIG. 1 is a diagram for explaining an embodiment of the present invention.

FIG. 2 is a diagram for explaining another embodiment of the present invention.

FIG. 3 is a diagram for explaining another embodiment of the present invention.

FIG. 4 is a diagram for explaining another embodiment of the present invention.

FIG. 5 is a diagram for explaining an example of a conventional power semiconductor device.

[Explanation of symbols]

1 ... 1st electric insulation board 2 ... metal layer 3 ... heat sink 4 ... 1st electrode pad (drain electrode pad) 4A ... conductive terminal 5 ... -Third electrode pad (gate electrode pad) 5A ... Conductive terminal 6 ...- Second electrical insulating plate 7 ...- Semiconductor element 8 ... Third electrical insulating plate 9 ...・ Second electrode pad (source electrode pad) 9A ... Conductive terminal 9 '... Common electrode pad 9'A ... Conductive terminal 10 ... Fourth electrode pad (source / sense electrode pad) 10A ... Conductive terminals 11 and 12 ... Bonding wires 12 ... Diode chip 13 ... Fourth electrical insulating plate 14 ... Other second electrode pads (source electrode pads) S1, S2 ..First and second semiconductor elements

Claims (7)

[Claims] 1. A first main current electrode, a second main current electrode, and a control signal electrode of one or more semiconductor devices are electrically connected to corresponding first, second, and third electrode pads, respectively. In the power semiconductor device, the first electrode pad and the third electrode pad are separated from each other and fixed to a first electrical insulating plate, and the semiconductor element is mounted on the first electrode pad. Is connected to the first main current electrode and a second electric insulating plate is fixed, and the second electrode pad is fixed to the second electric insulating plate. 2. A power semiconductor device, wherein conductive terminals extend from the second and third electrode pads, respectively. 2. A third electric insulating plate is fixed to the third electrode pad, and a fourth electrode pad fixed to the third electric insulating plate is used as a second main current electrode of the semiconductor element. The power semiconductor device according to claim 1, wherein the power semiconductor device is connected. 3. A first main current electrode, a second main current electrode, and a control signal electrode of one or more semiconductor elements are electrically connected to corresponding first, second, fourth, and third electrode pads, respectively. A power semiconductor device connected to the first electrode pad and the fourth electrode pad, which are separated from each other and fixed to a first electrical insulating plate, A semiconductor element is mounted, the first main current electrode is connected and a second electric insulating plate is fixed, and the second electrode pad is fixed to the second electric insulating plate,
Further, a third electric insulating plate is fixed to the fourth electrode pad, the third electrode pad is fixed to the third electric insulating plate, and the first, second, third, and A power semiconductor device, wherein conductive terminals extend from the fourth electrode pads, respectively. 4. A power semiconductor device in which a single or a plurality of pairs of semiconductor elements connected in parallel are connected in series, wherein one semiconductor element is a first electrode pad fixed to a first electrical insulating plate. Mounted to the first main current electrode, the control signal electrode thereof is separated from the first electrode pad and connected to a third electrode pad fixed to the first electric insulating plate, The second main current electrode is connected to the common electrode pad fixed to the second electric insulating plate fixed to the first electrode pad, and the other semiconductor element is mounted on the common electrode pad. The first main current electrode is connected to the second main current electrode, and the second main current electrode is attached to a second electric insulating plate fixed to the common electrode pad.
Is connected to the electrode pad of the first control signal electrode.
The semiconductor device for electric power, which is connected to another third electrode pad fixed to the electric insulating plate. 5. The third electrode pad and the other third electrode pad.
A third electric insulating plate is fixed on the electrode pad of the third electric insulating plate, and the fourth electrode pad and another fourth electric pad fixed to the third electric insulating plate.
4. The power semiconductor device according to claim 3, wherein the electrode pad is connected to the second main current electrode of each of the pair of semiconductor elements. 6. A power semiconductor device in which a single or a plurality of pairs of semiconductor elements connected in parallel are connected in series, wherein one of the semiconductor elements is a first electrode fixed to a first electrical insulating plate. A fourth electrode pad mounted on the pad and connected to the first main current electrode, the second main current electrode being separated from the first electrode pad and fixed to the first electrical insulating plate. Connected to a common electrode pad fixed to a second electric insulating plate fixed to the first electrode pad, the control signal electrode of which is connected to the fourth electric insulating plate.
Connected to a third electrode pad fixed on a third electric insulating plate fixed on the electrode pad of the first electrode pad, and the other semiconductor element is mounted on the common electrode pad, and the first semiconductor element is mounted on the common electrode pad.
Main current electrode is connected to the second main current electrode, the second main current electrode is connected to another second electrode pad fixed to the fourth electric insulating plate fixed to the common electrode pad, and One of the control signal electrodes is connected to another fourth electrode pad fixed to the one electric insulating plate, and its control signal electrode is fixed to the third electric insulating plate fixed to the other fourth electrode pad. A power semiconductor device connected to a third electrode pad. 7. The capacitance between the first electrode pad and the second electrode pad is larger than the capacitance between the third electrode pad and the fourth electrode pad. The power semiconductor device according to claim 6.