JPH08335929A - Spread spectrum communication equipment - Google Patents

Abstract

PURPOSE: To provide a spread spectrum communication equipment in which transmission speed is made variable by changing multiplex number with a simple configuration. CONSTITUTION: A spread code channel exclusive for synchronization is prepared and a synchronization circuit conducting code phase synchronization and clock synchronization in common for all channels is provided to the spread code channel only to realize the miniaturization of a high speed synchronization circuit thereby eliminating the need providing a synchronization circuit to each of other data channels. Furthermore, a carrier is recovered by applying inverse spread processing to the signal of the synchronization exclusive channel, a reception signal is converted directly into a base band signal by using the recovered carrier, the base band signal is subjected to correlation demodulation by digital signal processing so as to easily detect a multiplex number and the demodulation section can take a circuit configuration suitable for LSI processing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a direct spread spectrum spread spectrum communication device, and more particularly to a variable transmission speed communication device in a code division multiple communication system for multiplexing and transmitting a plurality of spread code channels.

[0002]

2. Description of the Related Art Conventionally, in a spread spectrum communication system using a direct spread system, a transmitting side uses a spread code sequence such as a pseudo noise code (PN code) from a baseband signal of a digital signal to be normally transmitted. , It produces a baseband signal with a much wider bandwidth than the original data. In addition, PSK (Phase Shift Keying), F
Modulates SK (frequency shift keying), and RF
Converts to (radio frequency) signal and transmits.

On the receiving side, the same spreading code as that on the transmitting side is used to perform despreading for correlating with the received signal, thereby converting the received signal into a narrow band signal having a bandwidth corresponding to the original data. Then, normal data demodulation is performed to reproduce the original data.

As described above, in the spread spectrum communication system, the transmission bandwidth is extremely wider than the information bandwidth, and therefore, under the condition that the transmission bandwidth is constant, the transmission rate is much lower than that of the ordinary narrow band modulation system. It will not be possible.

In order to solve this problem, there is a method called code division multiplexing. In this method, a high-speed information signal is converted into low-speed parallel data, spread-modulated by different spreading code sequences, added, and then converted into an RF signal for transmission, thereby lowering the spreading factor of spread-modulation. It realizes high-speed data transmission under the condition that the transmission bandwidth is constant.

FIG. 3 is a block diagram showing the structure of a transmitter of this system.

In the figure, the input data is converted into n parallel data by the serial-parallel converter 301. Each converted data has n multiplier groups 302-1 to 302
At -n, the n different spreading code outputs of the spreading code generator 303 are multiplied and converted into an n-channel wideband spreading signal.

Next, the outputs of the respective multipliers are added by the adder 304 and output to the high frequency stage 305. The added baseband wideband spread signal is converted by the high frequency stage 305 into a transmission frequency signal having an appropriate center S frequency,
It is transmitted from the transmitting antenna 306.

FIG. 4 is a block diagram showing the structure of the receiver.

In the figure, a signal received by an antenna 401 is appropriately filtered and amplified by a high frequency signal processing section 402 and converted into an intermediate frequency signal. This intermediate frequency signal is distributed to the channels corresponding to each of the n spreading codes connected in parallel.

In each channel, the input signal is the correlator group 4
In 03-1 to 0-n, correlation detection is performed with the output of the spreading code generator group 404-1 to 40-n corresponding to the channel, and despreading is performed. Then, the despread signal is synchronized for each channel in the synchronization circuit groups 405-1 to 40n so that the code phases and clocks of the spread code generators coincide with each other. The despread signal is demodulated by demodulator groups 406-1 to 40-n to reproduce the data. Subsequently, the reproduction data is converted into serial data by the parallel-serial converter 407, and the original information is reproduced.

[0012]

However, in the above conventional example, since the carrier wave is not reproduced at the time of inputting the correlator, the correlator of each demodulation channel must operate in the intermediate frequency stage. However, there is a drawback that the circuit scale becomes very large as the number of code division multiplexing increases.

Further, in order to change the transmission rate by changing the number of multiplexing in such a configuration, it is necessary to detect the number of multiplexing at the receiving side, and the circuit for detecting the number of multiplexing for this purpose is also in the intermediate frequency stage. Since it has to operate, there is a problem that the circuit scale becomes larger.

It is an object of the present invention to provide a spread spectrum communication device capable of changing the transmission rate by changing the number of multiplexed signals with a simple structure.

[0015]

SUMMARY OF THE INVENTION According to the present invention, serial-parallel conversion means for converting an input serial data string into a parallel data string having a variable number of symbols (1 to n symbols), and a serial-parallel converter according to input transmission rate data. Number of parallel symbols of the serial-parallel conversion means m
In parallel within the range of 1≤m≤n, a modulation means for modulating each of a maximum of n data spreading code sequences having the same cycle and having the same code phase, and an input transmission rate. Selecting means for selecting a data spreading code sequence modulated with m effective data from the n outputs of the modulating means in accordance with the data; and adding means for adding the m outputs of the selecting means. A spread spectrum transmission device having a transmission means for converting the output of the adding means into a predetermined transmission frequency band signal and controlling the gain according to the transmission rate data to send out to the transmission path, and a signal from the transmission path. Receiving means for receiving, correlating means for performing a correlation operation between the output of the receiving means and the n spreading code sequences for data, and demodulating means for demodulating n-symbol data from the correlation value output by the correlating means. , The demodulation Parallel-serial conversion means for converting a parallel data string of 1 to n symbols, which is the output of each stage, into an output data string, and the number of channels whose absolute value of the correlation value is equal to or more than a predetermined value or less than a predetermined value is detected and multiplexed A multiplexing number detecting means for detecting the number m of digitization; and a parallel number controlling means for controlling the parallel / serial converting means to select an effective m symbol in the output of the demodulating means from the multiplexing number and perform parallel / serial conversion. And a spread spectrum receiver having the above.

[0016]

With the above construction, the present invention makes it possible to easily detect the number of multiplexed signals, which contributes greatly to the miniaturization of the circuit.

[0017]

1 is a block diagram showing the structure of a transmitter in a first embodiment of the present invention, and FIG. 2 is a block diagram showing the structure of a receiver in this first embodiment.

In FIG. 1, a serial-parallel converter 101 converts serially input data into n pieces of parallel data, and a parallel number control circuit 102 performs code division multiplexing from the input transmission rate data. The number m is calculated and the output of the serial-parallel converter 101 is set to m symbols.

The multiplier groups 103-1 to 103-n multiply each parallelized data by n spread codes output from the spread code generator, and the spread code generator 104 includes:
It generates n different spreading codes and a spreading code dedicated to synchronization.

The switch group 105 includes multipliers 103-2 to 103-2.
Only the set output of the n-1 output groups of n is selected and output, and the selection signal generation circuit 106 uses the number of codes corresponding to the code division multiplex number from the input transmission rate data. The switch group 105 so as to select a channel
Is to control.

The adder 107 adds the synchronization-only spreading code output from the spreading code generator 103, the output of the multiplier group 103-1 and 0 to n-1 outputs of the switch group 105, The high frequency stage 108 converts the output of the adder 104 into a transmission frequency signal. The gain control circuit 109 controls the transmission output of the high frequency stage 108 according to the number of multiplexed signals, and the transmission antenna 110 outputs the signal from the high frequency stage 108 to the transmission path.

Further, in FIG. 2, the receiving antenna 201
Is for receiving a signal from a transmission line, and the high frequency signal processing section 202 is for appropriately filtering and amplifying the output from the receiving antenna 201 and converting it into a predetermined frequency band signal.

The synchronizing circuit 203 captures and maintains the synchronization with the spread code and the clock on the transmitting side, and the spreading code generator 204 receives the code synchronizing signal and the clock signal input from the synchronizing circuit 203 on the transmitting side. The same n + 1 spreading codes as those of the above spreading code group are generated.

The carrier reproducing circuit 205 reproduces a carrier signal from the carrier reproducing spread code output from the spread code generator 204 and the output of the high frequency signal processing section 202. The base band demodulation circuit 206 reproduces the carrier. The output of the circuit 205, the output of the high-frequency signal processing unit 202, and the output of the spreading code generator 204 are used to perform demodulation in the baseband using n spreading codes.

The multiplex number detection circuit 207 detects the number of code channels transmitted from the correlation value group of the baseband demodulation circuit 206, and the parallel number control circuit 208 is
From the output of the multiplex number detection circuit 207, the parallel number of parallel-serial conversion is controlled and the transmission rate data is output. The parallel-serial converter 209 is the output of the baseband demodulation circuit 206 according to the output of the parallel number control circuit 208.
˜n parallel demodulated data is converted into parallel serial data.

In the above configuration, on the transmitting side, the input transmission rate data is first input to the parallel number control circuit 102, and the number of parallel output symbols of the serial-parallel converter 101 is determined. The data to be transmitted subsequently is serial-parallel converter 101.
Is converted into m pieces of parallel data equal to the parallel number.

On the other hand, the spreading code generator 104 has the same n + 1 code periods but different spreading codes PN0 to P0.
Nn is generated. Of these, PN0 is dedicated to synchronization and carrier reproduction, and is directly input to the adder 107 without being modulated by the parallel data. The remaining n spread codes are modulated by n parallel data in the multiplier groups 103-1 to 10n. Only m of the n modulated data are required data, and are selected via the switch group 105 by the selection signal output from the selection signal generation circuit 106 controlled by the transmission rate data. The selected m signals are subsequently input to the adder 107.

The adder 107 linearly adds the input m + 1 signals and outputs the added baseband signal to the high frequency stage 108. This baseband signal is subsequently converted into a high frequency signal having an appropriate center frequency in the high frequency stage 108 and transmitted from the transmitting antenna 110.

At this time, in order to keep the total average output of the transmission signal constant regardless of the number of multiplexed signals, the output per channel must be variable. Therefore, in order to make the output per channel a gain according to the number of multiplexes, it is necessary to provide the gain control circuit 109 for controlling the transmission output per channel so that the total transmission output becomes constant from the transmission rate data.

On the receiving side, the signal received by the receiving antenna 201 is appropriately filtered and amplified by the high frequency signal processing section 202, and is output as it is as a transmission frequency band signal or converted into an appropriate intermediate frequency band signal. It

This signal is input to the synchronizing circuit 203,
The synchronization circuit 203 establishes spread code synchronization and clock synchronization with the transmission signal, and outputs the code synchronization signal and clock signal to the spread code generator 204. As the structure of this synchronizing circuit, for example, a circuit using a surface acoustic wave (SAW) matched filter as shown in FIG. 7 is used.

In FIG. 7, the received intermediate frequency band signal is
It is input to the SAW matched filter 701. The SAW matched filter 701 has an integration area length corresponding to one cycle of the spreading code, and integrates the product of the received signal and a preset tap coefficient, that is, the synchronization-dedicated code sequence, over one cycle of the spreading code. A voltage signal having an envelope proportional to (correlation integral value) and having a center frequency equal to the carrier frequency of the input signal is output.

Then, this output is passed through a band pass filter 702 for blocking signals other than the correlation integral signal, with the input frequency of the matched filter as the center frequency, and after being appropriately amplified by an amplifier 703. The envelope detector 704 detects the envelope.

Since this envelope signal is the absolute value of the correlation integral value, it is designed so that the autocorrelation characteristic of the synchronization-dedicated spreading code has a sharp peak at the synchronization point and has a sufficiently low side lobe at other points. If there is a spread code component dedicated to synchronization in the received signal, the envelope detector 70
A steep peak appears in the output of 4. Therefore, the peak detection circuit 705 detects this steep peak and outputs this peak to the phase detector 706.

The phase detector 706 detects the phase difference between the peak and the code start signal indicating the start point of the cycle of the spread code output from the code generator 204, and a voltage corresponding to this phase difference. Output level. This voltage level is smoothed by the loop filter 707 and output to the voltage controlled oscillator 708. The voltage control oscillator 708 generates a clock signal having a frequency according to the input voltage level and outputs it as a clock of the spread code generator 204. Further, the spread code start signal is output to the code generator 204 and the baseband demodulation circuit 206 as a code synchronization signal.

The synchronizing circuit 203 and the code generator 204 together form a kind of Fiesz-lock loop. Then, in the state where the synchronization is not established, since there is a phase difference between the correlation peak signal which is the input of the phase detector 706 and the spread code start signal, the spread code clock is advanced (or delayed), which causes The phase difference between the synchronization-dedicated spreading code component included in the received signal and the spreading code start signal gradually decreases. Then, when the phases of the two coincide with each other, the phase difference of the phase detector 706 becomes 0, and thereafter, the phase difference is controlled so as to become 0.

After the synchronization is established, the spread code generator 204
Generates a spreading code group having the same clock and spreading code phase as the transmitting side spreading code group. The spread code PN0 dedicated to synchronization of these code groups is input to the carrier reproduction circuit 205. The carrier reproduction circuit 205 despreads the reception signal converted to the transmission frequency or the intermediate frequency band, which is the output of the high frequency signal processing unit 202, by the synchronization dedicated spreading code PN0, and reproduces the carrier wave of the transmission frequency or the intermediate frequency band. As the configuration of the carrier regenerating circuit 205, for example, a circuit using a phase locked loop as shown in FIG. 5 is used.

In FIG. 5, the received signal and the spread code for synchronization PN0 are multiplied by the multiplier 501. Then, after synchronization is established, the clock and code phase of the synchronization dedicated spreading code and the reference synchronization dedicated spreading code in the received signal match, and since the transmission side synchronization dedicated spreading code is not modulated with data, The signal is despread by the multiplier 501, and the carrier component appears at its output.

This output is then input to the band pass filter 502, and only the carrier component is extracted and output. This output is then fed to the phase detector 503, the loop
The phase-locked loop formed by the filter 504 and the voltage-controlled oscillator 505 is input to the voltage-controlled oscillator 50.
5, the signal whose phase is locked to the carrier component output from the band pass filter 502 is output as a reproduced carrier.

The reproduced carrier wave is input to the baseband demodulation circuit 206. In the baseband demodulation circuit 206, a baseband signal is generated from the reproduced carrier wave and the output of the high frequency signal processing unit 202. This baseband signal is distributed to n branches and spread code generator 204
The spread code groups PN1 to PNn, which are the outputs of the above, are despread for each code division channel, and subsequently data demodulation is performed. The baseband demodulation circuit 206 is configured as shown in FIG. 6, for example.

In FIG. 6, the received signal is converted into a baseband signal by multiplying the input received signal and the reproduced carrier wave by a multiplier 601 and removing an unnecessary signal by a low pass filter 602. This baseband signal is an A / D converter 603 whose sampling period is the recovered clock.
Is converted into a digital signal having a resolution of single bit or multiple bits. This digital signal is distributed to n branches, and in each branch, the most significant bit of the digital signal is an output of a spreading code generator, each of which is a spreading code group PN1 to PNn, and an exclusive OR circuit group 6
The exclusive-OR operation is performed by 04-1 to 04-n and is input to the adder groups 605-1 to 60n together with other bits. Then, in the adder groups 605-1 to 60-n, the input signal and the outputs of the register groups 606-1 to 606-1 are added for each reproduction clock pulse and output to the register groups 606-1 to 606-1.

The register groups 606-1 to 606-1-n are reset when the leading bit of each spreading code is input,
Thereafter, the result of adding the products of the received signal and the spread code over one cycle of the spread code is stored. Therefore, when the last bit of one cycle of the spread code is input, the register groups 606-1 to 606-1n store the correlation value between each cycle of the spread code and the received signal. Therefore, by performing data determination on the correlation values by the subsequent determination circuit groups 607-1 to 60-n, n pieces of demodulated data in parallel can be obtained. This correlation value is subsequently input to the multiplex number detection circuit 207.

In the multiplex number detection circuit 207, when the absolute value of the correlation value of each code channel is equal to or less than a certain value, it is determined that the code channel is not transmitted. That is,
The number of code channels in which the absolute value of the correlation value is equal to or greater than a certain value is counted, and this number is used as the number of multiplexes to control the parallel number control circuit 208.
Output to.

The parallel number control circuit 208 controls the parallel number of the parallel-serial converter 209 according to the input multiplex number, and outputs the transmission rate data directly derived from the multiplex number.

The parallel-serial converter 209 is a parallel number control circuit 2
08, the parallel number is set, and the effective m of the n pieces of parallel demodulated data demodulated by the baseband demodulation circuit 206.
Only this data is converted to serial data and output.

[0046]

As described above, according to the present invention,
The multiplexing number output on the transmission side can be easily detected from the correlation output, and the circuit scale can be easily reduced. Further, even when the code division multiplexing number is large, there is an effect that a small-sized and inexpensive communication device can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a transmitter according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a receiver in the first embodiment.

FIG. 3 is a block diagram showing a configuration of a transmitter in a conventional code division multiplexing system.

FIG. 4 is a block diagram showing a configuration of a receiver in a conventional code division multiplexing system.

FIG. 5 is a block diagram showing a configuration of a carrier reproducing circuit of the first embodiment.

FIG. 6 is a block diagram showing a configuration of a baseband demodulation circuit of the first embodiment.

FIG. 7 is a block diagram showing a configuration of a synchronizing circuit of the first embodiment.

[Explanation of symbols]

 101 ... Serial-parallel converter, 102 ... Parallel number control circuit, 103-1 to n ... Multiplier group, 104 ... Spread code generator, 105 ... Switch group, 106 ... Selection signal generation circuit, 107 ... Adder, 108 ... High frequency stage, 109 ... Gain control circuit, 110 ... Transmission antenna, 201 ... Reception antenna, 202 ... High frequency signal processing unit, 203 ... Synchronous circuit, 204 ... Spread code generator, 205 ... Carrier regeneration circuit, 206 ... Baseband demodulation circuit 207 ... Multiplex number detection circuit, 208 ... Parallel number control circuit, 209 ... Parallel-serial converter.

Claims (3)

[Claims] 1. A serial-parallel conversion means for converting an input data sequence into a parallel data sequence having a number of symbols m (1 ≦ m ≦ n) according to a transmission rate, and each of the n data spreading code sequences is modulated. Modulating means, selecting means for selecting a spreading code sequence for data modulated with m effective data from n outputs of the modulating means according to a transmission rate, and m of the selecting means.
A spread spectrum transmitter having a plurality of outputs to a transmission line with a gain corresponding to the transmission speed; a receiving unit for receiving a signal from the transmission line, and an output of the receiving unit and n
Correlating means for performing a correlation operation with each data spreading code sequence, demodulating means for demodulating n-symbol data from a correlation value output from the correlating means, and outputting the demodulating means based on the correlation value. A spread spectrum communication device comprising: a selection means for selecting valid m symbols; and a spread spectrum communication device. 2. A spread spectrum communication method characterized by performing code division multiplex communication with the number of multiplexing and gain according to the transmission rate. 3. The spread spectrum communication method according to claim 2, wherein an effective channel is selected according to the magnitudes of received signals of a plurality of code-divided channels.