JPH08293818A - Spectrum diffusion communication equipment - Google Patents

Abstract

PURPOSE: To convert the specified pattern of input into a pattern whose spectrum is uniform by converting data on a transmission-side in accordance with a mapping conversion rule and executing inverse conversion on a reception-side. CONSTITUTION: A converter 101 converts input data into parallel data, executes mapping conversion with prescribed correspondence by one to one and converts data into parallel data. Multiplier groups 102-1 to (n) multiply parallel data by n-pieces of diffusion codes from a diffusion code generator 103. Respective multiplied values are added 104 and are transmitted through a high frequency stage 105. On the reception-side, a diffusion code generator 204 generates a code diffusion code similar to that on the transmission-side by a code synchronizing signal inputted from a synchronizing circuit 203 and a clock signal. Thus, a base band demodulation circuit 206 executes demodulation by a base band by using the output of a carrier reproduction circuit 205, the output of a high frequency signal processing part 202 and the diffusion codes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread spectrum communication device for code division multiplex communication using different spread codes.

[0002]

2. Description of the Related Art Conventionally, in a spread spectrum communication system using a direct spread system, a transmitting side uses a spread code sequence such as a pseudo noise code (PN code) from a baseband signal of a digital signal to be normally transmitted. , It produces a baseband signal with a much wider bandwidth than the original data. In addition, PSK (Phase Shift Keying), F
Modulates SK (frequency shift keying), and RF
Converts to (radio frequency) signal and transmits.

On the receiving side, the same spreading code as that on the transmitting side is used to perform despreading for correlating with the received signal to convert the received signal into a narrow band signal having a bandwidth corresponding to the original data. Then, normal data demodulation is performed to reproduce the original data.

As described above, in the spread spectrum communication system, the transmission bandwidth is extremely wide with respect to the information bandwidth.
Under the condition that the transmission bandwidth is constant, only a very low transmission rate can be realized as compared with the ordinary narrow band modulation method.

There is a method called code division multiplexing to solve this problem. In this system, a high-speed information signal is converted into low-speed parallel data, spread-modulated by different spreading code sequences, added, and then converted into an RF signal for transmission, thereby lowering the spreading factor of spread-modulation. It realizes high-speed data transmission under the condition that the transmission bandwidth is constant.

FIG. 3 is a block diagram showing the structure of a transmitter of this system.

The input data is converted into n parallel data by the serial / parallel converter 301. Each of the converted data is multiplied by n different spreading code outputs of the spreading code generator 303 in n multiplier groups 302-1 to 302-n, and converted into an n-channel wideband spread signal.

Next, the output of each multiplier 302 is added to the adder 3
The sum is added at 04 and output to the high frequency stage 305. The added baseband wideband spread signal is converted by the high frequency stage 305 into a transmission frequency signal having an appropriate center frequency, and transmitted from the transmission antenna 306.

FIG. 4 is a block diagram showing the structure of the receiver.

The signal received by the antenna 401 is appropriately filtered and amplified by the high frequency signal processing section 402 and converted into an intermediate frequency signal. This intermediate frequency signal is distributed to the channels corresponding to each of the n spreading codes connected in parallel. In each channel, the input signal is subjected to correlation detection with the output of the spreading code generator group 404-1 to 40-n corresponding to the channel in the correlator group 403-1 to 40-n, and despreading is performed.

This despread signal is the synchronous circuit group 405-1.
The synchronization is established for each channel at .about.n, and the code phases and clocks of the spread code generators are matched. This despread signal is also demodulated by demodulator groups 406-1 to 40-n,
The data is played. Subsequently, this reproduction data is converted into serial data by the parallel-serial converter 407 and the original information is reproduced.

[0012]

However, the above-mentioned prior art has a problem that when a specific pattern is continuously input, the spectrum of the multiplexed high frequency signal becomes non-uniform and weak against noise. It was

It is an object of the present invention to provide a spread spectrum communication device capable of improving the transmission quality without increasing the circuit scale so much and converting the pattern into a pattern in which the spectrum is uniform even if a specific pattern is input. To do.

[0014]

According to the present invention, there are provided n input data converting means for converting an input data sequence into a predetermined parallel data sequence and n parallel data sequences having the same cycle and the same code phase. Modulation means for modulating each of the data spreading code sequences, an addition means for adding n outputs of the modulation means, and an output of the addition means converted into a predetermined transmission frequency band signal and sent to a transmission line. Spread spectrum transmitting apparatus having a transmitting means for transmitting, a receiving means for receiving a signal from a transmission line, a correlating means for performing a correlation operation between the output of the receiving means and the n data spreading code sequences, and the correlating means. Of demodulation means for demodulating n-symbol data from the correlation value which is the output of the demodulator, and output data conversion means for converting the parallel data string of n symbols which is the output of the demodulating means into an output data string. In a spread spectrum communication system including a spread spectrum receiver, the input data converting means converts the input data sequence of n symbols into a second parallel data sequence according to a predetermined mapping conversion rule corresponding to one to one. And the output data converting means includes means for converting the input n-symbol first parallel data string into a second parallel data string according to the inverse conversion rule of the mapping conversion.

With the above configuration, when input data is serial-parallel converted on the transmitting side, the data is converted according to a predetermined one-to-one mapping conversion rule and then multiplexed, and the inverse conversion is performed on the receiving side. It is possible to convert a continuously input specific pattern into a pattern having a uniform spectrum without deteriorating the transmission quality due to an increase in the circuit scale.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing the structure of a transmitter in the first embodiment of the present invention, and FIG. 2 is a block showing the structure of a receiver in this first embodiment. It is a figure.

First, referring to FIG. 1, the input data converter 1
01 converts serially input data into n pieces of first parallel data, performs predetermined one-to-one mapping conversion, and
To the second parallel data. Multiplier group 102-1
To n are parallelized data and the spread code generator 103.
It is multiplied by n spread codes output from.

The spread code generator 103 generates (n + 1) different spread codes (including a spread code PN0 dedicated to synchronization). The adder 104 is the spread code generator 1
03 dedicated spreading code and multiplier group 102
Add the n outputs from -1 to n. The high frequency stage 105
The output of the adder 104 is converted into a transmission frequency signal. The transmitting antenna 106 transmits the output from the high frequency stage 105 as a radio wave.

Further, in FIG. 2, the receiving antenna 201
Receives radio waves. The high frequency signal processing unit 202 performs processing such as filtering and amplification on the received high frequency signal. The synchronization circuit 203 acquires and maintains the synchronization with the spread code and the clock on the transmission side. Spread code generator 20
4 is the same as the spreading code group on the transmission side due to the code synchronizing signal and the clock signal input from the synchronizing circuit 203.
Generate +1 spreading code.

The carrier reproducing circuit 205 outputs the carrier reproducing spread code PN0 output from the spread code generator 204.
A carrier signal is reproduced from the output of the high frequency signal processing unit 202. The baseband demodulation circuit 206 outputs the output of the carrier reproduction circuit 205, the output of the high frequency signal processing unit 202, and the output of the spread code generator 204.
Demodulate in baseband using n.

The output data converter 207 inversely transforms the n first parallel demodulated data output from the baseband demodulation circuit 206 into the one-to-one correspondence mapping transformation to obtain second parallel demodulated data, The data is parallel-serially converted.

In the above structure, on the transmitting side, the input data is first converted by the input data converter 101 into n pieces of first parallel data equal to the number of code division multiplexes. Then, the parallel data is converted into second parallel data according to a predetermined one-to-one mapping conversion rule.

The input data converter 101 is, for example, as shown in FIG.
It has a configuration as shown in. The input serial data is
First, the serial-parallel converter 701 converts the data into n pieces of parallel data equal to the number of code division multiplexes. Subsequently, this parallel data is input to the data converter 702. The data converter 702 outputs the odd-numbered data of the input parallel data as it is, and outputs the even-numbered data with the polarity of the data inverted by an inverter.

As a result, it becomes possible to convert all 1's or all 0's patterns that frequently appear in serial input data into alternating patterns of 1010. as a result,
It is possible to avoid the non-uniformity of the transmission spectrum caused by directly multiplexing the patterns of all 1's or all 0's.

The reversal of the polarity of the parallel data is not limited to the even-numbered data, and it is possible to perform the same operation by performing an arbitrary number of data which is one or more and less than the total number of the parallel data. It is possible to obtain the effect of.

Which data should be inverted is determined based on the spreading codes PN0-n and the frequently transmitted data. That is, it is determined so that the spectrum of a signal obtained by spreading frequently-transmitted data with spreading codes PN0 to PN is as uniform as possible.

On the other hand, the spreading code generator 103 has spreading codes PN0-P having n + 1 identical code periods but different spreading codes.
Nn is generated. Of these, PN0 is for synchronization and carrier reproduction, and is directly input to the adder 104 without being modulated by the parallel data. The remaining n spreading codes are modulated by n parallel data in the multiplier groups 102-1 to 102-n and input to the adder 104.

The adder 104 linearly adds the n + 1 input signals and outputs the added baseband signal to the high frequency stage 105. The data converter 702, the multiplier group 102, the spreading code generator 103, and the adder 104
Input the output of the serial-parallel converter 701, adder 1
It is also possible to combine them into one table conversion memory that outputs the output of 04. The baseband signal is subsequently converted into a high frequency signal having an appropriate center frequency in the high frequency stage 105 and transmitted from the transmitting antenna 106.

On the receiving side, the signal received by the receiving antenna 201 is appropriately filtered and amplified by the high frequency signal processing section 202, and is output as it is as a transmission frequency band signal or as an appropriate intermediate frequency band signal. It
The signal is input to the synchronization circuit 203, and the synchronization circuit 203
Then, the reference spreading code P input from the code generator 204.
Spread code synchronization and clock synchronization with the transmission signal are established using N0 _* , and the code synchronization signal and clock signal are output to the spread code generator 204.

The reference spreading code PN0 _* is a code obtained by temporally inverting the synchronization spreading code PN0 on the transmitting side when a convolver is used for synchronization.

The synchronizing circuit 203 and the code generator 204 constitute a kind of phase lock loop as a whole. When synchronization is not established, there is a phase difference between the correlation peak signal and the spread code start signal, so the spread code clock is advanced (or delayed), and the spread code for synchronization included in the received signal The phase difference between the component and the reference spreading code gradually decreases. When the phases of the both agree with each other, that is, after the phase difference between the two becomes zero, the phase difference is controlled to become zero.

After the synchronization is established, the spreading code generator 204 generates spreading code groups PN0 to PN having the same clock and spreading code phase with the spreading code group on the transmitting side. The spreading code PN0 for synchronization of these code groups is input to the carrier reproducing circuit 205. In the carrier reproduction circuit 205,
The reception signal converted to the transmission frequency band or the intermediate frequency band, which is the output of the high frequency signal processing unit 202, is despread by the synchronization spreading code PN0, and the carrier wave in the transmission frequency band or the intermediate frequency band is reproduced.

As the carrier reproducing circuit 205, for example, a circuit utilizing a phase locked loop as shown in FIG. 5 is used. In FIG. 5, the received signal and the spreading code PN0 for synchronization are multiplied by a multiplier 501. After synchronization is established, the clock and code phase of the synchronization-specific spreading code in the received signal and the reference synchronization-specific spreading code match, and the synchronization-specific spreading code on the transmission side is not modulated with data. 5
The signal is despread with 01, and a carrier component appears at its output. The output is then input to the band pass filter 502, and the carrier component is extracted and output.

This output is then input to the phase locked loop composed of the phase detector 503, the loop filter 504 and the voltage control oscillator 505, and is output from the voltage control oscillator 505 from the band pass filter 502. A signal whose phase is locked to the carrier component is output as a reproduced carrier.

The reproduced carrier wave is input to the baseband demodulation circuit 206. In the baseband demodulation circuit 206, a baseband signal is generated from the reproduced carrier wave and the output of the high frequency signal processing unit 202. This baseband signal is distributed to n branches and spread code generator 20
Despreading is performed for each code division channel by the spreading code groups PN1 to PNn, which are the outputs of No. 4, and subsequently data demodulation is performed.

The baseband demodulation circuit 206 is constructed, for example, as shown in FIG. In FIG. 6, the input received signal and the reproduced carrier wave are multiplied by the multiplier 601.
The reception signal is converted into a baseband signal by removing unnecessary signals with the low-pass filter 602. This baseband signal is converted into a digital signal having a resolution of a single bit or a plurality of bits by an A / D converter 603 having a reproduction clock as a sampling period.

This digital signal is distributed to n branches, and the most significant bit (code bit) of the digital signal is exclusive to each of the spreading code groups PN1 to PNn which is the output of the spreading code generator 204 in each branch. Exclusive OR operation is performed by the logical OR circuit groups 604-1 to 60-n,
It is input to the adder groups 605-1 to 60n together with other bits. In the adder groups 605-1 to 60-n, the input signal is added to the outputs of the register groups 606-1 to 606-1 for each reproduction clock pulse and output to the register groups 606-1 to 606-1.

The register groups 606-1 to 606-1-n are reset when the leading bit of each spreading code is input,
Thereafter, the result of adding the products of the received signal and the spread code over one cycle of the spread code is stored.

Therefore, at the time when the last bit of one cycle of the spread code is input, the register groups 606-1 to 606-1 have
The correlation value between one cycle of each spreading code and the received signal is stored. The determination circuit group 607-1 that continues this correlation value
By performing the data determination in ~ n, n pieces of demodulated data in parallel are obtained. The demodulated n pieces of parallel demodulated data are output to the input data converter 10 by the output data converter 207.
Inverse conversion of the one-to-one mapping conversion performed in 1 is performed, and then the serial conversion is performed and output.

As the output data converter 207, for example, a circuit as shown in FIG. 8 is used. The parallel demodulated data is
It is input to the data inverse converter 801. Data inverse converter 8
In 01, the odd-numbered data of the input parallel data is output as it is, and the even-numbered data is output by inverting the polarity of the data by the inverter.

As a result, the inverse conversion of the one-to-one mapping conversion performed on the transmission side is performed, and the data before conversion on the transmission side is reproduced. Then, the data converter 80
The parallel data that is the output of 1 is converted into serial data by the parallel-serial converter 802 and output as a demodulated data string.

If an error occurs in the received data,
In this series of mapping conversion and inverse conversion, no calculation is performed between the received data, so that the error of a single symbol does not affect other symbols and the communication quality is not deteriorated.

Next, a second embodiment of the present invention will be described.

In the first embodiment, the polarity reversal of data is used for the one-to-one mapping conversion performed on the transmitting side and the receiving side, but in the second embodiment, the one-to-one mapping conversion is performed. In addition to the polarity inversion of data, transposition is used. Since the other structure is the same as that of the first embodiment, the description thereof will be omitted and the difference will be described in detail.

FIG. 9 is a block diagram showing an input data converter on the transmission side in the second embodiment.

The input serial data is sent to the serial-parallel converter 9
At 01, it is converted into n pieces of parallel data equal to the code division multiplex number. Subsequently, the parallel data is transferred to the first data converter 9
It is input to 02. The first data converter 902 outputs the odd-numbered data of the input parallel data as it is, and outputs the even-numbered data with the polarity of the data inverted by an inverter.

As a result, it becomes possible to convert all 1's or all 0's patterns that frequently appear in serial input data into alternating patterns 1010 ... Next, the parallel data output from the first data converter 902 is input to the second data converter 903. The second data converter 903 performs scrambling by transposing the positions of the input parallel data with each other according to a predetermined rule. As a result, even if a series of all 1's or all 0's is frequently input to the serial input data, the output of the second data converter 903 has a pattern close to a random number, thus avoiding nonuniformity of the transmission spectrum. It becomes possible. The output of the second data converter 903 is input to the multiplier groups 102-1 to 10-n.

FIG. 10 is a block diagram showing an output data converter on the receiving side in the second embodiment.

The parallel demodulated data input from the baseband demodulation circuit 206 is input to the first data inverse converter 1001. In the first data inverse converter 1001, the transpose inverse conversion performed in the second data converter 903 on the transmission side is performed on the parallel input data.

That is, conversion is performed to return the position of the parallel data to the state before the mutual exchange of data in the second data converter 903 on the transmission side. Subsequently, the output of the first data inverse converter 1001 is the second data inverse converter 1
002 is input. Second data inverse converter 1002
Outputs the odd-numbered data of the input parallel data as it is, and outputs the even-numbered data with the polarity of the data inverted by the inverter.

As a result, the inverse conversion of the conversion performed by the first data converter 902 on the transmission side is performed.
The input parallel data of the first data converter 902 on the transmitting side is reproduced. Next, the parallel data output from the second data converter 1002 is converted into serial data by the parallel-serial converter 1003 and output as a demodulated data string.

Next, a third embodiment of the present invention will be described.

In the above-described first and second embodiments, the input data before input to the multiplier group 102 is converted into the input data converter 101.
However, in the present embodiment, the spread codes PN1 to PNn before input to the multiplier group 102 are adjusted. for that purpose,
Instead of providing the data converter 702 shown in FIG. 7 between the serial-parallel converter 701 and the multiplier group 102, the data converter 702 is provided between the spreading code generator 103 and the multiplier group 102, and the data inverse conversion shown in FIG. Instead of providing the device 801 between the baseband demodulation circuit 206 and the parallel-serial converter 802, it may be provided between the code generator 204 and the baseband demodulation circuit 206.

Further, the first and second data converters 902 and 903 shown in FIG. 9 and the first and second data inverse converters 1001 and 1002 shown in FIG. 10 may be provided.

As shown in FIGS. 11 and 12, the codes generated from the code generators 803 and 804 may be arbitrarily set by the administrator from the outside by the code setting units 806 and 808. By doing so, the spectrum of data that is frequently transmitted continuously can be made uniform according to the actual usage.

Next, a fourth embodiment of the present invention will be described.

Also, in the system for converting the input data as in the first embodiment, the conversion rule of the one-to-one mapping conversion can be changed according to the actual use situation.

The configuration of the input data converter 101 and the output data converter 207 in the fourth embodiment is shown in FIG.
3, shown in FIG. Note that other configurations are as shown in FIGS.
Is common with.

As shown in the figure, the data converter 702A and the data inverse converter 801A are composed of a plurality of exclusive OR circuits. Then, in the present embodiment, the data converter 702A outputs the odd-numbered data of the input parallel data as it is according to the setting data from the setting unit 702B and outputs the inverted even-numbered data. It is set. Also, the setting unit 702B allows the administrator to arbitrarily change the conversion rule of the one-to-one mapping conversion from the outside.

On the other hand, the data inverse converter 801A on the receiving side
Is preset by the setting unit 801B so as to perform the inverse conversion of the one-to-one mapping conversion by the data converter 702A on the transmission side. In the present embodiment, the data inverse converter 801
A outputs the odd-numbered data of the input parallel data as it is, and reverses the polarity of the even-numbered data and outputs it.

With such a configuration, the inverse conversion of the one-to-one mapping conversion performed on the transmitting side is performed, and the data before conversion on the transmitting side is reproduced. In the setting unit 801B, according to the setting data in the setting unit 702B on the transmission side,
The inverse conversion rule of the data inverse converter 801A is set by the administrator.

The second data converter 90 shown in FIG.
3 and the second data inverse converter 1002 shown in FIG.
To the data converter 702A and the data inverse converter 8
You may comprise similarly to 01A.

[0063]

As described above, according to the present invention,
The transmission quality can be improved without increasing the circuit scale.
There is an effect that the specific pattern can be converted into a pattern having a uniform spectrum.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a transmitter according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a receiver in the first embodiment.

FIG. 3 is a block diagram showing a configuration of a conventional transmitter.

FIG. 4 is a block diagram showing a configuration of a conventional receiver.

FIG. 5 is a block diagram showing a carrier reproducing circuit in the first embodiment.

FIG. 6 is a block diagram showing a baseband demodulation circuit in the first embodiment.

FIG. 7 is a block diagram showing an input data converter in the first embodiment.

FIG. 8 is a block diagram showing an output data converter in the first embodiment.

FIG. 9 is a block diagram showing an input data converter according to a second embodiment of the present invention.

FIG. 10 is a block diagram showing an output data converter in the second embodiment.

FIG. 11 is a block diagram showing a configuration of a transmitter according to a third exemplary embodiment of the present invention.

FIG. 12 is a block diagram showing a configuration of a receiver in the third embodiment.

FIG. 13 is a block diagram showing an output data converter according to a fourth embodiment of the present invention.

FIG. 14 is a block diagram showing an input data converter in the fourth embodiment.

[Explanation of symbols]

 101 ... Input data converter, 102-1 to n ... Multiplier group, 103 ... Spread code generator, 104 ... Adder, 105 ... High frequency stage, 106 ... Transmit antenna, 201 ... Receive antenna, 202 ... High frequency signal processing unit , 203 ... Synchronous circuit, 204 ... Spread code generator, 205 ... Carrier recovery circuit, 206 ... Baseband demodulation circuit, 207 ... Output data converter.

Claims (12)

[Claims] 1. Input data conversion means for converting an input data sequence into a predetermined parallel data sequence, and each of n parallel spreading sequences for data having the same cycle and the same code phase in each of the parallel data sequences. Spread spectrum having a modulation means for modulating the output, an addition means for adding n outputs of the modulation means, and a transmission means for converting the output of the addition means into a predetermined transmission frequency band signal and transmitting the signal to a transmission line. A transmitting device, a receiving means for receiving a signal from a transmission line, a correlating means for performing a correlation operation between the output of the receiving means and the n data spreading code sequences, and n from the correlation value output from the correlating means. A spread spectrum receiver having demodulation means for demodulating symbol data and output data conversion means for converting an n-symbol parallel data string output from the demodulation means into an output data string. In the spread spectrum communication system configured, the input data converting means has means for converting an input data string of n symbols into a second parallel data string according to a predetermined mapping conversion rule corresponding to one to one, and the output The spread spectrum communication device, wherein the data conversion means has means for converting the input first parallel data string of n symbols into a second parallel data string according to the inverse conversion rule of the mapping conversion. 2. A conversion means for converting a parallel data string to be transmitted into a second parallel data string according to a predetermined mapping conversion rule corresponding to one-to-one, and the same cycle for each of the second parallel data strings. Modulating means for modulating each of the n data spreading code sequences having the same code phase, adding means for adding the n outputs of the modulating means, and the output of the adding means for a predetermined transmission frequency band signal And a transmission means for converting the signal into a transmission line and transmitting it to a transmission line. 3. Receiving means for receiving a signal from a transmission line,
The output of the receiving means and a correlating means for performing a correlation operation of the n spreading code sequences for data, the demodulating means for demodulating n-symbol data from the correlation value output from the correlating means, and the output of the demodulating means. A spread spectrum receiving apparatus, comprising: output data conversion means for converting a parallel data sequence of a certain n symbols into a second parallel data sequence according to an inverse conversion rule of mapping conversion on the transmission side. 4. A processing means for processing parallel data using a plurality of spread codes, and a transmitting means for transmitting the processed parallel data, wherein the transmitting means has a uniform spectrum of a transmission signal. Spread spectrum communication device characterized by processing parallel data as described above. 5. The spread spectrum communication device according to claim 4, wherein the processing means performs one-to-one mapping conversion on parallel data. 6. The spread spectrum communication device according to claim 4, further comprising inverting means for inverting parallel data. 7. The spread spectrum communication device according to claim 5, further comprising setting means for setting a conversion rule of mapping conversion to a desired conversion rule. 8. The method according to claim 4, wherein the transmitting means processes the parallel data so that the spectrum of the transmission signal in which the parallel data frequently and continuously transmitted is code division multiplexed becomes uniform. Spread spectrum communication device. 9. A receiving means for receiving a code division multiplexed signal, a despreading means for despreading the received signal and outputting parallel data, and a spectrum of the code division multiplexed signal to be uniform. In addition, the spread spectrum communication device is provided with an inverse conversion means for performing an inverse conversion of the conversion performed on the transmitting side. 10. The spread spectrum communication device according to claim 9, wherein the inverse conversion means performs one-to-one mapping conversion on parallel data. 11. The spread spectrum communication device according to claim 9, wherein the inverse transforming means includes inverting means for inverting parallel data. 12. The spread spectrum communication device according to claim 9, further comprising setting means for setting a conversion rule of inverse conversion to a desired conversion rule.