JPH08335755A - Wiring board - Google Patents

Wiring board

Info

Publication number
JPH08335755A
JPH08335755A JP13908395A JP13908395A JPH08335755A JP H08335755 A JPH08335755 A JP H08335755A JP 13908395 A JP13908395 A JP 13908395A JP 13908395 A JP13908395 A JP 13908395A JP H08335755 A JPH08335755 A JP H08335755A
Authority
JP
Japan
Prior art keywords
alignment mark
wiring board
deviation
alignment
efficiency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13908395A
Other languages
Japanese (ja)
Inventor
Tsutomu Yamagiwa
勤 山際
Yoichi Hatano
陽一 畑野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13908395A priority Critical patent/JPH08335755A/en
Publication of JPH08335755A publication Critical patent/JPH08335755A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Abstract

PURPOSE: To provide a pair of board to be pasted in which the problem of low connection efficiency is solved while enhancing the aligning efficiency and the inspection/confirmation efficiency of shifted connection. CONSTITUTION: A first alignment mark 4 is put on a board 1 and a second alignment mark 5 of different shape and dimensions is put on a board 2 such that they are not overlapped within the allowable dimensional range of shift. When the shift exceeds a standard value, the alignment marks 4, 5 are overlapped and thereby the shifted connection can be determined easily.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は複数のプリント配線基板
を各々接続して構成された配線基板に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board formed by connecting a plurality of printed wiring boards.

【0002】[0002]

【従来の技術】図6は従来のこの種の配線基板の構成を
示したものであり、同図において21は例えばフレキシ
ブル基板からなる透明の配線基板であり、22はこの配
線基板21と接続される配線基板であり、26は配線基
板21,22のそれぞれに印刷された端子群または配線
群(以下、端子群という)であり、23及び24は端子
群26を重ね合わせる時に位置合わせに用いるマークで
ある。マーク23は端子群26と一体化しているマーク
の例であり、マーク24は一体化していないマークの例
である。25は配線基板22の端面を表している。
2. Description of the Related Art FIG. 6 shows the structure of a conventional wiring board of this type. In FIG. 6, reference numeral 21 is a transparent wiring board made of, for example, a flexible board, and 22 is connected to the wiring board 21. Is a wiring board, 26 is a terminal group or a wiring group (hereinafter referred to as a terminal group) printed on each of the wiring boards 21 and 22, and 23 and 24 are marks used for alignment when the terminal groups 26 are superposed. Is. The mark 23 is an example of a mark that is integrated with the terminal group 26, and the mark 24 is an example of a mark that is not integrated. Reference numeral 25 denotes an end surface of the wiring board 22.

【0003】従来、このように形成された配線基板2
1,22の各々の端子群26を所定の位置にズレること
なく重ね合わせる場合には、配線基板21を透視して配
線基板22を認識しながら、マーク23の各々をズレる
ことなく重ね合わせることにより、同図において左右方
向の位置合わせ、端子群26の各々をズレることなく重
ね合わせることにより、同図において上下方向の位置を
合わせることができる。またマーク24の一辺を端面2
5に合致させることによってもマーク23の各々を合致
させるのと同様に位置を合わせることができるように構
成されたものであった。
Conventionally, the wiring board 2 formed in this way
When the terminal groups 26 of 1 and 22 are superposed on each other without being displaced to a predetermined position, by recognizing the wiring board 22 through the wiring board 21, the marks 23 are superposed on each other without any deviation. By aligning the terminals in the left-right direction and overlapping the terminal groups 26 without displacement in the figure, the positions in the up-down direction can be aligned in the figure. In addition, one side of the mark 24 is the end face 2
By aligning the marks 5 with each other, the positions of the marks 23 can be aligned similarly to aligning the marks 23 with each other.

【0004】[0004]

【発明が解決しようとする課題】しかしながら上記従来
の構成では、配線基板21,22の各々の位置合わせマ
ーク23,24をズレることなく重ね合わせることによ
って各々の端子群26がズレることなく重なり合うこと
を確認する構成であるものの、実際には全くズレること
なく重ね合わせることは非常に困難であり、ズレること
なく重ね合わせる作業は、端子群26の接続作業の効率
低下につながり、また、ズレが発生した場合にも、ズレ
の大きさが曖昧であり、ズレの規格との比較が困難で合
否判定の効率を低下させるという課題を有していた。
However, in the above-mentioned conventional configuration, by overlapping the alignment marks 23 and 24 of the wiring boards 21 and 22 without shifting, it is possible to prevent the terminal groups 26 from overlapping without shifting. Although it is a configuration to be checked, it is actually very difficult to superimpose it without any deviation, and the operation of superimposing without deviation leads to a reduction in the efficiency of the connection work of the terminal group 26, and a deviation has occurred. Also in this case, the size of the deviation is ambiguous, and it is difficult to compare the deviation with the standard, and the efficiency of the pass / fail judgment is reduced.

【0005】本発明はこのような課題を解決し、全くズ
レることなく重ね合わせる(接続する)のではなく、許
されるズレの大きさを明確にし、明確化された規制範囲
内でズレて接続されることを許可することによって、各
々の端子群接続作業の効率を向上し、また接続後のズレ
の大きさを規格と容易に比較し、合否判別作業の効率を
向上させることができる配線基板を提供することを目的
とするものである。
The present invention solves such a problem, and does not overlap (connect) without any deviation, but defines the size of the allowable deviation, and connects with deviation within the specified regulation range. By permitting that, a wiring board that can improve the efficiency of each terminal group connection work, and can easily compare the size of the deviation after connection with the standard and improve the efficiency of the pass / fail judgment work. It is intended to be provided.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
に本発明の配線基板は、通常は中空の円環状とし、必要
に応じて箱形や楕円状の第1の位置合わせマークを貼り
合わされる基板の一方に形成すると共に、上記第1の位
置合わせマークに対応するが、同一の位置で重なり合う
ことのない位置・形状からなる第2の位置合わせマーク
を対となる他方の基板上に形成し、かつ第1の位置合わ
せマークの内側線と第2の位置合わせマークの外形線と
の間隔を貼り合わせズレの規格値の許容寸法範囲内に設
定する構成としたものである。
In order to solve the above-mentioned problems, the wiring board of the present invention is usually a hollow annular ring, and if necessary, a box-shaped or elliptical first alignment mark is attached. And a second alignment mark corresponding to the first alignment mark but having a position and shape that do not overlap at the same position on the other substrate that forms a pair. In addition, the gap between the inner line of the first alignment mark and the outline of the second alignment mark is set within the allowable dimension range of the standard value of the misalignment.

【0007】[0007]

【作用】この構成により第1の位置合わせマークと第2
の位置合わせマークとの形状寸法に差を設けて各マーク
が重なり合わない範囲内で接続すれば、各々の端子群も
位置の差の寸法範囲内、つまりズレの規格範囲内で重ね
合わせることができ、また各マークの形状及び寸法差を
変えることにより、各製品毎に独自のズレ方向、ズレ寸
法の規格でズレを制限することができる。
With this configuration, the first alignment mark and the second alignment mark
By making a difference in shape and size from the alignment mark and connecting within the range where the marks do not overlap, each terminal group can be overlapped within the size range of the position difference, that is, within the standard range of deviation. Further, by changing the shape and dimensional difference of each mark, it is possible to limit the deviation according to the standard of the deviation direction and the deviation dimension unique to each product.

【0008】[0008]

【実施例】以下、本発明の一実施例による配線基板につ
いて図1を用いて説明する。
EXAMPLE A wiring board according to an example of the present invention will be described below with reference to FIG.

【0009】図1において、1は配線パターンを印刷さ
れた透明な絶縁性の基板、2は配線パターンを印刷され
た基板、3は上記基板1,2それぞれに印刷された端子
群、4は基板1に印刷された第1の位置合わせマーク、
5は基板2に印刷された第2の位置合わせマークであ
り、各々の端子群3を接続することで基板1の配線と基
板2の配線とが接続されるように構成されたものであ
る。
In FIG. 1, 1 is a transparent insulating substrate on which a wiring pattern is printed, 2 is a substrate on which a wiring pattern is printed, 3 is a terminal group printed on each of the substrates 1 and 2, and 4 is a substrate. The first alignment mark printed on 1,
Reference numeral 5 denotes a second alignment mark printed on the substrate 2, which is configured to connect the wirings of the substrate 1 and the wiring of the substrate 2 by connecting the respective terminal groups 3.

【0010】次に上記各々の端子群3の接続は、基板1
と基板2とをズレることなく接続すると第1の位置合わ
せマーク4と第2の位置合わせマーク5との関係は図2
のように重なり合った状態となり、この時の第1の位置
合わせマーク4の内側と第2の位置合わせマーク5の外
形との寸法差6と7とは、それぞれズレの規格値と対応
するように設定しておく。図1において第1の位置合わ
せマーク4と第2の位置合わせマーク5とが上下方向に
寸法差6以上ズレて重なり合うと図3のように第1の位
置合わせマーク4と第2の位置合わせマーク5の上下方
向の部分が重なり、左右方向に寸法差7以上ズレて重な
り合うと(図示せず)第1の位置合わせマーク4と第2
の位置合わせマーク5の左右方向の部分が重なる。
Next, the connection of each of the terminal groups 3 is made by connecting the substrate 1 to each other.
When the substrate 2 and the substrate 2 are connected without displacement, the relationship between the first alignment mark 4 and the second alignment mark 5 is shown in FIG.
As described above, the dimensional differences 6 and 7 between the inside of the first alignment mark 4 and the outer shape of the second alignment mark 5 at this time correspond to the standard values of the deviations, respectively. Set it. In FIG. 1, when the first alignment mark 4 and the second alignment mark 5 overlap each other with a vertical dimension difference of 6 or more, the first alignment mark 4 and the second alignment mark are overlapped as shown in FIG. When the vertical portions of 5 overlap, and the horizontal dimension shifts by a dimension difference of 7 or more (not shown), the first alignment mark 4 and the second alignment mark 4 are overlapped.
The left and right portions of the alignment mark 5 of are overlapped.

【0011】さらに、第1の位置合わせマーク4、第2
の位置合わせマーク5を導電性物質で印刷した場合、第
1の位置合わせマーク4と第2の位置合わせマーク5と
が接触すると電気的に導通することになるため、第1の
位置合わせマーク4と第2の位置合わせマーク5間の導
通検査を電気的に自動で行えば、基板1と基板2との接
続ズレの合否判定を自動で行うことが可能となるもので
ある。
Further, the first alignment mark 4 and the second alignment mark
When the alignment mark 5 of No. 1 is printed with a conductive substance, when the first alignment mark 4 and the second alignment mark 5 come into contact with each other, they become electrically conductive, and therefore the first alignment mark 4 By electrically and automatically inspecting the continuity between the second alignment mark 5 and the second alignment mark 5, it is possible to automatically determine whether the connection deviation between the substrate 1 and the substrate 2 is acceptable or not.

【0012】また、上記第1の位置合わせマーク4、第
2の位置合わせマーク5の導通を検査するための取り出
し用端子の引き出しパターンを、例えば全方向が同ギャ
ップの例を示した図4のように形成したり、上下方向と
左右方向のギャップが異なる例を示した図5のように形
成し、引き出しパターン部分のみ重ならないように第1
の位置合わせマーク4の外周の一部を開放して行い、開
放した部分はズレを判定できないため、その分を別の部
分に(図4、図5では開放部分の上下に左右ズレの判定
部を作っている)作っておくように構成しても同様の効
果を得ることができる。
Further, the lead-out pattern of the lead-out terminals for inspecting the continuity of the first alignment mark 4 and the second alignment mark 5 is shown in FIG. 5 or an example in which the gaps in the vertical direction and the horizontal direction are different from each other as shown in FIG.
This is done by opening a part of the outer circumference of the alignment mark 4 and the deviation cannot be judged in the opened part, so that part is set as another part (in FIG. 4 and FIG. The same effect can be obtained by configuring it so that it is made in advance.

【0013】[0013]

【発明の効果】本発明は上記実施例より明らかなよう
に、一対の基板のそれぞれに形状または位置の寸法が異
なる位置合わせマークを設けた構成としたものであり、
この寸法差の範囲内で基板を位置決めすればよいために
位置決め効率が向上し、接続作業の効率を向上させるこ
とができる。
As is apparent from the above-described embodiment, the present invention has a configuration in which a pair of substrates are provided with alignment marks having different shape or position dimensions.
Since it is only necessary to position the substrate within the range of this dimensional difference, the positioning efficiency is improved and the connection work efficiency can be improved.

【0014】更に前述の寸法差を接続ズレの規格値に予
め設定しているため、接続後の配線基板の品質を確認す
る際に、ズレの大きさを規格値と容易に比較することが
でき、検査効率及び検査精度を向上することができ、さ
らに、位置合わせマークを導電性物質で印刷することに
より、ズレの大きさが規格値を超えると各々の位置合わ
せマークが接触し電気的に導通することになるため、各
々の位置合わせマーク間の導通検査を自動で行えば接続
ズレの合否判定を自動で行うことが可能になるなど、優
れた効果を発揮するものである。
Further, since the above-mentioned dimensional difference is preset to the standard value of the connection deviation, the magnitude of the deviation can be easily compared with the standard value when confirming the quality of the wiring board after connection. In addition, the inspection efficiency and inspection accuracy can be improved, and by printing the alignment marks with a conductive material, each alignment mark will come into contact and become electrically conductive if the size of the deviation exceeds the standard value. Therefore, if the continuity inspection between the respective alignment marks is automatically performed, it becomes possible to automatically determine whether or not the connection deviation is satisfied, which is an excellent effect.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における配線基板を示す平面
FIG. 1 is a plan view showing a wiring board according to an embodiment of the present invention.

【図2】同実施例の重なり合った状態の位置合わせマー
クの拡大図
FIG. 2 is an enlarged view of an alignment mark in an overlapped state of the embodiment.

【図3】同実施例のズレて重なり合った状態の位置合わ
せマークの一例を表す拡大図
FIG. 3 is an enlarged view showing an example of alignment marks in a misaligned and overlapped state of the embodiment.

【図4】本発明の他の実施例を表す位置合わせマークの
拡大図
FIG. 4 is an enlarged view of an alignment mark representing another embodiment of the present invention.

【図5】本発明の他の実施例を表す位置合わせマークの
拡大図
FIG. 5 is an enlarged view of an alignment mark showing another embodiment of the present invention.

【図6】従来の配線基板を示す平面図FIG. 6 is a plan view showing a conventional wiring board.

【符号の説明】[Explanation of symbols]

1 絶縁性の基板 2 基板 3 端子群 4 第1の位置合わせマーク 5 第2の位置合わせマーク 6 第1及び第2の位置合わせマークの寸法差(接続ズ
レの規格値) 7 第1及び第2の位置合わせマークの寸法差(接続ズ
レの規格値)
1 Insulating Substrate 2 Substrate 3 Terminal Group 4 First Alignment Mark 5 Second Alignment Mark 6 Dimensional Difference between First and Second Alignment Marks (Standard Value of Connection Misalignment) 7 First and Second Alignment mark dimension difference (standard value for connection deviation)

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 端子群または配線群を印刷形成した少な
くとも2枚の基板の上記端子群または配線群どうしを重
ね合わせて貼り合わせ接続して回路を構成した配線基板
において、貼り合わされる基板の重なり合う位置にそれ
ぞれ位置合わせマークを形成すると共に、この一対の位
置合わせマークを貼り合わせズレの許容寸法範囲内で互
いに重なり合わない異なる形状・寸法で形成してなる配
線基板。
1. A wiring board in which at least two substrates on which terminals or wirings are formed by printing are stacked and connected by laminating and connecting the terminals or wirings, and the boards to be laminated are overlapped. A wiring board in which alignment marks are formed at respective positions, and the pair of alignment marks are formed in different shapes and dimensions that do not overlap each other within the allowable dimension range of the bonding deviation.
【請求項2】 各基板に形成された一対の位置合わせマ
ークが導電性を有したものである請求項1記載の配線基
板。
2. The wiring board according to claim 1, wherein the pair of alignment marks formed on each board have conductivity.
JP13908395A 1995-06-06 1995-06-06 Wiring board Pending JPH08335755A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13908395A JPH08335755A (en) 1995-06-06 1995-06-06 Wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13908395A JPH08335755A (en) 1995-06-06 1995-06-06 Wiring board

Publications (1)

Publication Number Publication Date
JPH08335755A true JPH08335755A (en) 1996-12-17

Family

ID=15237092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13908395A Pending JPH08335755A (en) 1995-06-06 1995-06-06 Wiring board

Country Status (1)

Country Link
JP (1) JPH08335755A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015064822A (en) * 2013-09-26 2015-04-09 大日本印刷株式会社 Position detection electrode substrate for touch panel, touch panel using the same and picture display unit using the touch panel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015064822A (en) * 2013-09-26 2015-04-09 大日本印刷株式会社 Position detection electrode substrate for touch panel, touch panel using the same and picture display unit using the touch panel

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