JPH08331188A - Timing extract circuit - Google Patents

Abstract

PURPOSE: To realize a timing extract circuit in a QPSK(quadrature phase shift keying) storage and simultaneous demodulator with a simple circuit configuration. CONSTITUTION: An A/D converter 11 applies oversampling a QPSK quasi- synchronization detection signal including a unique word asynchronously with a symbol rate. A memory 12 stores oversampling data to be received. A correlation device 15 calculates a correlation series between data stored in the memory in the vicinity of the unique word and a referenced unique word. A timing calculation means 16 calculates a time deviation between a sampling point and a symbol median based on the correlation series. An averaging processing means 17 applies averaging processing to a received time deviation signal based on a mean value of time deviation in several preceding frames having already been calculated and stored. A waveform shaping and interpolation filter 14 conducts waveform shaping and calculates an identification point signal based on a mean identification point estimate position signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timing extraction circuit in a QPSK accumulation batch demodulator.

[0002]

2. Description of the Related Art In recent years, as for a timing extraction circuit in a storage batch demodulator, a method using FFT, a method using correlation operation and DFT, or a method using an automatic equalizer has been studied.

FIG. 2 shows an operation algorithm of the most basic conventional timing extraction circuit (reference, Higashida et al .: "Timing extraction and carrier estimation in PSK signal batch demodulation system", electronic information). IEICE research report, CS86-169). The operation of each unit shown in FIG. 2 will be described below. The 2 ^L pieces (L: the number of stages of the FFT) of the in-phase and quadrature component data read from the memory are each squared and added. A window function is applied to this to reduce the effect at the edge of the data,
Input to FFT. Then, a frequency spectrum showing a peak near the symbol rate is extracted as a timing component from the power spectrum of the FFT output.

Next, the inverse FFT is applied to the real part (c
os component) and imaginary part (sin component) waveforms are obtained. When the arctangent is applied to the imaginary part divided by the real part, the timing phase component is obtained. This timing phase component is exactly π
If you read the data at, you can read the median of the symbols. However, since sampling is generally asynchronous with the symbol rate, the sample value at the point where the timing phase component is closest to π is used as the median value of the symbol.

[0005]

However, the symbol value obtained by the above-mentioned conventional timing extraction method includes an error due to the asynchronousness of sampling and symbol rate. If the sampling frequency is increased to reduce the error, the memory amount increases significantly, and conversely, if the sampling frequency is decreased to reduce the memory amount, the symbol value error increases.

Further, when the frame length is short and the influence of the deviation between the clock frequencies on the transmitting side and the receiving side does not pose a problem, the conventional technique using the FFT has a value of 1.
The amount of calculation per symbol becomes too large.

It is an object of the present invention to provide a timing extraction circuit which has a simple circuit configuration and can obtain a more accurate symbol value even when the number of samples per symbol is small.

[0008]

In order to solve the above-mentioned problems, a timing extraction circuit of the present invention calculates a correlation value between sampling data and a reference unique word by using a correlator, and calculates the timing of a symbol center from the correlation value. And calculate
Further, based on the timing obtained by performing the averaging process over several frames, a waveform shaping filter having an interpolation function is used to calculate the value of the center of the symbol by interpolation from the sampling data read from the memory. .

[0009]

In the present invention, since the interpolation is performed, the error of the symbol value is small even when the sampling frequency is several times lower than the symbol rate. Further, by performing the averaging process on the obtained timing, the influence of the uncertainty of the data before and after the unique word is reduced, so that an accurate symbol value can be obtained even when the unique word is short.

[0010]

EXAMPLE In this example, the sampling rate is twice the symbol rate, the length of one frame is 40 symbols, and the length of the unique word is 4 symbols, which will be described below with reference to the drawings. In FIG. 1, 11 is an analog-to-digital converter that oversamples a QPSK quasi-synchronous detection signal asynchronously with the symbol rate, 12 is a memory for storing oversampling data, and 13 is a complex conjugate value of a reference unique word. Memory, 1
4 is a digital filter having waveform shaping and interpolation functions, 15 is a correlator that calculates a correlation value between the data read from the memory 11 and the reference unique word complex conjugate value read from the memory 13, and 16 is a correlator. Timing calculation means for calculating the timing from the correlation value sequence data read from the correlator 15, and 17 for the timing calculation means 16.
It is an averaging processing means for performing averaging processing on the timing signal read from the.

FIG. 3 is a block diagram showing an embodiment of the correlator applied to the present invention, and the operation of the correlator will be described with reference to FIG. 31, 32, 33, 34, 35, 36 are 1
A complex delay device that delays the data of only the sample, 37,
38, 39, 30 are complex multipliers, 41 is a complex adder, 4
2 is a device that outputs the absolute value of the input, 43 is a device that outputs the absolute value of the input, and 44 is an adder. U ₁ ^* , U ₂ ^* ,
U ₃ ^* and U ₄ ^* are complex conjugate values of 4 unique word symbols. The thick arrow means the flow of complex data, and the thin arrow means the flow of real number data. The data stored in the memory 12 is sequentially read into this correlator, and four sample values are set as one set at every other sample by the complex delay device.

The sum of the complex products of the set of sample values and the complex conjugate values U ₁ ^* , U ₂ ^* , U ₃ ^* , U ₄ ^* of the unique word is calculated as a complex correlation value. Then, the sum of the absolute values of the real part and the imaginary part of the complex correlation value is output as the correlation value.

Next, the operation of the timing calculation means 16 will be described. The peak value of the correlation is defined as r _p, and the correlation values r _p-1 , r _p , and r _{p + 1} in the vicinity thereof are input from the correlator. In this embodiment, as an approximate value of the time difference from the sample point to the symbol center point, a parabola passing through three points (-T, r _{p -1} ), (0, r _p ), (T, r _{p + 1} ) The point at which the slope becomes 0 is calculated using (Equation 1) and output.

[0014]

[Equation 1]

The above Δt fluctuates in the short term due to the influence of noise and random data before and after the unique word, and fluctuates in the long term due to the deviation of the clock frequency between the transmitting side and the receiving side.
To improve the accuracy of Δt, some averaging operation may be performed, but simple averaging operation cannot be performed. This is because the unique word position on the memory fluctuates due to the influence of the clock frequency deviation, so that the correlation peak position also fluctuates, and at that time, the value of Δt causes a jump of about the sampling period.

FIG. 4 shows an algorithm of the averaging processing means in consideration of the above-mentioned variation phenomenon of Δt. This will be described below with reference to FIG.

First, a variable a representing the average value is initialized to 0, and a counter n representing the number of input data is initialized to 1 (S0
1). Next, the estimated time difference Δt read from the timing calculation means is substituted into the variable x (S02). And
It is determined whether or not a jump has occurred in the direction in which the value increases from a to x (S031). If a jump has occurred, the sampling cycle T is subtracted from a (S041) for correction. Is done, and again
If a jump in the increasing direction has not occurred, it is determined whether or not a jump has occurred in the direction in which the value decreases from a to x (S032). Sampling cycle T is added (S
042) is performed. Note that α is a coefficient for jump determination.

Subsequently, it is judged whether or not the counter n has reached the average value calculation number N (S05), and when n is less than N, the value of a is estimated by the updating equation (1). It is updated so that it becomes the average value of the time difference (S06),
After that, n is incremented by 1 (S07).
On the other hand, when n is equal to N, the error of a due to the influence of random data is considered to be sufficiently small, and the update equation (2)
As a result, the value of a is updated in such a manner that the difference between a and x is slightly added (S08). Note that β is a positive coefficient that is sufficiently smaller than 1.

Finally, the value of a is output (S09) and returns to the input section (S02). To summarize the update process, the average value up to that time is output in order to respond to the short-term fluctuation of Δt up to the (N-1) th frame after the operation starts, but after the Nth frame, the update of (2) , That is, a is Δt
Is updated to follow the long-term fluctuation of A, and the updated value of a is output.

The waveform shaping / interpolation interpolation filter 14 has a table of impulse response waveform sampling data for performing desired waveform shaping, and convolution of the impulse response data and the sampling data read from the memory 12 is performed. Is calculated at the estimated symbol center point based on the output value of the averaging processing means 17, and this is output as a symbol value.

As described above, the timing calculation means 1
6, the timing is calculated from the three correlation values in the vicinity of the unique word, and the averaging process is performed by the averaging means 17 to remove the error due to the data variation. Even if the length is short and the influence of data variation before and after the unique word on the calculation timing is large, the symbol center point can be accurately estimated.

[0022]

As described above, the timing extraction circuit of the present invention can extract accurate timing even at a low sampling frequency.

The FFT used in the prior art
By using the correlator 15 instead of the method that requires a huge amount of calculation, such as the inverse FFT, and the inverse FFT, the amount of calculation of the present invention is extremely smaller than that of the conventional technique.

Therefore, it is very useful as a timing extraction circuit for a high speed QPSK accumulation batch demodulator. Further, in the timing extraction circuit of the present invention, all blocks except the analog / digital converter can be realized by digital circuits, so that there is little influence by the environment such as temperature change, so that the reliability is high and miniaturization by LSI is possible. There is a feature that it is possible.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a timing extraction circuit of the present invention.

FIG. 2 is a block diagram of a conventional most basic timing extraction circuit.

FIG. 3 is a block diagram showing an embodiment of a correlator applied to the present invention.

FIG. 4 is a flowchart showing an embodiment of averaging processing means applied to the present invention.

[Explanation of symbols]

 11 analog-digital converter 12, 13 memory 14 waveform shaping and interpolation filter 15 correlator 16 timing calculation means 17 averaging processing means

Claims (2)

[Claims] 1. An analog-to-digital converter that oversamples a QPSK (Quadrature Phase Shift Keying) quasi-synchronous detection signal including a unique word in units of one frame, and an analog-digital converter for each frame. A memory for accumulating oversampling data output from the digital converter; a correlator for calculating a correlation value sequence between a data sequence near a unique word in the oversampling data stored in the memory and a reference unique word; Timing calculating means for calculating an estimated time difference between the sampling point and the symbol center point from the output signal of the correlator, and waveform shaping for the sampling data accumulated in the memory, and at the same time, estimating based on the output data of the timing calculating means. Symbol at the center point Timing extraction circuit comprising the waveform shaping and interpolating between the filters calculated. 2. The waveform shaping and interpolation filter, comprising averaging processing means for averaging the time difference signal input from the timing calculating means based on the average value of the time differences of the past several frames. The timing extraction circuit according to claim 1, wherein the symbol value is calculated based on the output data of the averaging processing means instead of the output data of the timing calculation means.