JPH08331037A - Switching power supply circuit for portable telephone set - Google Patents

Abstract

PURPOSE: To obtain the simple switching power supply circuit not causing reception disturbance. CONSTITUTION: The switching power supply circuit for a portable telephone set having a control section in clock signal operation by a fixed frequency oscillator and a switching frequency signal generating means is provided with a frequency divider circuit 8 frequency-dividing a clock signal to control a frequency division ratio of the frequency divider circuit 8 by a frequency division ratio switching signal. Then a frequency division signal obtained by frequency- dividing the clock signal by the frequency divider circuit 8 is given to a switching frequency signal generating means (triangle wave generating circuit of switching IC) to synchronize the switching frequency signal with a frequency division signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching power supply circuit which does not give a reception failure to a receiving circuit of a mobile phone.

[0002]

2. Description of the Related Art In recent mobile phones, a pulse width modulation type switching regulator may be used as a stabilized power supply circuit in order to prolong battery life. in this case,
The switching frequency of the switching regulator is often determined by the self-excited oscillation circuit based on the time constant CR of the capacitance C and the resistance R. Generally, a reception signal of a mobile phone is converted into a first intermediate frequency signal and a second intermediate frequency signal and processed in order to improve sensitivity and separation. Therefore, the switching frequency of the switching regulator of the stabilized power supply circuit and the frequency of its harmonics are set so as not to cause mutual interference such as beat disturbance with the frequency of the transmission / reception circuit.

[0003]

However, in the conventional switching regulator (stabilized power supply circuit) using the self-excited oscillation circuit, there are variations in the electrostatic capacitance C of the capacitor used and the resistance value R of the resistor, and further, In the worst case, the switching frequency fluctuates by about ± 20% due to changes in environmental conditions such as temperature, and its harmonics also fluctuate. For example, the switching frequency is 300 KHz
If set to, a fluctuation of about ± 60 KHz occurs.

When the switching frequency of the switching regulator and its harmonics match or come close to the intermediate frequency of the receiving circuit of the mobile phone (eg, the first intermediate frequency 55 MHz, the second intermediate frequency 450 MHz),
There is a possibility that mutual interference may occur and an audible frequency may be generated to cause a beat failure or a sensitivity suppression failure, which may deteriorate reception sensitivity, resulting in deterioration of speech quality or call failure.

In order to prevent this, there is a method of using a power source block or a filter, but there is a problem in that the scale is large and the structure is complicated and the cost is increased.

The present invention has been made in view of the above points, and an object of the present invention is to provide a switching power supply circuit which eliminates the above problems and is simple and does not cause reception failure.

[0007]

In order to solve the above-mentioned problems, the present invention comprises a control section which operates by a clock signal by a fixed oscillator, and a voltage stabilizing circuit having a switching frequency signal generating means and a pulse width modulation method. In the switching power supply circuit of the portable telephone, the frequency dividing circuit 8 for dividing the clock signal is provided as shown in FIG. 1, and the frequency dividing ratio of the frequency dividing circuit 8 is controlled by the frequency dividing ratio switching signal. A frequency-divided signal obtained by frequency-dividing the clock signal by the frequency dividing circuit 8 is used as the switching frequency signal generating means (switching IC 1-5).
Of the triangular wave generating circuit 1-51) to synchronize the switching frequency signal with the frequency division signal.

[0008]

In the present invention, the switching frequency signal is synchronized with the frequency-divided signal obtained by dividing the clock signal by the frequency dividing circuit 8. Therefore, the clock signal is a fixed frequency signal output from a crystal oscillator of temperature compensation type or the like. Therefore, unlike the conventional case, the frequency hardly changes due to changes in environmental conditions such as temperature. Therefore, if the frequency dividing circuit 8 appropriately divides the frequency of the clock signal, mutual interference with the intermediate frequency signal of the receiving unit 2 does not occur and the communication quality does not deteriorate. The frequency dividing ratio of the frequency dividing circuit 8 is controlled by the frequency dividing ratio switching signal. Therefore, when mutual interference occurs, the frequency dividing ratio is switched to avoid a beat failure due to mutual interference. Further, the frequency division ratio of the frequency dividing circuit 8 is switched as necessary by the frequency division ratio switching signal to lower the switching frequency and reduce switching loss and circuit current consumption.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a diagram showing a configuration example of a mobile phone using the switching power supply circuit of the present invention. As shown, a mobile phone using the switching power supply circuit of the present invention generates a switching power supply circuit 1, a receiving unit 2, a receiver 3, a transmitting unit 4, a transmitter 5, a control unit 6 for controlling the whole, and a clock signal. An oscillator 7 such as a crystal oscillator, a frequency dividing circuit 8 for dividing a clock signal, an antenna 9, and a battery 10.

The receiving unit 2 and the transmitting unit 4 are controlled by the control unit 6, and the receiving unit 2 receives the radio wave signal received from the antenna 9 as a first signal.
The intermediate frequency signal and the second intermediate frequency signal are converted and demodulated and output as a voice output from the handset 3, and the transmitting unit 4 modulates the voice signal input from the handset 5 and outputs it as a radio wave signal from the antenna 9.

The control unit 6 has a CPU (central processing unit), and the CPU operates with a clock signal (about 4.8 MHz) generated by the oscillator 7 of the crystal oscillator. The clock signal is frequency-divided from the control unit 6 through the frequency dividing circuit 8 and input to the switching power supply circuit 1 as an external synchronizing signal. The frequency division ratio of the frequency dividing circuit 8 has the first purpose of preventing mutual interference,
It is controlled by a frequency division ratio switching signal output from the control unit 6 as necessary. Information about frequency division switching, such as frequency division switching signal information, is stored in the memory 11. For example, when the clock signal of the control unit 6 is 4.8 MHz, 1/16 (divided signal 3
00 KHz), and in the standby state of the telephone, it is 1/3 of half to avoid mutual interference and further reduce power consumption.
2 (frequency division signal 150 KHz) is controlled by the frequency division ratio switching signal.

The switching power supply circuit 1 regulates the power supply voltage supplied from the battery 10 and supplies a stable voltage to the receiver 2, transmitter 4, and controller 6. Hereinafter, the switching power supply circuit 1 will be described.

FIG. 2 is a diagram showing a configuration example of the switching power supply circuit of the present invention. As shown in the figure, the switching power supply circuit 1 includes a FET (field effect transistor) 1-1, a reactor 1-2, a diode 1-3, a capacitor 1-4, a switching IC 1-5, a resistor 1-6, a capacitor 1-.
7, a resistor 1-8, and a resistor 1-9. The switching IC 1-5 is composed of a triangular wave generation circuit 1-51, a pulse width comparator 1-52, an error amplifier 1-53, and the like.

The voltage supplied from the battery 10 is input to the input terminal S (source) of the FET (field effect transistor) 1-1, pulse width modulated by the signal applied to the gate terminal G, and output terminal D (drain). ), A diode 1-3, a reactor 1-2, a capacitor 1
-4 is smoothed by the smoothing circuit and output as a DC output voltage.

The output voltage divided by the resistors 1-8 and 1-9 is the error amplifier 1-5 of the switching IC 1-5.
In 3, the error signal e is compared with the reference voltage, and the error signal e is amplified by the error amplifier 1-53 and input as one input signal of the pulse width comparator 1-52. On the other hand, the triangular wave generation circuit 1-
The signal a output from 51 is compared with the pulse width comparator 1-52, and the output signal controls the gate of FET1-1 and the output of FET1-1.

FIG. 3 is a diagram showing the operation of the FET according to the pulse width modulation method. The triangular wave generating circuit 1-51 self-oscillates with the resistor 1-6 and the capacitor 1-7 at the time of start-up, and then, in the steady state, the external synchronizing signal (for example, 300 KHz) obtained by dividing the clock signal by the frequency dividing circuit 8 is generated. The synchronized triangular wave signal a is output (see FIG. 3C). When the output voltage becomes higher, the error signal e becomes higher, the output signal time of the pulse width comparator 1-52 becomes shorter, and the ON time of the FET 1-1 becomes shorter (see FIG. 3).
The output voltage can be suppressed. Conversely, when the output voltage becomes low, the ON time of FET1-1 becomes long (see Fig. 3B).
It operates in the direction of increasing the output voltage and keeps the output voltage constant.

As described above, in the switching power supply circuit 1 of the present invention, the clock signal used by the CPU of the control unit 6 as the external synchronization signal is controlled by the frequency division ratio switching signal output from the control unit 6. Since the frequency-divided signal divided by 8 is used, it hardly changes due to changes in environmental conditions such as frequency temperature, and there is no mutual interference with the intermediate frequency of the transmission / reception circuit, causing beat disturbance or sensitivity suppression disturbance. The quality improves. For example, when the clock signal used by the CPU is 4.8 MHz, the frequency of the synchronization signal may be divided into 16 by dividing 4.8 MHz into 300 KHz in the call state of the telephone, and divided into 32 by dividing 4.8 MHz in the standby state of the telephone. In addition to avoiding mutual interference, the power consumption can be reduced to 150 KHz.

In the above embodiment, the control unit 6 outputs the frequency division ratio switching signal, but the present invention is not limited to this. For example, the telephone call state and the standby state of the telephone are set. A detection unit for detecting may be provided, and the frequency division ratio may be switched according to the output of this detection unit.

[0019]

As described above in detail, according to the present invention, the switching frequency signal is synchronized with the divided signal obtained by dividing the clock signal by the dividing circuit, and the dividing ratio of the dividing circuit is the dividing ratio. Since the switching signal is used for switching as needed, the following excellent effects are expected.

(1) Since the clock signal is a fixed frequency signal output from a temperature-compensated crystal oscillator, the frequency hardly fluctuates due to changes in environmental conditions such as temperature, and the frequency of the frequency divider circuit is reduced. If the frequency ratio is appropriately selected, the receiving section does not cause mutual interference with the intermediate frequency signal as in the conventional case, and the communication quality does not deteriorate. Since the frequency division ratio of the frequency dividing circuit is controlled by the frequency division ratio switching signal, when mutual interference occurs, it is possible to easily switch the frequency division ratio to avoid beat interference due to mutual interference.

(2) The frequency division ratio switching signal can be used to switch the frequency division ratio of the frequency divider circuit as necessary to lower the switching frequency, reduce switching loss, and reduce circuit current consumption. Has the effect that it can be extended.

(3) Since the clock signal is used as the synchronizing signal, a synchronizing circuit operated by a separate power source is unnecessary.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration example of a mobile phone using a switching power supply circuit of the present invention.

FIG. 2 is a diagram showing a configuration example of a switching power supply circuit of the present invention.

FIG. 3 is a diagram showing an operation of an FET according to a pulse width modulation method.

[Explanation of symbols]

 1: Switching power supply circuit 1-1: FET (field effect transistor) 1-2: Reactor 1-3: Diode 1-4: Capacitor 1-5: Switching IC 1-51: Triangular wave generation circuit 1-52: Pulse width comparison 1-53: Error amplifier 1-6: Resistor 1-7: Capacitor 1-8: Resistor 1-9: Resistor 2: Receiving part 3: Receiving part 4: Transmitting part 5: Transmitting part 6: Control Part 7: Oscillator 8: Frequency divider circuit 9: Antenna 10: Battery 11: Memory

Claims (3)

[Claims] 1. A switching power supply circuit for a portable telephone, comprising a control unit which operates with a clock signal from a fixed oscillator, and a voltage stabilizing circuit with a switching frequency signal generating means and a pulse width modulation method, wherein the clock signal is A frequency dividing circuit for frequency dividing, the frequency dividing circuit controls the frequency dividing ratio by a frequency dividing ratio switching signal, and the frequency dividing signal obtained by dividing the clock signal by the frequency dividing circuit is the switching frequency signal generating means. A switching power supply circuit for a mobile phone, characterized in that a switching frequency signal is input to the frequency division signal and is synchronized with the frequency division signal. 2. A frequency dividing ratio of the frequency dividing circuit is controlled by selecting the frequency dividing ratio switching signal so that the switching frequency signal does not cause mutual interference with the intermediate frequency of the telephone receiving circuit. A switching power supply circuit for a mobile phone according to claim 1. 3. The frequency division ratio of the frequency dividing circuit is controlled by the first frequency division ratio switching signal to generate the first switching frequency signal when the telephone is in a call state, and the first frequency division ratio is controlled in the standby state of the telephone. To generate a second switching frequency signal lower than the switching frequency signal of
3. The switching power supply circuit for a portable telephone according to claim 2, wherein the frequency division ratio of the frequency division circuit is controlled by the frequency division ratio switching signal.