JPH07274488A - Switching power circuit of portable telephone - Google Patents

Switching power circuit of portable telephone

Info

Publication number
JPH07274488A
JPH07274488A JP8540794A JP8540794A JPH07274488A JP H07274488 A JPH07274488 A JP H07274488A JP 8540794 A JP8540794 A JP 8540794A JP 8540794 A JP8540794 A JP 8540794A JP H07274488 A JPH07274488 A JP H07274488A
Authority
JP
Japan
Prior art keywords
signal
frequency
circuit
switching
dividing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8540794A
Other languages
Japanese (ja)
Inventor
Noriyuki Shirasawa
範之 白澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP8540794A priority Critical patent/JPH07274488A/en
Publication of JPH07274488A publication Critical patent/JPH07274488A/en
Pending legal-status Critical Current

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  • Mobile Radio Communication Systems (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To remove such troubles that the switching frequency fluctuates by the change of environmental conditions such as temperature, etc., and causes mutual interference with the middle frequency signal of a receiver, and that the quality of telephone drops, by synchronizing the switching frequency signal with the dividing signal being made by dividing a clock signal with a dividing circuit. CONSTITUTION:A controller 6 has CPU 6, and the CPU operates with the clock signal generated in the oscillator 7 of a quartz oscillator. This clock signal is divided with a dividing circuit 8, and it is inputted as an external cyclic signal to a switching power circuit 1. And, the switching power circuit 1 adjusts the power voltage supplied from a battery 10, and supplies a receiver 2, a transmitter 4, and the controller 6b with stable voltage. Since the clock signal is a signal of fixed frequency outputted with the oscillator 7 by the quartz oscillator, the frequency hardly fluctuate by the change of environmental condition such as temperature, etc., so if the division rate of the dividing circuit 8 is selected properly, the occurrence of mutual interference with the medium frequency signal in the receiver 2 can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、携帯電話機の受信回路
に受信障害を与えないスイッチング電源回路に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching power supply circuit which does not give a reception failure to a receiving circuit of a mobile phone.

【0002】[0002]

【従来技術】最近の携帯電話機では電池の長寿命化のた
め安定化電源回路としてパルス幅変調方式のスイッチン
グレギュレ−タが使用される場合がある。この場合、ス
イッチングレギュレ−タのスイッチング周波数は静電容
量Cと抵抗Rの時定数CRによる自励発振回路で決定さ
れるものが多い。一般に、携帯電話機の受信信号は感度
及び分離を良くするために第1中間周波信号、第2中間
周波信号に変換され処理される。そこで、前記安定化電
源回路のスイッチングレギュレ−タのスイッチング周波
数及び、その高調波の周波数は送受信回路の周波数とビ
−ト障害等の相互干渉を生じないように設定される。
2. Description of the Related Art In recent mobile phones, a pulse width modulation type switching regulator may be used as a stabilized power supply circuit in order to prolong battery life. In this case, the switching frequency of the switching regulator is often determined by the self-excited oscillation circuit by the time constant CR of the capacitance C and the resistance R. Generally, a reception signal of a mobile phone is converted into a first intermediate frequency signal and a second intermediate frequency signal and processed in order to improve sensitivity and separation. Therefore, the switching frequency of the switching regulator of the stabilized power supply circuit and the frequency of its harmonics are set so as not to cause mutual interference such as beat interference with the frequency of the transmission / reception circuit.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、従来の
自励発振回路を使用したスイッチングレギュレ−タ(安
定化電源回路)では使用するコンデンサの静電容量C及
び抵抗器の抵抗値Rにバラツキがあり、更に、温度等の
環境条件の変化により最悪の場合スイッチング周波数は
±20%くらいの周波数変動があり、その高調波も同様
に変動する。例えばスイッチング周波数を300KHz
に設定すれば±60KHz程度の変動は生じる。
However, in the conventional switching regulator (stabilized power supply circuit) using the self-excited oscillation circuit, there are variations in the electrostatic capacitance C of the capacitor used and the resistance value R of the resistor. Further, in the worst case, the switching frequency fluctuates by about ± 20% due to changes in environmental conditions such as temperature, and its harmonics also fluctuate. For example, the switching frequency is 300 KHz
If set to, a fluctuation of about ± 60 KHz occurs.

【0004】上記スイッチングレギュレ−タのスイッチ
ング周波数やその高調波が携帯電話機の受信回路の中間
周波数(例えば第1中間周波数55MHz、第2中間周
波数450KHz)に一致した場合や近くなった場合、
相互干渉を起こし可聴周波数が生成されビ−ト障害や感
度抑圧障害が起こる可能性があり、受信感度を劣化させ
通話品質の低下や通話不能となる恐れもあると云う問題
があった。
When the switching frequency of the switching regulator or its harmonics coincides with or becomes close to the intermediate frequency (for example, the first intermediate frequency 55 MHz, the second intermediate frequency 450 KHz) of the receiving circuit of the mobile phone,
There is a possibility that mutual interference may occur and an audible frequency may be generated to cause a beat failure or a sensitivity suppression failure, and the reception sensitivity may be deteriorated, resulting in deterioration of speech quality or call failure.

【0005】これを防ぐため電源部の遮蔽やフィルタ等
で対応する方法もあるが大がかりになり構造も複雑化し
コストも増加すると云う問題があった。
In order to prevent this, there is a method of using a power source block or a filter, but there is a problem in that the scale is large and the structure is complicated and the cost is increased.

【0006】本発明は上述の点に鑑みてなされたもの
で、上記問題点を除去し、簡単で受信障害を起こさない
スイッチング電源回路を提供することを目的とする。
The present invention has been made in view of the above points, and an object of the present invention is to provide a switching power supply circuit which eliminates the above problems and is simple and does not cause reception failure.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
本発明は、固定発振器によるクロック信号で動作する制
御部と、スイッチング周波数信号発生手段を有しパルス
幅変調方式による電圧安定化回路を具備する携帯式電話
機のスイッチング電源回路において、図1に示すように
クロック信号を分周する分周回路8を設け、クロック信
号を分周回路8で分周した分周信号を前記スイッチング
周波数信号発生手段(スイッチングIC1−5の三角波
発生回路1−51)に入力しスイッチング周波数信号を
前記分周信号に同期させることを特徴とする。
In order to solve the above-mentioned problems, the present invention comprises a control section which operates by a clock signal by a fixed oscillator, and a voltage stabilizing circuit having a switching frequency signal generating means and a pulse width modulation method. In a switching power supply circuit for a portable telephone, a frequency dividing circuit 8 for dividing a clock signal is provided as shown in FIG. 1, and the frequency dividing signal obtained by dividing the clock signal by the frequency dividing circuit 8 is used as the switching frequency signal generating means. (Triangular wave generation circuit 1-51 of switching IC 1-5) and the switching frequency signal is synchronized with the frequency division signal.

【0008】[0008]

【作用】本発明では、クロック信号を分周回路8で分周
した分周信号にスイッチング周波数信号を同期させるの
で、クロック信号は水晶発振器で出力される固定周波数
の信号であるから、従来のように温度等の環境条件の変
化により周波数が変動することは殆どなくなる。従っ
て、クロック信号を分周回路8で適切に分周すれば受信
部2の中間周波信号と相互干渉を起こすことはなく通話
品質も低下することはなくなる。
In the present invention, since the switching frequency signal is synchronized with the frequency-divided signal obtained by dividing the clock signal by the frequency dividing circuit 8, the clock signal is a fixed frequency signal output from the crystal oscillator. Moreover, the frequency hardly changes due to changes in environmental conditions such as temperature. Therefore, if the frequency dividing circuit 8 appropriately divides the frequency of the clock signal, mutual interference with the intermediate frequency signal of the receiving unit 2 does not occur and the communication quality does not deteriorate.

【0009】[0009]

【実施例】以下本発明の一実施例を図面に基づいて詳細
に説明する。図1は本発明のスイッチング電源回路を使
用した携帯電話機の構成例を示す図である。図示するよ
うに、本発明のスイッチング電源回路を使用した携帯電
話機はスイッチング電源回路1、受信部2、受話器3、
送信部4、送話器5、全体を制御する制御部6、クロッ
ク信号を発生する水晶発振機等の発振器7、クロック信
号を分周する分周回路8、アンテナ9、電池10で構成
される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a diagram showing a configuration example of a mobile phone using the switching power supply circuit of the present invention. As shown in the figure, the mobile phone using the switching power supply circuit of the present invention includes a switching power supply circuit 1, a receiving unit 2, a handset 3,
A transmitter 4, a transmitter 5, a controller 6 for controlling the whole, an oscillator 7 such as a crystal oscillator for generating a clock signal, a frequency dividing circuit 8 for frequency-dividing the clock signal, an antenna 9, and a battery 10. .

【0010】受信部2及び送信部4は制御部6で制御さ
れ、受信部2はアンテナ9より受信した電波信号を第1
中間周波信号、第2中間周波信号に変換復調して受話器
3から音声出力として出力し、送信部4は送話器5から
入力された音声信号を変調しアンテナ9から電波信号と
して出力する。
The receiving unit 2 and the transmitting unit 4 are controlled by the control unit 6, and the receiving unit 2 receives the radio wave signal received from the antenna 9 as a first signal.
The intermediate frequency signal and the second intermediate frequency signal are converted and demodulated and output as a voice output from the handset 3, and the transmitting unit 4 modulates the voice signal input from the handset 5 and outputs it as a radio wave signal from the antenna 9.

【0011】制御部6はCPU(中央処理装置)を有
し、CPUは水晶発振器の発振器7で発生するクロック
信号(4.8MHz程度)で作動する。クロック信号は
制御部6から分周回路8を通して分周され、スイッチン
グ電源回路1へ外部同期信号として入力される。スイッ
チング電源回路1は電池10から供給される電源電圧を
調整し、受信部2、送信部4、制御部6へ安定した電圧
を供給する。以降、スイッチング電源回路1の説明をす
る。
The control unit 6 has a CPU (central processing unit), and the CPU operates with a clock signal (about 4.8 MHz) generated by the oscillator 7 of the crystal oscillator. The clock signal is frequency-divided from the control unit 6 through the frequency dividing circuit 8 and input to the switching power supply circuit 1 as an external synchronizing signal. The switching power supply circuit 1 adjusts the power supply voltage supplied from the battery 10 and supplies a stable voltage to the receiving unit 2, the transmitting unit 4, and the control unit 6. Hereinafter, the switching power supply circuit 1 will be described.

【0012】図2は本発明のスイッチング電源回路の構
成例を示す図である。図示するようにスイッチング電源
回路1はFET(電界効果トランジスタ)1−1、リア
クタ1−2、ダイオ−ド1−3、コンデンサ1−4、ス
イッチングIC1−5、抵抗器1−6、コンデンサ1−
7、抵抗器1−8、抵抗器1−9で構成され、スイッチ
ングIC1−5は三角波発生回路1−51、パルス幅比
較器1−52、誤差増幅器1−53等で構成される。
FIG. 2 is a diagram showing a configuration example of the switching power supply circuit of the present invention. As shown in the figure, the switching power supply circuit 1 includes an FET (field effect transistor) 1-1, a reactor 1-2, a diode 1-3, a capacitor 1-4, a switching IC 1-5, a resistor 1-6, a capacitor 1-.
7, a resistor 1-8, and a resistor 1-9. The switching IC 1-5 is composed of a triangular wave generation circuit 1-51, a pulse width comparator 1-52, an error amplifier 1-53, and the like.

【0013】電池10から供給される電圧はFET(電
界効果トランジスタ)1−1の入力端子S(ソース)に
入力され、ゲ−ト端子Gに印加された信号によりパルス
幅変調されて出力端子D(ドレン)から出力され、更
に、ダイオ−ド1−3、リアクタ1−2、コンデンサ1
−4で構成される平滑回路で平滑され直流出力電圧とし
て出力される。
The voltage supplied from the battery 10 is input to the input terminal S (source) of the FET (field effect transistor) 1-1, pulse width modulated by the signal applied to the gate terminal G, and output terminal D. (Drain), and further, diode 1-3, reactor 1-2, capacitor 1
-4 is smoothed by the smoothing circuit and output as a DC output voltage.

【0014】抵抗器1−8と抵抗器1−9で分圧された
出力電圧はスイッチングIC1−5の誤差増幅器1−5
3で基準電圧と比較され、その誤差信号eは誤差増幅器
1−53で増幅されてパルス幅比較器1−52の一方の
入力信号として入力される。他方、三角波発生回路1−
51から出力された信号aとパルス幅比較器1−52で
比較され、その出力信号はFET1−1のゲ−トを制御
しFET1−1の出力を制御する。
The output voltage divided by the resistors 1-8 and 1-9 is the error amplifier 1-5 of the switching IC 1-5.
In 3, the error signal e is compared with the reference voltage, and the error signal e is amplified by the error amplifier 1-53 and input as one input signal of the pulse width comparator 1-52. On the other hand, the triangular wave generation circuit 1-
The signal a output from 51 is compared with the pulse width comparator 1-52, and the output signal controls the gate of the FET1-1 and the output of the FET1-1.

【0015】図3はパルス幅変調方式によるFETの動
作を示す図である。三角波発生回路1−51は起動時は
抵抗器1−6とコンデンサ1−7で自励発振し、続いて
定常時はクロック信号を分周回路8で分周した外部同期
信号(例えば300KHz)に同期した三角波信号aを
出力する(図3C参照)。出力電圧が高くなると誤差信
号eが高くなり、パルス幅比較器1−52の出力信号時
間は短くなりFET1−1のON時間も短くなり(図3
A参照)出力電圧は抑えられる。逆に出力電圧が低くな
るとFET1−1のON時間が長くなり(図3B参照)
出力電圧が増加する方向に動作し出力電圧を一定に保
つ。
FIG. 3 is a diagram showing the operation of the FET according to the pulse width modulation method. The triangular wave generation circuit 1-51 self-oscillates with the resistor 1-6 and the capacitor 1-7 at the time of start-up, and then, in the steady state, the clock signal is divided into an external synchronizing signal (for example, 300 KHz) by the frequency dividing circuit 8. The synchronized triangular wave signal a is output (see FIG. 3C). When the output voltage becomes higher, the error signal e becomes higher, the output signal time of the pulse width comparator 1-52 becomes shorter, and the ON time of the FET 1-1 becomes shorter (see FIG. 3).
The output voltage can be suppressed. On the contrary, when the output voltage becomes low, the ON time of FET1-1 becomes long (see FIG. 3B).
It operates in the direction of increasing the output voltage and keeps the output voltage constant.

【0016】上述したように本発明のスイッチング電源
回路1は外部同期信号として制御部6のCPUで使用す
るクロック信号を分周回路8で分周した分周信号を使用
するので周波数温度等の環境条件の変化で変動すること
は殆どなく送受信回路の中間周波数と相互干渉を起こし
てビ−ト障害や感度抑圧障害を起こすことも無くなり通
話品質がよくなる。例えばCPUで使用するクロック信
号が4.8MHzの場合、同期信号の周波数は4.8M
Hzを16分割して300KHzとすればよい。
As described above, the switching power supply circuit 1 of the present invention uses the frequency-divided signal obtained by dividing the clock signal used by the CPU of the control unit 6 by the frequency dividing circuit 8 as the external synchronizing signal, so that the environment such as the frequency temperature can be used. There is almost no change due to changes in conditions, and mutual interference with the intermediate frequency of the transmission / reception circuit does not occur, resulting in no beat failure or sensitivity suppression failure, and the speech quality is improved. For example, when the clock signal used by the CPU is 4.8 MHz, the frequency of the synchronization signal is 4.8M.
Hz may be divided into 16 to obtain 300 KHz.

【0017】[0017]

【発明の効果】以上、詳細に説明したように本発明によ
ればクロック信号を分周回路で分周した分周信号にスイ
ッチング周波数信号を同期させるので、下記のような優
れた効果が期待される。 (1)クロック信号は水晶発振器で出力される固定周波
数の信号であるから、温度等の環境条件の変化により周
波数が変動することは殆どなく、分周回路の分周比を適
切に選択すれば受信部で従来のように中間周波信号と相
互干渉を起こすことはなく、通話品質も低下することは
なくなる。
As described above in detail, according to the present invention, the switching frequency signal is synchronized with the frequency-divided signal obtained by frequency-dividing the clock signal by the frequency dividing circuit. Therefore, the following excellent effects are expected. It (1) Since the clock signal is a fixed frequency signal output from the crystal oscillator, the frequency hardly changes due to changes in environmental conditions such as temperature. If the frequency division ratio of the frequency dividing circuit is appropriately selected, Unlike the conventional case, the receiving section does not cause mutual interference with the intermediate frequency signal, and the speech quality does not deteriorate.

【0018】(2)また、同期信号としてクロック信号
を使用するので別電源により動作する同期回路は不要で
ある。
(2) Further, since the clock signal is used as the synchronizing signal, the synchronizing circuit operated by a separate power supply is unnecessary.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のスイッチング電源回路を使用した携帯
電話機の構成例を示す図である。
FIG. 1 is a diagram showing a configuration example of a mobile phone using a switching power supply circuit of the present invention.

【図2】本発明のスイッチング電源回路の構成例を示す
図である。
FIG. 2 is a diagram showing a configuration example of a switching power supply circuit of the present invention.

【図3】パルス幅変調方式によるFETの動作を示す図
である。
FIG. 3 is a diagram showing an operation of an FET according to a pulse width modulation method.

【符号の説明】[Explanation of symbols]

1 スイッチング電源回路 1−1 FET(電界効果トランジスタ) 1−2 リアクタ 1−3 ダイオ−ド 1−4 コンデンサ 1−5 スイッチングIC 1−51 三角波発生回路 1−52 パルス幅比較器 1−53 誤差増幅器 1−6 抵抗器 1−7 コンデンサ 1−8 抵抗器 1−9 抵抗器 2 受信部 3 受話器 4 送信部 5 送話器 6 制御部 7 発振器 8 分周回路 9 アンテナ 10 電池 1 Switching Power Supply Circuit 1-1 FET (Field Effect Transistor) 1-2 Reactor 1-3 Diode 1-4 Capacitor 1-5 Switching IC 1-51 Triangular Wave Generation Circuit 1-52 Pulse Width Comparator 1-53 Error Amplifier 1-6 resistor 1-7 capacitor 1-8 resistor 1-9 resistor 2 receiver 3 receiver 4 transmitter 5 transmitter 6 controller 7 oscillator 8 divider circuit 9 antenna 10 battery

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 固定発振器によるクロック信号で作動す
る制御部と、スイッチング周波数信号発生手段を有しパ
ルス幅変調方式による電圧安定化回路を具備する携帯式
電話機のスイッチング電源回路において、 前記クロック信号を分周する分周回路を設け、前記クロ
ック信号を前記分周回路で分周した分周信号を前記スイ
ッチング周波数信号発生手段に入力しスイッチング周波
数信号を前記分周信号に同期させることを特徴とするス
イッチング電源回路。
1. A switching power supply circuit for a mobile phone, comprising: a control unit that operates with a clock signal from a fixed oscillator; and a voltage stabilizing circuit with a pulse width modulation method that has switching frequency signal generating means. A frequency dividing circuit for frequency dividing is provided, and the frequency dividing signal obtained by dividing the clock signal by the frequency dividing circuit is input to the switching frequency signal generating means to synchronize the switching frequency signal with the frequency dividing signal. Switching power supply circuit.
JP8540794A 1994-03-31 1994-03-31 Switching power circuit of portable telephone Pending JPH07274488A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8540794A JPH07274488A (en) 1994-03-31 1994-03-31 Switching power circuit of portable telephone

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8540794A JPH07274488A (en) 1994-03-31 1994-03-31 Switching power circuit of portable telephone

Publications (1)

Publication Number Publication Date
JPH07274488A true JPH07274488A (en) 1995-10-20

Family

ID=13857950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8540794A Pending JPH07274488A (en) 1994-03-31 1994-03-31 Switching power circuit of portable telephone

Country Status (1)

Country Link
JP (1) JPH07274488A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003088102A (en) * 2001-09-13 2003-03-20 Ricoh Co Ltd Power circuit
CN107528476A (en) * 2017-09-19 2017-12-29 广东水利电力职业技术学院(广东省水利电力技工学校) A kind of low noise power supply circuit of B ultrasound equipment

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003088102A (en) * 2001-09-13 2003-03-20 Ricoh Co Ltd Power circuit
JP4643082B2 (en) * 2001-09-13 2011-03-02 株式会社リコー Power circuit
CN107528476A (en) * 2017-09-19 2017-12-29 广东水利电力职业技术学院(广东省水利电力技工学校) A kind of low noise power supply circuit of B ultrasound equipment
CN107528476B (en) * 2017-09-19 2024-03-05 广东水利电力职业技术学院(广东省水利电力技工学校) Low-noise power supply circuit of B ultrasonic equipment

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