JPH0833055A - Device and method for processing data transmission/ reception of inverter - Google Patents

Abstract

PURPOSE:To improve response while reducing cost and to prevent normal data from being sacrificed just after data error. CONSTITUTION:A communication circuit 200A of an inverter 300A as a representative station serially linked with a host computer 10 is composed of a communication driver 22A, a communication receiver 23A, interfaces 26A and 27A for communication, a data transmitting/receiving part 40A, a data processing part 44A, sockets 28aA and 28bA and plug 29. Communication control and inverter control is composed of a single computer 310 for inverter, high-speed communication with the highest priority of PWM waveform generating processing is enabled by managing the time of a software, and the time for responding is shortened. Further, when there is any control code at the head in the case of reading data, those data are decided as new data. Therefore, even when any abnormal data are mixed, the communication is immediately restarted from the next normal data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission / reception processing device for an inverter that drives an induction motor or the like in accordance with control command data from a host computer, and a processing method thereof.

[0002]

2. Description of the Related Art First, a system configuration of an inverter having a conventional communication device will be described with reference to FIG. FIG. 6 shows that P is obtained by serial communication with the host computer 10.
A plurality of inverters 30A, 30B for generating a WM waveform,
..., induction motors 39A, 39 with 30N connected to each
It is a system block diagram for driving B, ..., 39N. Note that the communication devices 20A, 20B, ..., 20N of each station
Since the inverters 30A, 30B, ..., 30N have the same configuration, in the following description, A, B, and
..., the symbol N is omitted. In FIG. 6, the host computer 10 mainly includes a CPU 11 and a communication driver 12.
And a communication receiver 13. The communication device 20 mainly includes a communication computer 21 having a CPU, a communication driver 22, a communication receiver 23, and a communication interface 2.
6, 27, and the internal configuration of the communication computer 21 includes a data transmission / reception unit 40, a data processing unit 41, an inverter communication unit 42, and the like. The communication device 20 is serially linked to the host computer 10 via communication interfaces 26 and 27. The inverter 30 is mainly composed of an inverter computer 31 having a CPU,
The internal configuration is the inverter-to-inverter communication unit 42 of the communication device 20.
Option communication unit 43, data processing unit 44, inverter control unit 45, and induction motor 3 for data communication with
PW for generating PWM waveform for inverter control of 9
The M waveform generator 46 and the like are included.

In the link operation with the host computer 10, the inverter 30 is equipped with a communication device 20 which is an option for communication with the host computer 10. The communication device 20 communicates with the host computer 10 by the communication device 20. Serially linked through the interfaces 26, 27 for
The required set of the inverter 30 and the induction motor 39 can be added arbitrarily. That is,
As shown in FIG. 6, when there are a plurality of inverters 30, communication devices 20 set to different station numbers A, B, ... 1 and the host computer 10 are time-divisionally connected and controlled. The communication devices 20 are sequentially connected to each other from the communication interface 27 to the communication interface 26, and the terminal device 24 is attached to the termination resistance terminal 24 of the communication device 20 having the last station number N, and the system is terminated. Is configured.

Next, an outline of the operation will be described with reference to the host computer 10.
On the other hand, a case where the communication device 20, the inverter 30, and the induction motor 39 are connected to three units A, B, and N, respectively, will be described with reference to FIG. From the host computer 10,
For a specific inverter 30 to be controlled, FIG.
As shown in, the transmission data having information such as the station number 71 and the command code 72 to be communicated with the specific inverter 30 to be controlled is transmitted with the control code 70, which means the beginning of the data, as the head. The communication device 20 is the inverter 3
It is equipped with a communication computer 21 having its own CPU independent of 0, and when the data transmission / reception unit 40 receives the leading control code 70, it receives the data for the number of bytes corresponding to it. Data continues to be acquired. At this time, since the communication devices 20 having all the station numbers A, B, ..., N are connected, data for other stations will be received, but after the reception is completed, the data processing unit 41 of the communication computer 21 It is determined whether or not the data is for the own station, and if the data is for another station, the data is discarded. Then, if it is the data for the own station, a sum check is performed, and if there is no error, the inverter-to-inverter communication unit 42 of the communication computer 21 according to the command code
The data is transmitted from the inverter 30 side.

The inverter 30 and the communication device 20 are also serially linked, and a clock generated by an inverter computer 31 having its own CPU on the side of the inverter 30 is used to generate an inverter communication part 42 of the communication computer 21 and the inverter computer 31. Data is communicated with the option communication unit 43. Normally, in the inverter 30, the inverter control unit 45 of the inverter computer 31 performs various processes related to the inverter control, but the PWM waveform generation unit 46 surely generates the output waveform at every predetermined cycle. Therefore, it is impossible to read the transmission data from the communication device 20 by an interrupt due to the transmission timing on the communication device 20 side.
That is, the initiative for the data communication timing in this case is entrusted to the inverter 30 side. Only when this data communication is completed, the reception of the data sent from the host computer 10 by the inverter 30 is completed, and when the inverter 30 identifies the data reception completion by the data processing unit 44 of the inverter computer 31, the data is The process for generating the PWM (frequency / voltage) waveform according to the command code is sent to the inverter control unit 45 of the inverter computer 31, and the data processing unit 44 completes the data reception of the commanded station number normally. Data for reply indicating that it was done is created. The created reply data is transferred from the inverter 30 to the communication device 2 in the reverse procedure of the reception.
It is transmitted to the host computer 10 via 0.

Next, an outline of conventional software executed by the inverter control unit 45 of the inverter computer 31 of the inverter 30 will be described with reference to FIG. 7 and with reference to FIG. Here, in FIG. 7, a series of processing routines normally executed by the inverter control unit 45 is eventually divided into a plurality of processing routines of the main 51 to the main 54 by an interrupt 50 by a timer interrupt described later. There is. In FIG. 7, the processing in the inverter control unit 45 of the inverter computer 31 of the inverter 30 in FIG. 6 is performed based on the processing routine from the main 51 to the main 54, which is represented by blocks in the program configuration. Further, the interrupt 50 of FIG. 7 shows a processing routine of the PWM waveform generation unit 46 of the inverter computer 31 of FIG. 6, which is activated by a timer interrupt. That is, because of the interrupt 50 caused by the timer interrupt, as shown in FIG. 7, the series of processing routines is divided into the processing routines of the main 51 to the main 54 at unspecified points. Further, the data transmission / reception processing 56 of FIG. 7 is a processing routine for the option communication unit 43 of the inverter computer 31 of FIG. 6, and the data processing 55 of FIG. 7 is for the data processing unit 44 of the inverter computer 31 of FIG. The data transmission / reception processing 56 and the data processing 55 are positioned in the flow of the main routine.

Next, the processing procedure in the data transmitting / receiving unit 40 of the communication device 20 shown in FIG. 6 will be described based on the flow chart of FIG. 8 in relation to the flow of the entire system shown in FIG. First, in step S1, it is determined whether or not the reception mode is set. If the reception mode is not set, the routine shifts to a routine (not shown) of the transmission process. If it is in the reception mode, the process proceeds to step S2, it is determined whether there is received data from the host computer 10, and if there is no received data, this routine is ended. If there is received data, the process proceeds to step S3, the data is read, and then the process proceeds to step S4. In step S4, it is determined whether or not the own station is in the process of data acquisition at present by the flag of data acquisition. If the flag of data acquisition is set, the process proceeds to step S5, the data is stored and the reception data counter Is incremented. Next, the process proceeds to step S6, where the reception data counter (number of data) is the specified number of data (specified number of bytes).
The processes of steps S1 to S6 are repeated until the number of minutes is reached, and the reception data from the host computer 10 is unconditionally continued to be stored. Then, when the received data counter reaches the specified number of data in step S6, the process proceeds to step S7, the flag being taken in is reset, the received data counter is cleared, and this routine is ended. On the other hand, if the data acquisition flag is not set in step S4, the process proceeds to step S8, it is determined whether the received data is the control code, and if it is the control code, the process proceeds to step S9. Step S9
Then, the reception data is stored, the data acquisition flag is set, the reception data counter is set to 1, and this routine is finished. In step S8, when the received data from the host computer 10 is not the control code, the received data is discarded and the present routine ends.

In this way, in the system configuration shown in FIG. 6, the communication device 20 picks up the received data from the host computer 10 for each byte by interrupt processing, and finishes receiving the specified number of received data. After that, the received data is transmitted from the communication device 20 to the inverter 30 based on the signal from the inverter 30. Here, while the communication device 20 is exchanging data with the host computer 10, the inverter 30 runs its own software regardless of its communication. in this way,
Since the trigger for the data communication between the communication device 20 and the inverter 30 is entrusted to the inverter 30, the PWM waveform generation by the inverter 30 is not disturbed by the data communication between the communication device 20 and the host computer 10. .

[0009]

As described above, according to the above-mentioned prior art, in order to serially communicate the inverter and the host computer, the communication device having the inverter computer on the inverter side and the communication computer independent from each other is provided during the serial communication. Is intervening. At that time, the communication device and the inverter are also serially linked. For this reason, the inverter takes a long time to communicate with the host computer and has a problem that the responsiveness is poor. To solve this problem,
By connecting the communication device and the inverter with a bus instead of a serial link, it is possible to save some time, that is,
Some improvement in responsiveness is expected. However, there is an indispensable amount of communication time due to the presence of the communication device, and it has been desired to further shorten the communication time.

As a measure for shortening the communication time, it is conceivable that a computer having one CPU performs both inverter control and serial communication control. However, it is impossible to simply support the high-speed communication while giving priority to the PWM waveform generation process, which is the original role of the inverter, by simply replacing the computer having the CPU. This is because, in order to process the inverter control and the serial communication control by a computer having one CPU, for example, when the communication modulation rate is 38.4 K baud and one packet of communication data is 11 bits / 1 byte, 1 The time interval for sending byte data is 286 μs [= (11 × 1
0 ⁶ ) / (38.4 × 10 ³ )], and if the data cannot be retrieved during this period, the previous data is destroyed by the next 1-byte data. That is, at this time, since there is a general principle that the interrupt for generating the PWM waveform has the highest priority, the data transmission / reception process must be surely received without using the interrupt process every 286 μs.

Further, in the data transmission / reception section 40 of the communication computer 21 of the communication device 20 shown in FIG.
When the control code 70 of the transmission data shown in is received, as described in the flowchart of FIG.
The processing from 1 to step S6 is repeated, and the reception data from the host computer 10 is unconditionally attempted to be received until the reception data counter (the number of data) reaches the predetermined number of data (the number of specified bytes). Therefore, when the data is incomplete and cut off in the middle like the first data α in the received data shown in FIG. 9B, the internal determination of the data transmitting / receiving unit 40 of the communication computer 21 indicates From the beginning of the next data β shown in 9 (b), the number of bytes of the data that was lacking last time will be read as a part of the previous data. Therefore, since there are two control codes 70 in the initial data of the internal determination shown in FIG. 9C corresponding to the first data α and a part of the next data β shown in FIG. A check error has occurred, and Fig. 9 (b)
In the internal determination of FIG. 9C, the second normally valid data .beta. Is regarded as having no head command, is ignored, and is not read, and the communication restarts from the third data .gamma. Of FIG. 9B. It was. As described above, in the internal determination of the data transmitting / receiving unit 40 of the communication computer 21, there is a problem that even normal data β is lost at the stage of received data.

Therefore, the present invention has been made to solve such a problem, and in serial communication between an inverter and a host computer, there is no need for an optional communication device to intervene between them, and data communication is possible while reducing costs. In addition to improving the responsiveness by shortening the time, even if there is an error in the data, prompt data communication can be restarted without sacrificing the next normal data, and the data transmission / reception processing device of the inverter and its processing The challenge is to provide a method.

[0013]

A data transmission / reception processing device for an inverter according to claim 1 has a communication driver and a communication receiver, and a host computer for outputting control command data, and a serial link for the host computer. Inverter data including a communication interface, a communication driver and a communication receiver, and an inverter having an inverter computer that takes in the control command data from the host computer to the local station and performs inverter control based on the control command data In the transmission / reception processing device, the main routine is divided so that the continuous processing time in the main routine of the processing program of the inverter computer is within a predetermined time, and the data transmission / reception processing within the predetermined time is timed for each divided routine. Manage interrupt wait It is intended to provide a flop.

According to a second aspect of the present invention, in addition to the means of the first aspect, the data transmission / reception processing device for an inverter calculates the predetermined time based on the communication modulation rate and the size of one packet of communication data. It is set so as not to exceed the time.

According to a third aspect of the present invention, there is provided an inverter data transmission / reception processing device, wherein the inverter computer is connected to an induction motor, and the inverter is controlled based on the control command data. The frequency and voltage are output to the induction motor.

A data transmission / reception processing method for an inverter according to claim 4 has a communication driver and a communication receiver,
A host computer that outputs control command data, a communication interface for serially linking with the host computer, a communication driver and a communication receiver, and the control command data for the own station from the host computer are fetched and based on the control command data. And an inverter having an inverter computer that performs inverter control, the determining step of determining the presence or absence of a control code indicating the beginning of data for each 1-byte data reception of the control command data, and the determining step. When the control code is discriminated in step 2, the data communication step of clearing the received data up to that point and starting communication again is performed.

[0017]

According to the present invention, the control command data, which has the communication driver and the communication receiver and is serially linked with the host computer for outputting the control command data, through the communication interface, the communication driver and the communication receiver, is taken in. An inverter data transmission / reception processing device in an inverter having an inverter computer controlled by the inverter according to, and a continuous processing time in a main routine of a program executed by the inverter computer of the inverter within a predetermined time The main routine is divided as described above, and an interrupt standby loop provided for each divided routine manages the time so that the data transmission / reception process is within a predetermined time.

In the data transmission / reception processing device for an inverter according to a second aspect, in addition to the operation of the first aspect, the predetermined time does not exceed the time calculated based on the communication modulation rate and the size of one packet of communication data. By setting to, communication control is performed without destroying the previously captured data with the next data, and the inverter control based on the data is executed.

In the inverter computer in the inverter data transmission / reception processing device of claim 3, in addition to the operation of claim 1, the frequency at which the inverter is controlled based on the control command data from the host computer to the connected induction motor. And the voltage is output.

According to another aspect of the present invention, the control command data, which has a communication driver and a communication receiver, is serially linked to the host computer that outputs the control command data via the communication interface, the communication driver and the communication receiver, and is taken in. A method for transmitting and receiving data of an inverter in an inverter having a computer for inverter control based on the above, wherein in the determining step, the presence or absence of a control code indicating the beginning of data is received for each 1-byte data reception of the control command data. To be determined. Then, when this control code is present, it is regarded as new reception data in the data communication step, the reception data up to that point is cleared, and communication is started.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A data transmission / reception processing device for an inverter and a processing method thereof according to the present invention will be described below with reference to specific embodiments. 1 shows a plurality of inverters 300A, 300B, ..., 300 having station numbers A, B, ..., N in an inverter data transmission / reception processing apparatus according to an embodiment of the present invention.
FIG. 4 is a configuration diagram for PWM driving the induction motors 39A, 39B, ..., 39N connected to each N by serial communication with the host computer 10. Since the inverters 300A, 300B, ..., 300N of each station have the same configuration, the station numbers A, B, and
..., the symbol N is omitted. Also, the same reference numerals and symbols are given to those having the same configurations or corresponding portions as those of the above-described conventional apparatus. In FIG. 1, 10
Is a host computer, and the host computer 10 is mainly
It is composed of a CPU 11, a communication driver 12, and a communication receiver 13. 300 is an inverter, and the inverter 30
Reference numeral 0 mainly includes an inverter computer 310 having a single CPU, a communication driver 22, a communication receiver 23, and communication interfaces 26 and 27. The internal configuration of the communication computer 310 includes a data transmission / reception unit 40 and a data processing unit 44. , Inverter control unit 45 and induction motor 39
PWM to generate PWM waveform for inverter control
The waveform generator 46 and the like are included.

The inverter 300 has its own communication circuit 200 for link operation with the host computer 10,
The inverter 300 is serially linked to the host computer 10 via the communication circuit 200. That is, FIG.
As shown in, when there are a plurality of inverters 300,
One of the communication circuits 200 set to different station numbers A, B, ..., N and the host computer 10 are time-divisionally connected and controlled. The communication circuits 200 are sequentially connected to each other from the communication interface 27 to the communication interface 26, and the plug 29 is attached to the socket 28a side of the communication circuit 200 of the last station number N, and the termination process is performed to configure the system. ing.

Next, the outline of the operation between the host computer 10 and the inverter 300 will be described with reference to FIGS. 1 and 9. In FIG. 1, the communication circuit 200 is connected to the communication driver 12 and the communication receiver 13 of the host computer 10 and the communication receiver 23 and the communication driver 22 via the communication interface 26. Inverter 300 serially linked from the host computer 10
On the other hand, as shown in FIG. 9A, transmission data having information such as a station code 71 and a command code 72 that specify a specific inverter to be controlled, starting with a control code 70 that means the beginning of the data. Will be sent. Communication circuit 20
0 and the inverter 300 are provided with an inverter computer 310 having a shared CPU, and when the data transmission / reception unit 40 of the inverter computer 310 receives the control code 70 at the head of the transmission data, it responds accordingly. Data is continuously fetched until the number of bytes of data is received. Since the communication circuits 200 of all station numbers A, B, ..., N are connected, the data transmitted from the host computer 10 to other stations will be received, but after the reception is completed, the data processing unit 44 of the inverter computer 310. Then, it is judged whether or not the transmission data is the transmission data for the own station, and if it is the transmission data for another station, it is discarded. If it is transmission data for your station, check the sum,
If there is no error, it is sent as received data to the inverter control unit 45 of the inverter computer 310 according to the command code, and an output waveform is generated by the PWM waveform generation unit 46 at every predetermined cycle, and according to this output waveform. Induction motor 39
Will be controlled.

Only after this data communication is completed, the inverter 30 for the data sent from the host computer 10
When the data processing unit 44 identifies that the data reception is completed, the inverter 300 starts the process according to the command code, and the return data indicating that the commanded station number is normally received. To create. The created reply data is transmitted to the host computer 10 via the communication circuit 200 of the inverter 300 in the reverse procedure of the reception. Thus, in the inverter computer 310,
By using one that has a serial communication function,
No communication option is required, and the communication circuit 200
Are built in and integrated in the inverter 300.

Next, the inverter 3 in the apparatus of this embodiment
00 will be described as to whether data communication with the host computer 10 and PWM waveform generation are executed without error by only a single CPU of the inverter computer 310. First, the internal processing of the inverter 300 will be described with reference to FIGS. 2 and 3. FIG. 2 is a schematic diagram showing an outline of software executed by the inverter control unit 45 of the inverter computer 310 of the inverter 300 of FIG. Here, in FIG. 2, a series of processing routines normally executed by the inverter control unit 45 is divided into a plurality of main A61 to main D64 processing routines by an interrupt standby loop 66 described later. As described above, the communication modulation rate 38.
In order to realize 4 K baud, the inverter control unit 45 of the inverter computer 310 of the inverter 300 must read 1-byte data every 286 μs.
Therefore, the interrupt 6 that performs the PWM waveform generation process
The time t0 of 0 is designed to be within 286 μs (t0 <286 μs), and further divided so that the continuous processing time of the main routine (main A61 to main D64) of the inverter control program is within 286 μs.
The main A61 to main D64 shown in FIG. 2 are 286 μs.
It is each block of the main routine divided so as to be within (t1, t2, t3, t4 <286 μs).

At the end of each block, an interrupt waiting loop 66 for performing an interrupt waiting process for waiting for the interrupt 60 including a data transmission / reception processing routine, as shown in steps S101 to S103 of FIG. It is set. In this way, by providing a data transmission / reception processing subroutine (step S101 and step S103 in FIG. 3) for transmitting / receiving 1-byte data in the interrupt waiting loop 66 and at the place where the interrupt processing is extracted, the 286 μs is reached. The subroutine call is executed at least once, and the communication modulation speed 38.
No data is missed when receiving 4K baud data. Further, as shown in FIG. 2, by providing the data processing routine 65 at several places in the divided inverter control section, it is possible to shorten the response time until the data processing after the reception is completed.

Next, the data transmitting / receiving section 4 of the communication circuit 200
The procedure of the data transmission / reception process in 0 will be described with reference to the flow of the operation of the entire system shown in FIG. First, in step S201, it is determined whether or not the reception mode is set, and if it is not the reception mode, the process proceeds to a routine (not shown) of the transmission process. If it is in the reception mode, the process proceeds to step S202, it is determined whether there is received data from the host computer 10, and if there is no received data, this routine ends. If there is received data, the process proceeds to step S203, the data is read, and then the process proceeds to step S204. In step S204, it is determined whether the received data is a control code,
If it is a control code, the process proceeds to step S205. In step S205, the data is stored, the data acquisition flag is set, the reception data counter is set to 1, and this routine ends.

On the other hand, when the data received in step S204 is not the control code, step S20
If the flag indicating that the data is being captured is currently set and the flag indicating that the data is being captured is set, the process proceeds to step S207 and the received data counter stores the data. Incremented. Next, the process proceeds to step S208, and the processes of steps S201 to S208 are repeated until the reception data counter (data count) reaches the specified data count (specified byte count), and unconditional reception from the host computer 10 is performed. Data will continue to be stored. Then, when the received data counter reaches the specified number of data in step S208, the process proceeds to step S209, the flag being taken in is reset, the received data counter is cleared, and this routine is ended. It should be noted that if the flag indicating that the data is being fetched is not set in step S206, this routine is ended.

As described above, in the system configuration shown in FIG. 1, every time the data transmission / reception unit 40 of the communication circuit 200 of the inverter 300 reads the received data from the host computer 10, whether the control code is the head of the data or not. Since it is determined that the control code is unconditionally started to be read as the head data, as shown in FIG. 9C as internal determination of the conventional apparatus, the control code is part of the middle of the previous data. Is never read as.

Here, the termination process of the communication circuit 200N shown in FIG. 1 will be described with reference to FIG. The connection between the communication devices is the same as in the conventional example, but the terminating resistance portions are sockets 28a and 28b. As shown in FIG. 5, the plug 29 is internally short-circuited, the socket 28b is for dummy, the sockets 28a and 28b are insulated from each other, and the plug 29 can be mounted on either side. Here, if the plug 29 is attached to the socket 28a side, the terminating resistance is short-circuited, and if removed, it is opened. If the terminating resistor is unnecessary, the plug 29 may be removed, and the plug 29 may be attached to the dummy socket 28b to prevent loss.

As described above, the data transmission / reception processing device for the inverter according to the embodiment of the present invention has the communication driver 12 and the communication receiver 13, and outputs the control command data to the host computer 10, the host computer 10 and the serial link. The communication interfaces 26 and 27, the communication driver 22 and the communication receiver 23 for operating the control command data for the own station from the host computer 10, and the inverter computer 310 that performs inverter control based on the control command data. And a continuous processing time in the main routine of the program of the inverter computer 310 is 286 μs.
The main routine is divided so as to be within a predetermined time to be less than, and the divided main routine A is a processing routine.
An embodiment may be provided in which an interrupt standby loop 66 for time-controlling the data transmission / reception processing within the predetermined time is provided for each divided routine including 61, main B62, main C63, main D64.

Therefore, in the inverter 300, a program for high speed communication with the host computer 10 serially linked by the inverter computer 310 via the communication driver 22, the communication receiver 23, and the communication interface 26 and an inverter control program for generating a PWM waveform is provided. To be executed. At this time, in the inverter computer 310, the main routine of the program is executed by the main A61, the main B62, and the main routine of the program so that the continuous processing time in the main routine of the program is less than 286 μs.
The main C63 and the main D64 are divided, and an interrupt standby loop 66 is provided for each of the divided routines to time-control data transmission / reception processing within a predetermined time.

Therefore, since the inverter computer 310 of the inverter 300 directly takes in the control command data from the serially linked host computer 10 within a predetermined time, the communication time is shortened and the content of the received data is not destroyed. Be accurate.

In the above embodiment, the predetermined time does not exceed 286 μs, which is the time calculated based on the communication modulation rate of 38.4 K baud and the size of one packet of communication data of 11 bits / 1 byte. Can be set to.

Therefore, the previously fetched data is communication-controlled without being destroyed by the next data, and the inverter control based on the data is executed.

In addition, the above-described embodiment can be an embodiment in which the inverter computer 310 is connected to the induction motor 39 and the frequency and voltage controlled by the inverter based on the control command data are output to the induction motor 39. .

In this way, the host computer 10 is directly connected to the inverter computer 310 of the above-described inverter 300, which is serially linked, so that the induction motor 39 is connected.
The PWM control of is fast and accurate.

Further, in the above embodiment, the host computer 10 having the communication driver 12 and the communication receiver 13 for outputting the control command data, the communication interfaces 26 and 27 for serially linking with the host computer 10, and the communication driver. Data transmission / reception processing of an inverter equipped with an inverter 300 including a control command data 22 and a communication receiver 23 for the own station from the host computer 10, and an inverter computer 310 that performs inverter control based on the control command data. In the method, a determination step achieved in step S204 of the data transmission / reception process of FIG. 4 for determining the presence or absence of a control code indicating the beginning of data every time 1-byte data of the control command data is received, and control in the determination step Once the code is determined, the previous Step data transmission and reception processing of FIG. 4 which again communicates begins with clearing signal data S20
And the data communication process achieved in 5.

Therefore, every time the control code at the beginning of the received data is read, the data contents up to that point are cleared and communication is started as new received data.

Therefore, the data having the control code at the head is not read as a part of the previous data, and the communication is promptly started from the normal received data immediately after the incomplete data is received, so that the high speed operation is possible. Communication becomes possible.

[0041]

As described above, according to the data transmission / reception processing device for an inverter of the first aspect, data communication is performed with the host computer, and the communication control and inverter control programs are executed by the inverter computer. At this time, the main routine is divided so that the continuous processing time in the main routine of the program by the inverter computer is within a predetermined time corresponding to the communication modulation speed, and the interrupt standby loop provided for each divided routine Time management is performed so that the data transmission / reception process is performed within a predetermined time. Therefore, the control command data is surely taken in by the inverter computer having a single CPU within a predetermined time, and communication control is performed so that the previous data is not destroyed by the next data, and the data is taken in. Inverter control is executed based on the control command data. As a result, a communication device for controlling transmission and reception of control command data, which is conventionally interposed between the host computer and the inverter, is not required and cost can be reduced.
By shortening and simplifying the communication path, no extra time is required for exchanging data, so that the responsiveness of communication can be greatly improved. Further, since the normal control command data from the host computer is surely taken into the predetermined inverter computer without being ignored, the data communication time can be shortened.

According to the inverter data transmission / reception processing device of claim 2, in addition to the effect of claim 1, the predetermined time exceeds the time calculated based on the communication modulation speed and the size of one packet of communication data. By setting so that it does not exist, the contents of the control command data from the host computer to the inverter can be surely transmitted at high speed.

According to the data transmission / reception processing device for an inverter of claim 3, as described in the effect of claim 1, the control command data from the host computer is transmitted at high speed to the inverter computer, so that the inverter is processed. The frequency and voltage output controlled by the inverter to the induction motor connected to the computer can be made high speed.

According to the data transmission / reception processing method for an inverter of claim 4, in the data link with the host computer in the discrimination step, it is discriminated whether or not there is a control code indicating the head of the data every reception of one byte of the control command data. To be done. Then, if there is a control code in the data communication step, the received data up to that point is cleared as new received data and communication is started. As a result, it is possible to quickly resume normal communication by determining whether the received data is the control code after the incomplete data is received due to communication abnormality or the like.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a data transmission / reception processing device of an inverter according to an embodiment of the present invention.

FIG. 2 is a program configuration diagram in an inverter computer of a data transmission / reception processing device for an inverter according to an embodiment of the present invention.

FIG. 3 is a flowchart showing a procedure of an interrupt standby process used in the inverter computer of the inverter data transmission / reception processing apparatus according to the embodiment of the present invention.

FIG. 4 is a flow chart showing a procedure of data transmission / reception processing used in an inverter computer of an inverter data transmission / reception processing apparatus according to an embodiment of the present invention.

FIG. 5 is a diagram showing a terminating resistor plug of the inverter in the inverter data transmission / reception processing apparatus according to the first embodiment of the present invention.

FIG. 6 is a block diagram showing a serial link state between an inverter equipped with a conventional communication device and a host computer.

FIG. 7 is a program configuration diagram of an inverter including a conventional communication device.

FIG. 8 is a flowchart showing a procedure of data transmission / reception processing used in an inverter equipped with a conventional communication device.

FIG. 9 is an explanatory diagram showing a state of data analysis for incomplete data with trailing edges inside a conventional communication device.

[Explanation of symbols]

10 host computer, 11 CP (of host computer)
U, 12 communication driver, 13 communication receiver, 22
A, 22B, 22N communication driver, 23A, 23B,
23N communication receiver, 26A, 26B, 26N, 27
A, 27B, 27N communication interface, 28aA,
28bA, 28aB, 28bB, 28aN, 28bN
Socket, 29 plug, 39A, 39B, 39N induction motor, 200A, 200B, 200N communication circuit,
300A, 300B, 300N inverter, 310
A, 310B, 310N Inverter computer, 40
A, 40B, 40N data transmitter / receiver, 44A, 44
B, 44N data processing unit, 45A, 45B, 45N
Inverter controller, 46A, 46B, 46N PWM waveform generator, 60 interrupt, 61 main A, 6
2 Main B, 63 Main C, 64 Main D, 66
Interrupt wait loop, 70 control code.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H04L 29/02 // H02M 7/48 J 9181-5H

Claims (4)

[Claims] 1. A communication driver and a communication receiver are provided,
A host computer that outputs control command data, a communication interface for serially linking with the host computer, a communication driver and a communication receiver, and the control command data for the own station from the host computer are fetched and based on the control command data. In an inverter data transmission / reception processing device including an inverter having an inverter computer that performs inverter control, the main routine is configured so that a continuous processing time in a main routine of the program for the inverter is within a predetermined time. A data transmission / reception processing device for an inverter, characterized by comprising an interrupt standby loop for dividing, and for each division routine, managing the data transmission / reception processing within the predetermined time. 2. The data transmission / reception of the inverter according to claim 1, wherein the predetermined time is set so as not to exceed a time calculated based on a communication modulation rate and a size of one packet of communication data. Processing equipment. 3. The inverter computer according to claim 1, wherein the inverter computer is connected to an induction motor and outputs a frequency and a voltage controlled by the inverter based on the control command data to the induction motor. Data transmission / reception processing device. 4. A communication driver and a communication receiver are provided,
A host computer that outputs control command data, a communication interface for serially linking with the host computer, a communication driver and a communication receiver, and the control command data for the own station from the host computer are fetched and based on the control command data. A data transmission / reception processing method of an inverter having an inverter computer for controlling the inverter by means of an inverter, and a step of determining the presence or absence of a control code indicating the beginning of the data every reception of 1-byte data of the control command data. And a data communication step of clearing received data up to that point and restarting communication when the control code is judged in the judging step.