JPH08330270A - Method of etching compound semiconductor substrate - Google Patents

Method of etching compound semiconductor substrate

Info

Publication number
JPH08330270A
JPH08330270A JP7157194A JP15719495A JPH08330270A JP H08330270 A JPH08330270 A JP H08330270A JP 7157194 A JP7157194 A JP 7157194A JP 15719495 A JP15719495 A JP 15719495A JP H08330270 A JPH08330270 A JP H08330270A
Authority
JP
Japan
Prior art keywords
compound semiconductor
semiconductor substrate
etching
container
etching solution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7157194A
Other languages
Japanese (ja)
Inventor
Bunji Hisamori
久森文詞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
New Japan Radio Co Ltd
Original Assignee
New Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by New Japan Radio Co Ltd filed Critical New Japan Radio Co Ltd
Priority to JP7157194A priority Critical patent/JPH08330270A/en
Publication of JPH08330270A publication Critical patent/JPH08330270A/en
Pending legal-status Critical Current

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  • Weting (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

PURPOSE: To provide an etching method by which a uniform etching thickness can be obtained, when etching a compound semiconductor substrate, using wet etchant. CONSTITUTION: Etching is performed by performing the process of soaking a compound semiconductor substrate by fixing a compound semiconductor substrate in a container charged with etchant, or the like consisting of mixed liquid among sulfuric acid, hydrogen peroxide solution, and water, and tilting or sliding the container 4 thereby shifting the etchant 4, and the process of exposing it to atmosphere repeatedly.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、化合物半導体基板の湿
式エッチング方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wet etching method for compound semiconductor substrates.

【0002】[0002]

【従来の技術】ガリウム砒素高電力電界効果トランジス
タでは、動作時に発生する熱を、半導体チップ裏面に接
触させた放熱体に発散させる。そのため、半導体チップ
自体の厚さも、通常100ミクロン程度の厚さに薄膜化
する。この薄膜化の工程は、硫酸、過酸化水素水、水の
混合液などを用いた湿式エッチングにより行われる。
2. Description of the Related Art In a gallium arsenide high power field effect transistor, heat generated during operation is dissipated to a heat radiator in contact with the back surface of a semiconductor chip. Therefore, the thickness of the semiconductor chip itself is usually reduced to about 100 μm. This thinning step is performed by wet etching using sulfuric acid, hydrogen peroxide solution, a mixed solution of water and the like.

【0003】従来の薄膜化工程は、図3に示すように、
表面に高電力電界効果トランジスタが形成された化合物
半導体基板1の表面を保護するため、耐薬品性ワックス
2により支持板3に接着させ、被エッチング面を露出さ
せる(図3A)。この状態で、容器4内に充填した硫
酸、過酸化水素水、水を体積比3:1:1の割合で混合
したエッチング液5に浸漬し、露出している化合物半導
体基板1の裏面側をエッチング除去する。このときエッ
チング液は、30℃程度に加温しておき、静止状態でエ
ッチングを行う(図3B)。
The conventional thin film forming process is as shown in FIG.
In order to protect the surface of the compound semiconductor substrate 1 on which the high power field effect transistor is formed, the surface to be etched is exposed by adhering it to the support plate 3 with the chemical resistant wax 2. In this state, the exposed rear surface of the compound semiconductor substrate 1 is immersed in an etching solution 5 in which sulfuric acid, hydrogen peroxide solution and water mixed in a container 4 are mixed at a volume ratio of 3: 1: 1. Remove by etching. At this time, the etching liquid is heated to about 30 ° C. and etching is performed in a stationary state (FIG. 3B).

【0004】このような従来のエッチング方法では、エ
ッチング液を静止状態で行うため、化合物半導体基板と
エッチング液との化学反応により生ずる反応熱によっ
て、エッチング液の対流が不均一におこり、エッチング
液の置換にムラが生じ、エッチング厚さのばらつきが生
じていた。通常400ミクロン程度の厚さの化合物半導
体基板1を、100ミクロン程度の厚さまでエッチング
する場合、化合物半導体基板面内で、エッチング後の厚
さが、±20〜25%の範囲でばらついていた。このよ
うなエッチングを行った場合、半導体チップの厚さにば
らつきが生じ、組立工程の不良の原因となったり、素子
動作時の動作温度のばらつきが発生し、歩留まり低下の
原因となっていた。
In such a conventional etching method, since the etching solution is kept stationary, the reaction heat generated by the chemical reaction between the compound semiconductor substrate and the etching solution causes non-uniform convection of the etching solution, and the etching solution There was unevenness in the substitution, and the etching thickness varied. Usually, when the compound semiconductor substrate 1 having a thickness of about 400 μm is etched to a thickness of about 100 μm, the thickness after etching varies within the range of ± 20 to 25% within the surface of the compound semiconductor substrate. When such etching is performed, variations in the thickness of the semiconductor chips occur, which causes defects in the assembly process, and variations in operating temperature during element operation, resulting in lower yield.

【0005】[0005]

【発明が解決しようとする課題】従来のエッチング方法
では、静止状態でエッチングを行うため、エッチング厚
さのばらつきが生じていた。本発明は上記問題点を解決
するため、エッチング厚さが均一となるエッチング方法
を提供することを目的とする。
In the conventional etching method, since etching is performed in a stationary state, variations in etching thickness occur. In order to solve the above problems, it is an object of the present invention to provide an etching method with which the etching thickness is uniform.

【0006】[0006]

【課題を解決するための手段】本発明は上記目的を達成
するため、化合物半導体基板を湿式のエッチング液を用
いてエッチングするに際し、前記エッチング液を充填し
た容器内に前記化合物半導体基板を配置し、前記エッチ
ング液を移動させることにより、前記エッチング液に前
記化合物半導体基板を浸漬する工程と、該化合物半導体
基板を雰囲気に露出する工程とを繰り返し行うことを特
徴とするものである。
In order to achieve the above object, the present invention provides a method of etching a compound semiconductor substrate using a wet etching solution, wherein the compound semiconductor substrate is placed in a container filled with the etching solution. The step of immersing the compound semiconductor substrate in the etching solution by moving the etching solution and the step of exposing the compound semiconductor substrate to the atmosphere are repeated.

【0007】[0007]

【実施例】以下、本発明の第1の実施例を、図1により
説明する。図3に示した従来例同様、表面に形成した高
電力電界効果トランジスタ等の半導体装置を保護するた
め支持板上に耐薬品性ワックスによって接着された化合
物半導体基板1を、容器4内に固定する。容器内には、
硫酸、過酸化水素水、水を体積比3:1:1の割合で混
合したエッチング液5が充填されている。ここで、エッ
チングを開始する前は、化合物半導体基板1がエッチン
グ液5と接触しないように、容器を傾けておく(図1
A)。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIG. Similar to the conventional example shown in FIG. 3, a compound semiconductor substrate 1 adhered on a supporting plate by a chemical resistant wax to protect a semiconductor device such as a high power field effect transistor formed on the surface is fixed in a container 4. . In the container,
An etching solution 5 in which sulfuric acid, hydrogen peroxide solution, and water are mixed at a volume ratio of 3: 1: 1 is filled. Here, before starting the etching, the container is tilted so that the compound semiconductor substrate 1 does not come into contact with the etching solution 5 (FIG. 1).
A).

【0008】容器4を反対側に傾けることにより、化合
物半導体基板1をエッチング液5に浸漬させ、エッチン
グを開始する(図1B)。その後、さらに容器を反対側
に傾けることによって、化合物半導体基板1を雰囲気に
露出させる(図1C)。ここで雰囲気に露出させること
によって、化合物半導体基板1のエッチングに使用され
たエッチング液5を、化合物半導体基板1上から完全に
除去することができる。また、エッチング液が容器4内
で、化合物半導体基板1が固定されている側の反対側に
移動することによって、エッチング液が十分に攪拌され
る。この浸漬、露出は、1秒間に1回ずつ浸漬と露出が
繰り返される程度の速さで行った。なお、この速さは、
化合物半導体基板の大きさ、容器の大きさ、エッチング
液の量等に応じ、適宜選択することができる。
By tilting the container 4 to the opposite side, the compound semiconductor substrate 1 is dipped in the etching solution 5 to start etching (FIG. 1B). Then, the container is further tilted to the opposite side to expose the compound semiconductor substrate 1 to the atmosphere (FIG. 1C). By exposing to the atmosphere here, the etching solution 5 used for etching the compound semiconductor substrate 1 can be completely removed from the compound semiconductor substrate 1. Further, the etching solution moves to the side opposite to the side where the compound semiconductor substrate 1 is fixed in the container 4, whereby the etching solution is sufficiently stirred. The immersion and the exposure were performed at such a speed that the immersion and the exposure were repeated once per second. In addition, this speed is
It can be appropriately selected depending on the size of the compound semiconductor substrate, the size of the container, the amount of the etching solution, and the like.

【0009】容器4を動かし、それに従いエッチング液
5を移動させる方法は、図1に示す方法に限らない。図
2に第2の実施例を示す。図2に示す方法は、容器を左
右に傾斜させる代わりに、容器4を水平のまま、左右に
スライドさせる方法である。この方法でも、容器内4に
化合物半導体基板1を固定する際には、容器4を傾斜さ
せておき、化合物半導体基板1を固定した後(図2
A)、容器を水平に戻し、左右にスライドさせれば良
い。図2Bに示すように、容器4を矢印方向にスライド
させることによって、エッチング液5を化合物半導体基
板1上に移動させる。次に、図2Cの矢印方向に容器4
をスライドさせることによって、エッチング液5を化合
物半導体基板1上から移動させ、化合物半導体基板1を
雰囲気に露出させることができる。このような方法を採
用する場合も、第1の実施例同様、エッチング液5の攪
拌を十分に行うことができる。さらに、容器4を左右に
スライドさせる代わりに、容器4を円軌道あるいは楕円
軌道を描きながら、傾斜あるいはスライドさせることに
よって、エッチング液を移動させることも可能である。
また、化合物半導体基板1は、容器4の底部に平行に固
定する必要はなく、垂直に固定する方法を採用すること
も可能である。
The method of moving the container 4 and moving the etching solution 5 accordingly is not limited to the method shown in FIG. FIG. 2 shows a second embodiment. The method shown in FIG. 2 is a method of sliding the container 4 horizontally while keeping the container 4 horizontal, instead of tilting the container left and right. Also in this method, when the compound semiconductor substrate 1 is fixed in the container 4, the container 4 is tilted and the compound semiconductor substrate 1 is fixed (see FIG. 2).
A), the container should be returned horizontally and slid to the left and right. As shown in FIG. 2B, the container 4 is slid in the direction of the arrow to move the etching liquid 5 onto the compound semiconductor substrate 1. Next, in the direction of the arrow in FIG.
By sliding, the etching solution 5 can be moved from above the compound semiconductor substrate 1 to expose the compound semiconductor substrate 1 to the atmosphere. Even when such a method is adopted, the etching liquid 5 can be sufficiently stirred as in the first embodiment. Further, instead of sliding the container 4 to the left and right, it is possible to move the etching solution by tilting or sliding the container 4 while drawing a circular orbit or an elliptical orbit.
Further, the compound semiconductor substrate 1 does not need to be fixed in parallel to the bottom of the container 4, and it is possible to adopt a method of fixing vertically.

【0010】以上の方法によりエッチングを行った結
果、従来方法では±20〜25%のエッチング厚さのば
らつきがあったものが、±5%以内のばらつきに抑える
ことができた。これは、本発明は、化合物半導体基板1
のエッチングに関与したエッチング液5を速やかに除去
することができ、エッチング液の攪拌を十分に行うこと
ができること、また、エッチングが間欠的に行われるた
め、エッチング液の昇温が抑えられ、エッチング速度が
部分的に速くなることがないためと考えられる。
As a result of etching by the above method, the variation in etching thickness of ± 20 to 25% in the conventional method can be suppressed to within ± 5%. This is because the present invention is a compound semiconductor substrate 1
The etching solution 5 involved in the etching can be promptly removed, the etching solution can be sufficiently stirred, and since the etching is performed intermittently, the temperature rise of the etching solution can be suppressed, It is thought that this is because the speed does not increase partially.

【0011】[0011]

【発明の効果】以上説明したように、本発明のエッチン
グ方法によれば、エッチング厚さのばらつきを、従来の
4分の1から5分の1に抑えることができた。これによ
り、半導体チップの厚さを均一に形成することができ、
ガリウム砒素高電力電界効果トランジスタの製造工程に
採用した際には、歩留まり良く製造することができる。
As described above, according to the etching method of the present invention, the variation in the etching thickness can be suppressed to 1/4 to 1/5 of the conventional one. Thereby, the thickness of the semiconductor chip can be formed uniformly,
When adopted in the manufacturing process of a gallium arsenide high power field effect transistor, it can be manufactured with a high yield.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を説明する説明図であ
る。
FIG. 1 is an explanatory diagram illustrating a first embodiment of the present invention.

【図2】本発明の第2の実施例を説明する説明図であ
る。
FIG. 2 is an explanatory diagram illustrating a second embodiment of the present invention.

【図3】従来のエッチング方法を説明する説明図であ
る。
FIG. 3 is an explanatory diagram illustrating a conventional etching method.

【符号の説明】[Explanation of symbols]

1 化合物半導体基板 2 耐薬品性ワックス 3 支持板 4 容器 5 エッチング液 1 Compound Semiconductor Substrate 2 Chemical Resistant Wax 3 Support Plate 4 Container 5 Etching Solution

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 化合物半導体基板を湿式のエッチング液
を用いてエッチングするに際し、前記エッチング液を充
填した容器内に前記化合物半導体基板を配置し、前記エ
ッチング液を移動させることにより、前記エッチング液
に前記化合物半導体基板を浸漬する工程と、該化合物半
導体基板を雰囲気に露出する工程とを繰り返し行うこと
を特徴とする化合物半導体ウエハのエッチング方法。
1. When a compound semiconductor substrate is etched using a wet etching solution, the compound semiconductor substrate is placed in a container filled with the etching solution, and the etching solution is moved to obtain the etching solution. A method for etching a compound semiconductor wafer, which comprises repeating the step of immersing the compound semiconductor substrate and the step of exposing the compound semiconductor substrate to the atmosphere.
JP7157194A 1995-05-31 1995-05-31 Method of etching compound semiconductor substrate Pending JPH08330270A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7157194A JPH08330270A (en) 1995-05-31 1995-05-31 Method of etching compound semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7157194A JPH08330270A (en) 1995-05-31 1995-05-31 Method of etching compound semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH08330270A true JPH08330270A (en) 1996-12-13

Family

ID=15644262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7157194A Pending JPH08330270A (en) 1995-05-31 1995-05-31 Method of etching compound semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH08330270A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030056691A (en) * 2001-12-28 2003-07-04 삼성전자주식회사 Etching device and method for inclining wafer
CN102315092A (en) * 2011-09-09 2012-01-11 深圳市华星光电技术有限公司 Wet etching apparatus and method thereof
CN103811373A (en) * 2012-11-06 2014-05-21 沈阳芯源微电子设备有限公司 Process cup of monolithic wet processing device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030056691A (en) * 2001-12-28 2003-07-04 삼성전자주식회사 Etching device and method for inclining wafer
CN102315092A (en) * 2011-09-09 2012-01-11 深圳市华星光电技术有限公司 Wet etching apparatus and method thereof
CN103811373A (en) * 2012-11-06 2014-05-21 沈阳芯源微电子设备有限公司 Process cup of monolithic wet processing device

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