JPH08328621A - Controller - Google Patents

Abstract

PURPOSE: To eliminate the useless program storage area which is useless also for a user who does net execute an interruption processing. CONSTITUTION: In the RAM 13 and the ROM 14 of a main body unit 1, the program for an interruption processing is not stored. Interruption input units 2 and 3 generating interruptions are provided with RAM 22 and 32 storing interruption user programs and ROM 23 and 33 preliminarily storing interruption control programs performing the controls of the interruptions, respectively. When an interruption is performed for the main body unit 1 from the interruption input generation part 21 of an interruption input unit 2, the MPU 11 of the main body unit 1 executes the interruption control program stored in the ROM 23 of the interruption input unit 2, interrupts the execution of a normal user program by the control and executes the interruption user program stored in the RAM of the interruption input unit 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention provides
The present invention relates to a control device that interrupts execution of a normal user program and executes an interrupt user program.

[0002]

2. Description of the Related Art In a control device such as a programmable controller, interrupt processing is executed during execution of normal processing, and therefore a user program for normal processing (hereinafter referred to as "normal user program") and execution of the normal user program. In addition to the normal control program for controlling the interrupt control, a user program for interrupt processing (hereinafter referred to as "interrupt user program") and an interrupt control program for controlling the execution of the interrupt user program are provided.

In such a control device, conventionally, a storage area for an interrupt program is provided in the program memory of the main unit to store the interrupt user program and the interrupt control program together with the normal user program and the normal control program.

[0004]

However, in such a control device, as described above, the interrupt user program and the interrupt control program are stored in the program memory of the main body unit side together with the normal user program and the normal control program. Therefore, for a user who does not perform interrupt processing, an extra storage area that is not used is secured in the program memory of the main unit, which limits the memory capacity and leads to an increase in cost. There was a problem.

The present invention has been made in view of such a problem, and an object of the present invention is to provide a control device useful for a user who does not execute interrupt processing.

[0006]

In order to achieve the above object, in the invention described in claim 1, when an interrupt is input from the interrupt input unit and an interrupt input unit, the normal user program is executed. A main unit that interrupts and executes the interrupt user program;
The interrupt input unit has an interrupt user program memory for storing an interrupt user program to be executed by the main body unit by an interrupt, and the main body unit receives an interrupt from the interrupt input unit. In this case, the execution of the normal user program is interrupted, and the user program stored in the interrupt user program memory of the interrupt input unit is executed.

According to a second aspect of the present invention, in the control device according to the first aspect, the interrupt input unit further has an interrupt control program memory in which an interrupt control program for controlling execution of the interrupt user program is stored in advance. When the interrupt is input from the interrupt input unit, the main body unit executes the interrupt control program stored in the interrupt control program memory of the interrupt input unit, and by the control, interrupts the execution of the normal user program, The interrupt user program stored in the interrupt user program memory of the interrupt input unit is executed.

According to a third aspect of the invention, the control device according to the first or second aspect is a programmable controller that normally cyclically executes a user program.

[0009]

According to the present invention, the interrupt input unit stores the interrupt user program, and when the interrupt is input from the interrupt input unit, the main body unit interrupts the execution of the normal user program to input the interrupt input. The interrupt user program of the unit is read from the memory and executed.

Further, the interrupt input unit further prestores an interrupt control program for controlling the execution of the interrupt user program so that when the interrupt is input from the interrupt input unit, the main unit first receives the interrupt input program. The interrupt control program may be read from the unit to perform interrupt control, and the execution of the normal user program may be interrupted by the control, and the interrupt user program may be read and executed from the interrupt input unit.

The interrupt input unit inputs an interrupt to the main unit by receiving an interrupt request from the outside or receiving data transmitted from the outside.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a control device according to the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of a programmable controller which is an embodiment of the control device according to the present invention.

As shown in the figure, this programmable controller has a main unit 1 in each slot (not shown) on a base unit 4 having a built-in system bus 41.
And interrupt input units 2 and 3 are mounted, and each unit 1 to 3 is connected via a system bus 11.

The main unit 1 includes an MPU 11 and an MPU.
11 work areas and a work RAM 12 used,
A normal user program RAM 13 in which a normal user program created by a user is stored in advance, a program ROM 14 in which a normal control program for controlling the execution of the normal user program is stored in advance, and a system bus 41 of the base unit 4 are connected. A system bus interface (I / F) 15 is provided.

The interrupt input unit 2 is a normal input unit or the like connected to an external device (not shown) via an input terminal or the like, and generates an interrupt in response to an ON / OFF interrupt request from the external device. A part 21, an interrupt user program RAM 22 in which an interrupt user program to be executed by the main unit 1 by this interrupt is stored after mounting this unit, and an interrupt control program for controlling the start / end of execution of the interrupt user program are stored in advance. The interrupt generation program 21 includes an interrupt control program R0M23 and a system bus interface (I / F) 24, and is configured to notify the MPU 11 of the main unit 1 of the interrupt via the system bus I / F 24.

The interrupt input unit 3 is a communication unit or the like for performing data communication with another programmable controller, and an interrupt generation unit such as a communication controller for generating an interrupt by receiving data transmitted from the other programmable controller. 31, an interrupt user program RAM 32 in which an interrupt user program to be executed by the main unit 1 by this interrupt is stored after mounting this unit, and an interrupt control program for controlling the start / end of execution of the interrupt user program are stored in advance. An interrupt control program R0M33 and a system bus interface (I / F) 34 are provided, and the interrupt generation unit 31 is configured to notify the MPU 11 of the main unit 1 of an interrupt via the system bus I / F 34.

The interrupt input units 2 and 3 are provided with
A unit number is assigned in advance to distinguish it from other units, and the interrupt user program is stored in each of the interrupt input units 2 and 3 in association with the unit number.

FIG. 2 shows the MPU 1 in the main unit 1.
1 shows a memory map of 1.

The memory map 11a is assigned with addresses used in the RAMs 13, 22, 32 for storing the user programs in the main unit 1 and the interrupt input units 2, 3 and the ROMs 14, 23, 33 for storing the control programs thereof. Is fixedly assigned according to the slot positions of the main unit 1 and the interrupt input units 2 and 3 mounted on the base unit 4.

Specifically, the address on the memory map 11a is divided into the addresses of the ROM area 11a1 and the RAM area 11a2 as shown in the figure, and the address of the ROM area 11a1 is the main unit RO of the main unit 1.
M area 11a11 and interrupt R of interrupt input unit 2
The RAM area 11a2 is fixedly allocated to the OM area 11a12 and the interrupt ROM area 11a13 of the interrupt input unit 3, while the RAM area 11a2 is allocated to the main body R of the main body unit 1.
It is fixedly assigned to the AM area 11a21, the interrupt RAM area 11a22 of the interrupt input unit 2, and the interrupt RAM area 11a23 of the interrupt input unit 3.

Next, as described above, the address map 1
The process of creating the interrupt program management table based on the address assigned to 1a will be described.

FIG. 3 shows a procedure of processing for creating the interrupt program management table.

This processing is performed based on the address map 11a at the time of initialization at the time of starting this apparatus in order for the MPU 11 to recognize whether or not the interrupt input unit is mounted in another slot on the base unit 4. Then, first, it is determined whether or not a unit other than the main unit 1 is mounted in each slot on the base unit 4 (step 100), and if an interrupt input unit is mounted (step 100 “Yes”). ), The unit number of the interrupt input unit is read from the system bus interface 15 (step 110), and the interrupt control program start address area and the interrupt user program storage start address area of the interrupt input unit in the interrupt program management table in the work RAM 12 or the like are read. And it is initialized according slot position in which the unit is mounted (step 120).

When the initialization is completed, subsequently, the unit number of the interrupt input unit is stored in the initialized storage area, and the interrupt control program start address of the interrupt input unit is referred by referring to the address map 11a. , And the interrupt user program storage start address are read out and stored in association with the unit number (step 130).

Then, returning to the processing of step 100, it is judged whether or not another interrupt input unit is still mounted in another slot, and when another interrupt input unit is still mounted in another slot. (Step 10
0 "Yes"), the above steps 110 to 130 are repeated in the same manner, but when another interrupt input unit is not mounted in another slot (step 10).
0 “No”), the process of creating the interrupt user program management table in the unit identification process described above ends.

FIG. 4 shows the structure of the interrupt program management table created by the processing shown in FIG.

The interrupt program management table 12a is
As described above, the MPU 11 creates it by the processing shown in FIG. 3 and stores it in the work RAM 12 or the like. Specifically, as shown in the figure, the unit number 0 to n of each interrupt input unit The interrupt control program start address of the unit of the unit number and the interrupt user program storage start address are stored.

For example, if the unit number of the interrupt input unit 2 is 0, the unit number 0, the start address of the interrupt control program assigned to the interrupt control program of the interrupt input unit 2, and the interrupt user program If the assigned interrupt user program storage start address is stored and the unit number of the interrupt input unit 3 is 1, the interrupt control program assigned to the interrupt control program of the interrupt input unit 3 together with the unit number 1 The start address and the interrupt user program storage start address assigned to the interrupt user program are stored.

When the creation of such an interrupt program management table 12a is completed after mounting the input interrupt units 2 and 3 on the base unit 4, the interrupt program management table 12 of each input interrupt unit 2 and 3 is completed.
The interrupt user program storage start address corresponding to each unit number is searched with reference to a, and the interrupt user program is stored based on the searched interrupt user program storage start address by a programming tool or the like.

Next, the interrupt operation in the programmable controller according to the present invention configured as above will be described.
This will be described with reference to the drawings.

FIG. 5 shows an interrupt operation of this programmable controller when an interrupt is input from the interrupt input unit.

First, in this programmable controller, it is assumed that the MPU 11 cyclically executes the user program stored in the normal program RAM 13 under the control of the normal program control program, and at that time, the interrupt input unit 2 generates an interrupt. It is assumed that the interrupt is input from the unit 21.

Then, the MPU 11 receives the interrupt input from the interrupt generator 21 of the interrupt input unit 2,
The system bus interface 15 detects the unit number of the interrupt unit 2 that generated the interrupt input (step 200).

Next, the MPU 11 has an interrupt user program management table 12a stored in the work RAM 12.
To retrieve the start address of the interrupt control program corresponding to that unit number (step 210),
Then, it is determined whether or not another user program such as a normal user program or another interrupt user program is being executed (step 220).

Here, only when it is judged that another user program is being executed (step 220 "Yes"
s ″), save the execution information of the user program currently being executed in the work RAM 12 (step 230),
The interrupt control program is read based on the start address of the interrupt control program fetched in step 210 and the interrupt control process is executed (step 240).

Then, the MPU 11 searches the user program management table 12a by the interrupt control processing, and the interrupt input unit 2 that generated the interrupt.
The interrupt user program start address corresponding to the unit number of the interrupt is read (step 250), and the interrupt user program is read from the interrupt user program RAM 22 of the interrupt input unit 2 which generated the interrupt based on the interrupt user program start address, The interrupt user program is executed (step 26)
0).

After the execution of the interrupt user program is completed (step 270 "Yes"), it is then judged whether or not there is another user program whose execution is interrupted by the interrupt processing (step 280), and the interruption is determined. If there is a user program of (step 280 “Yes
s "), the work RAM 12 is processed by the processing of step 230.
The execution information of the other user program that was saved in step 290 is restored (step 290), and the execution of the other user program that has been suspended is resumed (step 3).
00).

After the execution of the other user program is completed (step 310 "Yes"), it is judged again whether or not there is another user program whose execution is interrupted (step 280), and the execution is interrupted. If another user program still exists (step 280 "Yes"
s "), while repeating the processing of steps 290 to 310, if there is no other interrupted user program (step 280" No "), the above interrupt processing is terminated.

Therefore, according to the present embodiment, the normal program RAM of the main unit 1 is used even when interrupt processing is performed.
13 and the normal control program ROM 14 do not need to store an interrupt user program or an interrupt control program for performing interrupt processing, so that there is no need to secure an extra memory area in the main unit 1 and users who do not perform interrupt processing It is possible to provide a useful and low-cost programmable controller.

Further, in this embodiment, since the interrupt control program for controlling the execution of the interrupt user program is also stored in the interrupt input unit, even if the contents of the interrupt user program and the interrupt control program are changed, It is not necessary to change the contents of the normal control program ROM 14 of the unit 1 or the main body unit 1, and the expandability of this device is improved.

In the above embodiment, the interrupt input units 2 and 3 for generating the interrupt input have been described as units having no CPU, but in the present invention, as shown in FIG. The input unit 5 may be provided with a CPU 55 for performing some peripheral processing, for example, simple operation control for an external device connected to the unit 5 or writing data to the RAM 52 or the like.

In this case, in the interrupt input unit 5, the CPU 55 in the main unit 3 accesses the memory such as the RAM 52 and the MP of the main body unit 1 is accessed.
Since it conflicts with the access from U11, a bus arbitration function (bus arbiter) for arbitrating access to the memory is provided so as to prevent the conflict from occurring, although not shown.

[0044]

As described above, according to the present invention, it is not necessary to store an interrupt user program or an interrupt control program for interrupt processing in the program memory of the main unit even when performing interrupt processing.
It is not necessary to secure an extra memory area in the main unit, and it is possible to provide a user who does not perform interrupt processing with a useful and low-cost programmable controller.

Since the interrupt control program for controlling the execution of the interrupt user program is also stored in the interrupt input unit, even if the contents of the interrupt user program or the contents of the interrupt control program are changed, the main unit and Since there is no need to change the contents of the program memory, the expandability of this device is improved.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a configuration of a programmable controller that is an embodiment of a control device according to the present invention.

FIG. 2 is an explanatory diagram showing a memory map of an MPU of the main body unit.

FIG. 3 is an explanatory diagram showing a format of a user program management table.

FIG. 4 is a flowchart showing a procedure of a process of creating an interrupt user program management table described in FIG.

FIG. 5 is a flowchart showing an interrupt operation of the programmable controller.

FIG. 6 is an explanatory diagram showing another example of the interrupt input unit.

[Explanation of symbols]

 1 Main Unit 11 MPU 12 Work RAM 13 Normal User Program RAM 14 Normal Control Program ROM 2 Interrupt Input Unit 21 Interrupt Generation Unit 22 Interrupt User Program RAM 23 Interrupt Control Program ROM 3 Interrupt Input Unit 31 Interrupt Generation Unit 32 Interrupt User Program RAM 33 Interrupt control program ROM

Claims (3)

[Claims] 1. A control device comprising: an interrupt input unit for generating an interrupt; and a main unit for interrupting execution of a normal user program to execute an interrupt user program when an interrupt is input from the interrupt input unit. Then, the interrupt input unit has an interrupt user program memory for storing an interrupt user program to be executed by the main body unit by an interrupt, and the main body unit is a normal user program when an interrupt is input from the interrupt input unit. And executing the user program stored in the interrupt user program memory of the interrupt input unit. 2. The interrupt input unit further has an interrupt control program memory in which an interrupt control program for controlling execution of an interrupt user program is stored in advance, and the main body unit receives an interrupt from the interrupt input unit. , The interrupt control program stored in the interrupt control program memory of the interrupt input unit is executed, the execution of the normal user program is interrupted by the control, and the interrupt user stored in the interrupt user program memory of the interrupt input unit is executed. The control device according to claim 1, wherein the control device executes a program. 3. The control device according to claim 1, wherein the control device is a programmable controller that cyclically executes a normal user program.