JPH08328615A - Controller for automobile - Google Patents

Abstract

PURPOSE: To improve the control accuracy and the control performance of a control system by minimizing the starting period irregular fluctuation of a task with low execution priority even in a composite controller with numerous program tasks. CONSTITUTION: In an OS in which a control program is divided into tasks based on a control function, the starting period of each task is set so as to be the integral multiple of a reference period Δt and the starting of each task is started based on the starting period, each task is classified into task groups, the starting time in each task group starting repeatingly is started within the reference period Δt and with the time lag corresponding to each task group, for virtual reference time t0 coming for every reference period Δt. At this time, for the starting time of each task group, time-lag is set so that the task group may be started after the task group started earlier than the task group is executed and terminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control device mounted on an automobile.

[0002]

2. Description of the Related Art A conventional controller mounted on a vehicle is
As shown in Japanese Patent Application No. 55-6802 and Japanese Patent Application No. 62-331334, a corresponding control device is provided for each system to be controlled, and the programs in each control device are targeted. Each control item is divided into tasks, and the activation cycle of each of these tasks is set so as to have a relationship of n times the preset minimum activation cycle Δt, and the OS installed at the same time is required for each task. Each task was started and executed in a cycle to perform optimal control for the system to be controlled. These conventional control devices generally have a dedicated control device for each product, and since each control device has one system to be controlled for each control device, each divided program task The execution priority and execution cycle of can be freely optimized for each controlled system, and problems such as the start timing of each task can be addressed.

[0003]

On the other hand, the control of a plurality of control systems, which has been conventionally performed by different control devices, has been integrated due to the increase in the memory capacity accompanying the improvement in the processing capability of the microcomputer and the increase in the degree of integration. , A plurality of control systems with one vehicle controller, such as an engine control system, an automatic match transmission (AT) control system, an automatic constant speed control system (ASC
D), anti-lock control system (ABS), and other systems, a composite control device for integrally controlling a plurality of systems among these systems is being realized.

However, in these composite control devices, the number of program tasks increases as the number of integrated systems increases,
For each task set to the same activation cycle or n times the activation cycle, a task with a low execution priority is sequentially activated after execution of another task with a high execution priority is completed.
A task with a low execution priority is affected by the execution time of a task with a high execution priority, which causes a problem such that the activation cycle of the task with a low execution priority fluctuates irregularly. The larger the number of tasks set in the same start cycle or the start cycle that is n times the start cycle, the greater the effect of the change in the start cycle. Especially, the change in the control execution timing deteriorates the exhaust gas performance and reduces the fuel consumption / fuel consumption. In a system such as engine ignition control or fuel control that causes deterioration of drivability, these fluctuations in the starting cycle can be a fatal problem.

On the other hand, in these combined control devices, as described above, the number of program tasks included in one control device increases, and the integrated control system basically performs different operations independently or in cooperation with each other. Therefore, the start cycle and execution priority of each program task are
It is necessary to make settings that take into consideration the execution status of other systems that are integrated with each other, and the degree of freedom for optimization is restricted, so that irregular fluctuations in the activation cycle of tasks with low execution priority cannot be avoided. There was a problem. An object of the present invention is to improve the control accuracy and control performance of the control system while minimizing irregular fluctuations in the activation cycle of tasks having a low execution priority even in a composite control device having a large number of program tasks.

[0006]

In order to achieve the above object, the present invention divides a control program into each task based on its control function, and a predetermined reference period Δ
In the OS of a system in which the activation cycle of each task is set to be an integer multiple of t, and the activation of each task is started based on the set activation cycle, each task is divided into a plurality of n task groups G1,
Each tax group G is classified into G2 to Gn and repeatedly activated.
The start time of each of G1, G2 to Gn is a delay time d1, d within the reference period Δt and corresponding to each task group with respect to the virtual reference time t0 that comes every reference period Δt.
Different start start times t delayed by 2 to dn
1, start from t2 to tn, and each task group G1,
The activation start times t1 and t2 to tn of G2 to Gn set the delay times d1 and d2 to dn so that the activation of the task group started earlier than the task group is started after the completion of the execution.

[0007]

The plurality of n task groups G1, G2 to Gn generally include a plurality of tasks each having a different execution priority. However, with respect to one task group Gn, the task group Gn is at every reference period Δt. It is checked whether or not there is a start request, and if there is a task for which a start request is issued, the task with the highest execution priority among them is executed sequentially. Therefore, a task having a relatively high execution priority (near the head of the priority matrix) in the task group Gn with respect to the activation start timing tn of the task group Gn has a very small fluctuation in the task execution timing.

On the other hand, conventionally, all the tasks for which activation requests have been issued are continuously and continuously according to their execution priority every reference cycle Δt until the execution of all tasks for which activation requests have been completed. To be executed. In general, each task
The processing content changes depending on the input condition and the number of executions,
The execution time also changes accordingly. High execution priority,
In other words, many tasks other than the ones near the top of the priority matrix will be activated after the cumulative execution time of the tasks with higher execution priority has elapsed, the activation timing will change each time, and the activation cycle will fluctuate irregularly. Will be done.

On the other hand, in the present invention, by setting different starting start times t1 and t2 to tn delayed by delay times d1 and d2 to dn for each task group, execution of the preceding task group Gn-1 is performed. By activating the next task group Gn after the time required for the end of the task is finished, the tasks are not simultaneously executed in duplicate, and the execution time of the previous task group Gn-1 fluctuates. Regardless of the next task group Gn, the start timing tn given in advance
It can be started more.

[0010]

EXAMPLE FIG. 1 shows an example of the basic configuration of an automobile OS. In this OS, the program basically consists of two parts. One is a main routine that is activated by RESET and is subsequently executed as a background process, and the other is a timer routine that is activated by a timer interrupt (IRQ) and is executed at regular time intervals. The operation of each routine will be described in more detail below. First, in the main routine, the initialization process is performed immediately after RESET is activated. This step is CPU including memory
After performing various initial settings within itself and other control devices,
This is a step that is executed only once after RESET in order to prepare the conditions in the controller so that other program routines can operate correctly. This main routine is
After the initialization process, it enters an infinite loop and does nothing thereafter.

On the other hand, the timer routine is activated every fixed period, for example, every 1 ms, and checks which task has an activation request at each activation timing.
Further, it plays a role of sequentially activating the tasks for which each activation request has been generated, in accordance with their respective execution priority orders. In this embodiment, the task level is 3 levels, the number of tasks per task level is 3,
It has a configuration that can assign a total of 9 tasks. Among the task levels, the task level 0 has the highest execution priority and the task level 2 has the lowest execution priority. Each of these task levels is preemptive, that is, if an execution request for a task with a higher execution priority occurs while a task with a lower execution priority is executing, the task with a lower execution priority is temporarily suspended. , The task with the highest execution priority is executed first. The task with the lower execution priority continues to be executed from the point where it was interrupted after the execution of the task with the higher execution priority is completed. On the other hand, within each task level, the task having a smaller task No. has a higher execution priority. However, within the same task level, the tasks are not mutually preemptive. That is, when activation requests are simultaneously issued to a plurality of tasks within the same task level, the task with the highest execution priority is activated first. Only one task can be executed within the same task level, and other tasks within the same task level are kept waiting until the currently executing task is completed.

In order to realize the required system control,
In an actual control system, a program with the required functions is defined separately as multiple tasks, each task is given an appropriate execution cycle and execution priority, and the program is executed to specify the control specifications required for the system. To be realized. FIG. 2 shows an example of task allocation of the control system in which the engine and AT are integrated. In Fig. 2, for engine control, IGN is 10m
EGI is a task for ignition control executed every s, EGI is a task for fuel control executed every 10 ms, and CMP is a task for calculating control correction value executed every 20 ms. For AT control, ATA
Is a task that is executed every 20 ms, and includes a task that requires an operation in a relatively early cycle among AT control items, and ATB is a task for AT that is 80 ms.
A task that is executed for each engine and contains a sufficient number of items that can be calculated in a relatively slow cycle. On the other hand, MON is a task that is executed every 40 ms for communication with an external tool and is commonly used by both the engine and AT. Is a task. In Figure 2,
Task 02, task 12, and task 22 are empty and are not assigned to actual tasks.

As described above, with respect to the task allocation example shown in FIG.
How each task is activated on the time axis will be described with reference to FIG. In FIG. 3, the horizontal axis is the elapsed time, and the scale is shown every 10 ms when task dispatch, that is, task switching occurs. Also, this 10ms
It is provided with a dispatch counter (binary display) for counting the number of times for each task and activating each task in the cycle assigned in FIG. The task every 10 ms is started at every dispatch, while the task every 20 ms is executed at the timing (×) when the value of the dispatch counter becomes “××× 1”.
Represents an arbitrary value of 1/0), a task every 40 ms is activated at a timing of “× 10”, and a task every 80 ms is activated at a timing of “× 100”. Can meet.
According to the above conditions, task 0 as shown in FIG.
0, task 10 every 10 ms, task 11, task 2
0 every 20 ms, task 01 every 40 ms, task 21
Is activated every 80 ms. An embodiment of the timer routine for realizing the above operation will be described with reference to FIG. This routine executes the timer interrupt (IR
It is automatically started every 1 ms by Q). When this routine starts, first, in step 420, 10 ms
It is evaluated whether or not each task dispatch cycle has come. If the 10 ms counter is not 10 at step 420, the timing does not correspond to 10 ms, so nothing is done and this timer routine ends. On the other hand, if the 10 ms counter is 10, it means that the task dispatch is to be executed every 10 ms, and therefore the process proceeds to step 421. In step 421, the 10 ms counter is cleared to 0 to recount the next 10 ms. Next, at step 422, the dispatch counter for judging the execution timing of 20, 40, 80 ms, etc. is incremented. This dispatch counter continues to be incremented as long as the program continues executing, and its overflow is ignored. As described above, this overflow is used only to obtain the task execution time based on the combination of bit patterns, so that the overflow does not occur. In the next step 423, the value of the dispatch counter is evaluated, and based on the execution cycle of each task designated in FIG. 2, an activation request is issued to each corresponding task under the conditions described in FIG. Steps 430 to 422 are steps for starting each actual task based on the request for starting these tasks. That is, step 430 shows a loop in which the judgment is sequentially repeated for task levels 0 to 2, and step 440 is a loop in which the judgment is sequentially repeated for tasks No. X0 to X2. In step 441, it is checked whether or not a start request has been issued for each task, and if a start request has been issued for the corresponding task,
In step 442, the corresponding task is actually activated and executed. When the corresponding task is executed, the corresponding activation request is automatically cleared. Finally, in step 450, a 10 ms counter for creating a task dispatch cycle every 10 ms is incremented and this timer routine ends.

In order to clarify the problem of the conventional method, the activation status of each task in the time domain shown in "execution period A" in FIG. 3 will be described in more detail with reference to FIG. In FIG. 5, the elapsed time on the horizontal axis is the same as that in FIG.
It has a scale every 0 ms. First, at the timing when 10 ms has elapsed, the OS, that is, the timer routine operates, and the task dispatch processing is performed. Book 10m
At the timing of s, as shown in FIG.
A request to activate the task 10, task 11, and task 20 occurs, and task 00, which has the highest execution priority among these, is activated first. When this task 00 finishes executing, it once returns to the timer routine which is the OS, and the tasma for which the next activation request is generated is checked. In this embodiment, the task having the next highest execution priority among the tasks for which the activation request has been issued is the task 10, and this task 10 is activated next as shown in FIG. Similarly, the task 11 and the task 20 are sequentially activated, and when the execution of these tasks is completed, there is no other task that has issued the activation request, so the program returns to the OS level and the next activation request is generated. Waiting operation on the OS starts. At the timing of the next 20 ms, similarly, task 00, task 01, and task 10 are activated in accordance with the task allocation, and the tasks are sequentially executed as shown in FIG. , Task 11 and task 20 are similarly sequentially executed. Focusing on task 10, task 10 is assigned as a task every 10 ms, and
It is activated at a timing of every 0 ms, but in detail, as shown in task 10 execution cycle (1) and task 10 execution cycle (2) of FIG. It is affected by the task execution time and its execution cycle is not constant. This is 10ms for each task
It is activated at every timing, but every task is activated at every 10 ms timing in order of execution priority, so there is a task with higher execution priority than its own execution priority, Strictly affected by the time required to complete the execution of a task, a task with a low execution priority cannot strictly obtain a constant execution cycle, resulting in fluctuations in the execution time interval. The occurrence of these fluctuations has a greater effect as the task execution priority is lower, and is extremely large for control items for which time correspondence with a control target is important and control elements requiring accurate time intervals. It was a problem.

Next, an embodiment of the present invention for solving this problem will be described with reference to FIG. FIG. 6 shows a conventional embodiment FIG.
This is an embodiment of the present invention corresponding to, and is automatically activated every 1 ms by a timer interrupt as in FIG. Steps 620 to 623 in FIG. 6 correspond to steps 420 to 423 in FIG. 4, respectively, and the operation is exactly the same as that in FIG. On the other hand, FIG.
The step 630 of (1) checks whether the value of the 10 ms counter is equal to d1, d2 or d3, respectively, in order to reduce the fluctuation of the execution time interval. In this implementation, d
It is defined as 1 = 1 ms, d2 = 3 ms, and d3 = 7 ms, respectively. The establishment of the 10 ms counter = d1 means that the time is 1 ms after the count start timing of the basic startup cycle of 10 ms. Similarly, 10 ms counter = d2 indicates the time when 3 ms has elapsed from the count start timing of the basic activation cycle of 10 ms, and 10 ms counter = d3 indicates the time when 7 ms has elapsed. 10ms counter =
If d1 is satisfied and 1 ms has elapsed from the count start timing of the basic startup cycle of 10 ms, step 6 is performed.
In steps 40 to 642, the tasks for which the activation request has been issued within the task level 0 are sequentially activated and executed. That is, step 640 is task 00, which is a task in task level 0.
Is a loop for sequentially repeating the determination from task to task 02. In step 641, it is determined whether or not a start request is actually issued to each corresponding task. If an activation request is generated for the corresponding task, the process proceeds to step 642, and the corresponding task of task level 0 is activated and executed. Similarly, at the time when 10 ms counter = d2 is satisfied, that is, when 3 ms has elapsed from the count start timing of the basic startup cycle of 10 ms, each task in task level 1 has 10
ms counter = d3 is established, that is, basic startup cycle 1
At the time when 7 ms has passed from the count start timing of 0 ms, the task for which the activation request has been issued is activated for each task in task level 2. When all the above processes are completed, 10 m is finally reached by step 670 as in FIG.
The s counter is incremented and this timer routine ends.

The embodiment of the present invention described with reference to FIG. 6 will be described again in terms of time axis with reference to FIG. FIG. 7 is a timing chart corresponding to FIG. 5 showing a conventional embodiment. In this figure, at time t0 of 10 ms, task 00,
The task 10, task 11, and task 20 are requested to be activated. However, at time t0 of 10 ms, the actual task activation as executed in FIG. 5 is not performed. this is,
At time t0 of this 10 ms, the activation request generation determination process of each task (step 610 to step 62 in FIG. 6) is executed.
This is because there is a possibility that processing required for 3) or other system control (not shown) may be preferentially executed, and the effect of those processing times on fluctuations in task execution time intervals. T, which is the execution time of the next timer routine
Under the condition that 1 is satisfied, that is, 10 ms counter = d1, the task included in task level 0, task 00, which is the only task for which an activation request is issued, is activated and executed. However, the remaining tasks belonging to the other task levels 1 and 2 do not start even though the start request is generated at this point. Next, when the time elapses and the time becomes t2, the condition of the 10 ms counter d2 is satisfied, and the task 10 and the task 11 which are the tasks in the task level 1 which are requested to start are defined according to the respective execution priority definitions. It is started and executed. On the other hand, when the time thereafter reaches time t3, the condition of the 10 ms counter d3 is satisfied, and the task 20 which is the task in the task level 2 for which the activation request is issued is activated and executed.
All of the executions of the task 00, the task 10, the task 11, and the task 20 for which the activation request is issued at the time t0 of s are completed. Similarly, at the next timing of 20 ms or 30 ms, the activation request for each task is generated, and the corresponding tasks are activated and executed at times t1, t2, and t3, respectively. Here, each timing 10ms, 20ms, 30m
The delay times d1, d2, d3 up to the respective times t1, t2, t3 in s etc. are always constant (d1 = 1 ms, d2 = 3 ms, d3 = 7 m in this embodiment).
s constant). Therefore, for example, 10m in task level 1
Focusing on the task 10 which is a task executed at s intervals, the task 10 is always activated and executed at the time t2. Therefore, the execution cycles thereof are the task 10 execution cycle (1) and the task 10 execution cycle (1) shown in FIG. As shown in 2), it is always constant for 10 ms without being affected by other tasks. They are,
Not only task 10, but also task 0, which has the highest execution priority in task level 0 and task level 2.
The same applies to 0 and task 20.

In the conventional method, since a task having a lower execution priority is directly influenced by all tasks having a higher execution priority than a task, a task having a lower execution priority has a longer execution time interval. According to the invention, even a task with a low execution priority is affected only by tasks within the same task level and with a higher execution priority than the task, and it is a task with a relatively low execution priority. Can significantly reduce the fluctuation of the execution time interval. However, in order to fully exert the effect of the present invention,
For each task level, the timings t1, t2, t3, that is, the respective delays, are set so that the start-up execution of the next task level is started after the time for the execution of the programs in those task levels to be completely completed. Time d
It is necessary to set 1, d2 and d3. In this embodiment, (d2-d1)> (task 00 execution time + task 01
Execution time) (d3-d2)> (task 10 execution time + task 11
This execution condition can be satisfied by setting d1, d2, and d3 so as to satisfy the following condition.

With the above configuration, it is possible to greatly reduce the fluctuation of the execution time interval even for a task having a low execution priority.

In the present embodiment, the task dispatch period of 10 ms corresponds to the reference period Δt, while each task included in each task level corresponds to each of the task groups G1, G2 and G3. In the present embodiment, each task is grouped as a task group for each task level, but of course these task group groupings do not have to be classified according to the task level, and shown in steps 630 to 662 in FIG. The same execution delay characteristics can be applied to any task group classification by modifying the operation as necessary.

[0020]

According to the present invention, the task having the highest execution priority in each task group can always be activated in the same activation cycle, and the execution priority in the complex control device having a large number of program tasks Even if the task is low, the number of other tasks affected by the task execution timing can be substantially reduced. Therefore, even for a task having a low execution priority, it is possible to minimize irregular fluctuations in the activation cycle thereof and improve the control accuracy and control performance of the control system.

[Brief description of drawings]

FIG. 1 is a block diagram of a general automobile OS.

FIG. 2 is a task allocation explanatory diagram showing an example of task allocation in a control device that integrally controls an engine and an AT.

FIG. 3 is an explanatory diagram of execution cycle allocation showing execution timings of tasks executed in a constant cycle given in FIG.

FIG. 4 is a PAD flow chart showing a conventional example of a timer routine in an OS that realizes activation control of each task.

FIG. 5 is a timing chart for explaining the starting time of each task according to the conventional method.

FIG. 6 is a PAD flow chart showing an embodiment of the present invention of an in-OS timer routine for realizing activation control of each task.

FIG. 7 is a timing chart for explaining activation times of respective tasks according to an embodiment of the present invention.

[Explanation of symbols]

630-662 ... Program steps for realizing the delayed activation start times t1, t2-tn by the delay times d1, d2-dn.

Claims (4)

[Claims] 1. An arithmetic circuit for digitally processing output signals from various sensors mounted on an automobile, a storage means for storing a program for operating the arithmetic circuit, and a control mounted on the automobile based on an arithmetic result of the arithmetic circuit. The program is composed of element control means, and the program is divided into respective tasks based on its control function, and a predetermined reference period Δ
In the one in which the activation cycle of each task is set to be a multiple of t and the activation of each task is started based on the set activation cycle, each task is divided into task groups G1, G2 to Gn, and repeatedly activated. Each task group G1, G2-G
The start start time of each of n is the start start time t1, t2 to tn delayed by the corresponding delay time d1, d2 to dn, respectively, with respect to the virtual reference time t0 that comes every reference period Δt. A control device for an automobile characterized by: 2. The delay times d1, d2 to dn of claim 1.
Are vehicle control devices each having a delay time shorter than the reference period Δt. 3. The delay times d1, d2 to dn of claim 1.
Are control devices for automobiles, each having a different delay time. 4. The delay times d1, d2 to dn of claim 1.
Respectively, the relationship of d1 <d2 <... <dn is established, and the delay times d1, d2 to dn are (d2-d1)> execution time of task group G1 (d3-d2)> execution of task group G2. Time :: (dn-dn-1)> Execution time of task group Gn-1 A vehicle control device that is set to satisfy the condition.