JPH0832376A - Microwave semiconductor amplifier - Google Patents

Abstract

PURPOSE:To obtain the semiconductor amplifier without abnormal amplification by a loop oscillation with a component of a frequency f0/2. CONSTITUTION:The oscillation is prevented by absorbing a component of a frequency f0/2 generated in a closed loop 12 comprising semiconductor elements 1a, 1b in parallel operation, an input matching circuit 10 and an output matching circuit 11 with resistance circuits each connecting to a position of the closed loop 12 opposed to each other in the micro wave semiconductor amplifier comprising the input matching circuit 10, the semiconductor element 1(1a, 1b) and the output matching circuit 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor amplifier used in microwave and millimeter wave bands.

[0002]

2. Description of the Related Art FIG. 23 shows, for example, "High-power microwave / millimeter-wave transistor stabilizing circuit", JP-A-3-22841.
FIG. 24 is an equivalent circuit diagram of the conventional semiconductor amplifier before stabilization shown in Japanese Patent Publication No. 0, in FIG. 23, 1 is a source-grounded field effect transistor (hereinafter referred to as FET) for signal amplification, 2 is an input terminal, 3 is an output terminal, 70, 71,
Reference numeral 72 is an inductor that connects the input terminal 2 and the gate terminal of the FET 1 in series, 73 is an inductor that connects the drain terminal of the FET and the output terminal 3 via a transmission line 74, and 75 is a transmission line 74. A transmission line connected in parallel with the output terminal 3, 68 is a capacitor whose one end is connected in parallel between the inductors 70 and 71, and the other end is grounded, and 69 is one end between the inductors 71 and 72. It is a capacitor connected in parallel with the other end grounded.

The inductors 70, 71 and 72 and the capacitors 68 and 69 form an input matching circuit, and the inductor 73 and the transmission lines 74 and 75 form an output matching circuit. Therefore, the input matching circuit has the input terminal 2 and the FET 1
The output matching circuit is formed between the output terminal 3 and the drain terminal of the FET 1.

FIG. 24 is an equivalent circuit diagram of a conventional stabilized semiconductor amplifier. In FIG. 24, reference numerals 1 to 75 are the same as those in FIG. Reference numeral 76 denotes an inductor connected in parallel between the inductor 72 and the gate terminal of the FET 1, and reference numeral 77 has a length of ½ wavelength with respect to the signal frequency f ₀ (hereinafter referred to as a fundamental wave), and one end thereof has an inductor 76. Is an open-ended transmission line that is connected to and has the other end opened.

Next, the operation will be described. In the conventional amplifier before stabilization shown in FIG. 23, the matching between the input terminal 2 and the gate terminal of the FET1 is performed by the input matching circuit, and the matching between the drain terminal and the output terminal of the FET1 is performed by the output matching circuit. Is going. Frequency f ₀
(Note that the frequency f ₀ is given to an arbitrary frequency here, and it is not a specific frequency) is input from the input terminal 2 and passes through the input matching circuit, FET 1, and the output matching circuit. After being amplified, it is output to the output terminal 3.

On the other hand, thermal noise generated in the amplifier is
When input to the gate terminal of No. 1, the input and output power characteristics of the FET 1 are mixed with the component of the frequency f ₀ of the fundamental wave due to the nonlinearity (hereinafter simply referred to as nonlinearity), and the sum component and the difference component of both frequencies are mixed. Is output. When the feedback loop (capacitance created through space) of the FET1 itself and the peripheral circuit forms a feedback loop between the input side and the output side, the mixing component output from the FET1 is fed back, and the frequency f ₀ is returned again. FET1 mixed with other components
Is further input to the FET1, and a component by mixing with the FET1 is output. When the non-linearity of FET1 is large, the amplitude of the component output by mixing increases.

Usually, when the frequency of the component generated in the thermal noise is different from the frequency of the component generated by the mixing, it is fed back by the feedback loop and input to the FET 1 again, but the frequency of the mixing component generated at this time. Therefore, the oscillation does not increase unless the FET has a low frequency with a high gain. Therefore, the noise level is usually kept. However, among the thermal noises, the frequency f ₀ /
When the second component (hereinafter referred to as the half-wave) is inputted to the FET1, is mixed with components of f ₀ by nonlinearity is a component of the difference between the f ₀ and f _0/2 having the FET1 f _0/2 is amplified and output. Amplifier is FET
In the case where a feedback loop is formed by the feedback capacitance of itself and the peripheral circuit, the above-mentioned f output from FET1
_0/2 component is fed back, is input to the FET1 is mixed with the components of f ₀ again, is amplified and outputted again f _0/2 by mixing by FET1. When the non-linearity of FET1 is large, f ₀ /
The two components are superimposed and cumulatively increase. Frequency f _0/2
The component itself has a small value compared to the frequency f ₀ because the feedback capacitance is small, but since it is superimposed as described above, it increases to the saturation level allowed by the system. Saturated output of the system is defined by the sum of the respective frequency components, since this operation is performed instantaneously, f _0/2 components of f ₀ at the moment in which the components appear is sharply little abnormal amplification phenomenon occurs in the amplifier.

In order to solve this problem, the conventional method shown in FIG.
As shown in the stabilized amplifier of FIG. 1, between the gate terminal of the FET and the input matching circuit, the inductor 76 and 1 at the frequency f ₀ are provided.
A series circuit composed of the open-ended transmission line 77 having a half wavelength is connected in parallel. Here, the effect of this series circuit will be described. In general, the impedance of a transmission line whose one end is open is given by the formula Z = -jZ ₀ cot (2πl / λ). Here, Z ₀ is the characteristic impedance, l is the line length, and λ is the wavelength. In this case, at the frequency of f ₀ , the above-mentioned series circuit is l = λ / 2 at the connection point between the inductor 76 and the open-ended transmission line 77. impedance of the series circuit Z = over jZ ₀ cotπ i.e. almost infinite (open) and, at the connection point at a frequency of f _0/2 l =
Since it is λ / 4, the impedance of the series circuit is Z
= -JZ ₀ cot (π / 2), that is, almost 0 (short circuit).

Therefore, the component of the signal frequency f ₀ input from the input terminal 2 is given as Γ = 1 (total reflection) by substituting Z = ∞ in the reflection coefficient equation Γ = Z−Z ₀ / Z + Z ₀ . Become. Therefore, the input signal having the frequency f ₀ is not transmitted to the open-ended transmission line 77 side. on the other hand,
Since impedance matching is achieved on the FET1 side by a matching circuit, all the input signals having the frequency f ₀ are input to the FET1, amplified by the FET1, and then output from the output terminal 3. After all, the input signal with the frequency f ₀ is not affected by the open-ended transmission line 77 at all, and the FET1
After being amplified by, it is output from the output terminal 3.

On the other hand, the frequency f ₀ / generated in the input matching circuit
The component of 2 is the reflection count equation Γ = Z−Z ₀ / Z + Z ₀
Γ = -1 (total reflection in opposite phase). Therefore, the input signal having the frequency f _0/2 is not transmitted to the open-ended transmission line 77 side. In addition, the gate side of FET1 has frequency f
_{Since the} series circuit in which the impedance becomes almost 0 at 0/2 is connected, the impedance at the frequency f _0/2 at that point becomes almost 0. Therefore, next (total reflection in antiphase) reflected counting gamma = -1, the input signal of the frequency f _0/2 is not input to the FET1 is totally reflected. As a result, f
Mixing of the input component of ₀ disappears, that the components of f _0/2 is output is eliminated.

Since the conventional stabilized semiconductor amplifier is constructed as described above, the input terminal and the FET in the amplifier are
F _0/2 of the frequency components of the thermal noise generated between and open-end transmission lines between the first gate terminal is also not entered into FET1. A plurality of semiconductor amplifiers are connected in parallel to form an FET
The same can be said for the case where the two are configured to operate in parallel.

[0012]

In the closed loop on the output side of each FET (closed loop formed by the output system of the FET and the output system of the adjacent FET) formed by connecting a plurality of the above semiconductor amplifiers in parallel, the FET1 Output system and FE
If the frequency in the configured feedback loop by the space capacitance between the gate terminal and the drain terminal of T1 is present components of f _0/2, the characteristic variation or of each FET, the matching circuit on the output side of the path through each FET If the unbalanced mode power due to variations in characteristics occurs, components the frequency of f _0/2, as shown in FIG. 25 is a reversed-phase same amplitude vector components (hereinafter unbalanced mode e ₀ to reciprocate only in the closed loop hereinafter) and it is divided into same phase and same amplitude vector component output (hereinafter referred to as a balanced mode e _e) to the output terminal 3 side. Here, since the latter is the noise level, the influence on the output is ignored, so there is no problem.

However, the unbalanced mode component passing only in the closed loop reaches the other FET 1 and then the FE
It is superimposed on the gate terminal of the FET1 via the feedback loop of T1. Components of the superimposed frequencies f _0/2 is the F
At the gate terminal of ET1, the impedance is 0 due to the open-ended transmission line connected to it, so that it is totally reflected and returns to the input side of FET1 again. Therefore, the mixing is performed by FET1, f ₀ is a component of the difference between f ₀ and f _0/2
/ 2 is output. The outputted f _0/2 component again one FE further follow the closed loop in just the opposite direction
Reach T1. Then, this FET1 also performs the same operation. Among frequency by repeating the above operation of the components of f _0/2, by the amplitude of the component that reciprocates only within each closed loop configured to include a FET operating in the parallel is superimposed, the loop oscillation May occur, and the amplifier has a problem that an abnormal amplification phenomenon occurs.

An object of the present invention is to provide a semiconductor amplifier which does not have an abnormal amplification phenomenon due to loop oscillation of a component of frequency f _0/2 .

[0015]

A microwave semiconductor amplifier according to a first invention is an input matching circuit, a semiconductor element connected to the input matching circuit for amplifying a signal, and an output matching connected to the semiconductor element. A closed loop circuit formed by connecting in parallel a plurality of amplifier circuits composed of a circuit, and connected to predetermined opposing positions in this closed loop,
And a resistor circuit that absorbs the unbalanced mode power of the 1/2 harmonic.

The microwave semiconductor amplifier according to the second aspect of the present invention is formed in a band shape between the input matching circuits or the output matching circuits which are arranged to face each other, and the half-harmonic unbalanced mode power is formed. Is provided with a resistance circuit that absorbs.

In the microwave semiconductor amplifier according to the third aspect of the invention, the resistance circuit, the input matching circuit, or the output matching circuit is provided on the same substrate on which semiconductor elements are formed.

Further, the microwave semiconductor amplifier according to the fourth aspect of the present invention is provided with a circuit that becomes a resistance circuit with a 1/2 harmonic wave between the input matching circuit and the ground or between the output matching circuit and the ground.

The microwave semiconductor amplifier according to the fifth aspect of the present invention comprises a series circuit of an inductor and a capacitor that are in series resonance with a 1/2 harmonic wave, and a resistor connected in series to the non-grounded end of the series circuit. A circuit which becomes a resistance by the 1/2 harmonic is provided.

The microwave semiconductor amplifier according to the sixth aspect of the present invention includes a series circuit including an open-ended transmission line having a ¼ wavelength for the ½ harmonic in parallel with the input matching circuit or the output matching circuit. It is provided.

The microwave semiconductor amplifier according to the seventh aspect of the invention is such that a feedback circuit serving as a resistance circuit with a 1/2 harmonic is provided between the input side terminal and the output side terminal of the semiconductor element.

In the microwave semiconductor amplifier according to the eighth aspect of the invention, an input matching circuit and the output matching circuit are connected to each other, and a feedback circuit serving as a resistance circuit with 1/2 harmonic is provided, and the feedback circuit is connected in parallel. It is arranged between operating semiconductor elements.

In the microwave semiconductor amplifier according to the ninth aspect of the invention, between the input side terminal and the output side terminal of the semiconductor element,
A feedback circuit is provided which serves as a high impedance circuit for the fundamental wave and a resistance circuit for the 1/2 harmonic wave.

Further, the microwave semiconductor amplifier according to the tenth aspect of the invention is provided with a circuit between the output matching circuit and the ground, which serves as a resistance circuit for the 1/2 harmonic and a short circuit for the second harmonic. Is.

The microwave semiconductor amplifier according to the eleventh aspect of the present invention comprises a transmission line having a quarter wavelength with respect to the fundamental wave,
One end of the transmission line is a first series resonance circuit that resonates in series with a fundamental wave, a second series resonance circuit that resonates in series with a second harmonic wave, and a resistance circuit with respect to the second harmonic wave. A parallel circuit in which a short circuit circuit is connected in parallel is provided, and the transmission line and the parallel circuit are connected in series.

[0026]

According to the first aspect of the invention, in the closed loop circuit composed of the semiconductor element and the peripheral circuit that operate in parallel, the power of the 1/2 harmonic component in the thermal noise increased by the nonlinearity of the semiconductor element is The abnormal amplification phenomenon of the input / output characteristic of the amplifier is eliminated by erasing by absorbing it by the resistance of the resistance circuit provided in the closed loop circuit.

In the second aspect of the invention, the 1/2 harmonic component generated in the loop when a signal is input in a wide band is provided between the transmission lines in the closed loop circuit so as to face each other in the form of a resistor. Absorb in the circuit.

In the third invention, the signal frequency f ₀ /
When the position where the unbalanced mode power is absorbed in 2 is in the immediate vicinity of the FET, the accuracy of the bonding wire is eliminated because the inductance of the bonding wire is eliminated.

According to the fourth aspect of the invention, in the case of an amplifier in which a resistance circuit cannot be loaded at a position opposite to an input or output matching circuit of semiconductor elements operating in parallel, the frequency f
One end in _0/2 becomes resistive circuit absorbs components of the frequency f _0/2 by a circuit that is grounded via a DC block.

[0030] In a fifth aspect of the present invention, it absorbs the frequency f _0/2 components by a circuit comprising a resistor circuit at the frequency f _0/2 configured with lumped elements.

In the sixth invention, the resistance and the frequency f
_0/2 becomes the circuit circuit consisting of open-end line resistance at the frequency f _0/2 are short-circuited with a line length of a quarter wavelength, it absorbs the component of the frequency f _0/2 resistors.

[0032] In a seventh aspect, the component of the frequency f _0/2 by the frequency f _0/2, which is configured between the drain terminal and a gate terminal and the output terminal resistor circuit to become a feedback circuit which is an input terminal of the FET Absorbs.

In the eighth invention, FETs 1a and 1 are provided.
divided into b, to operate a well-balanced amplifier by providing a feedback times as a resistive circuit at the frequency f _0/2 therebetween and absorbs the component of the frequency f _0/2 by the resistance of the feedback circuit.

[0034] In a ninth aspect, provided between the input terminal of the FET output terminal becomes a high impedance to the signal frequency f _0, the signal frequency of the amplifier by a feedback circuit at the frequency f _0/2 becomes resistive circuit without affecting the characteristics of the f _0, it is absorbed by the feedback circuit components of the frequency f _0/2.

[0035] In the tenth aspect of the invention becomes resistive at the frequency _f 0/2, which is provided between ground and the matching circuit, and the circuit to be short-circuited at the frequency 2f _0, the output of the 2f ₀ shorting the frequency 2f ₀ eliminate power, and frequency _f 0/2
The component of is absorbed by the resistance circuit.

[0036] In the eleventh invention, an open circuit at the frequency _{f 0,} a short circuit at the frequency 2f _0, and the frequency _f 0 /
A resistor circuit constituted by serially connecting the inductance and resistance of the transmission line 2 constituted by lumped constant circuit eliminates the output power of the frequency 2f _0, and absorb the component of the frequency f _0/2 by the resistance.

[0037]

【Example】

Example 1. FIG. 1 is a circuit diagram of an amplifier showing an embodiment of the first invention, in which 1 (1a and 1b) is shown.
Is a source-grounded FET and has a gate terminal G, a drain terminal D, and a source terminal S. Reference numeral 2 is an input terminal of the amplifier, and 3 is an output terminal of the amplifier. 4, 5, 6, 7,
Reference numerals 8 and 9 denote transmission lines. Between two transmission lines 4 and 9, an amplifier circuit configured by connecting the transmission lines 5, 6, 7, and 8, the conductive wire 18, and the source-grounded FET 1a or 1b in this order is provided. Are connected in parallel. That is, the transmission line 4 connected to the input 2 branches into two at the point A, and two sets of transmission lines 5 and 6 connected in series are connected via bonding wires (hereinafter referred to as conductive wires) 18. The transmission terminals 7 and 8 are connected in series to the gate terminal of the FET 1a or 1b, and the transmission terminals 7 and 8 are connected in series again from the drain terminal of the FET 1a or 1b via a conductive wire. Are commonly connected to one end of the transmission line 9, and the other end of the transmission line 9 is connected to the output terminal 3. The input matching circuit 10 is connected to the transmission lines 7, 8 and 9 by the transmission lines 4, 5 and 6.
The output matching circuits 11 are respectively constituted by.

With the transmission lines 5, 6, 7, and 8 and the FETs 1a and 1b operating in parallel, a closed loop circuit 12 is formed in the amplifier.
Is configured. 13 is a resistance circuit, which is a transmission line for connection 14
And a resistor 15 and are connected to predetermined opposing positions in the input side matching circuit of the closed loop circuit 12.

FIG. 2 is a block diagram of the amplifier of FIG. The transmission lines 4, 5 and 6 are provided on the dielectric substrate 16, and the transmission lines 7, 8 and 9 are provided on another dielectric substrate 17. The resistor 15 is formed of a thin film on the dielectric substrate 16 and is connected to a predetermined opposing position of the input matching circuit by the connection transmission line 14. In addition, FET1a, 1b
Source terminals are through holes on the back of each FET body.
It is connected to a ground plate 19 provided on the back surface (not shown) of the dielectric substrate 16 by (not shown).

Next, the operation will be described. In FIG. 1, a fundamental wave, that is, a signal component of frequency f ₀ is input from an input terminal 2, is distributed at point A, and is connected in parallel to FET 1
It is input to a and 1b respectively. The signals amplified by the FETs 1a and 1b are combined at the point B and output from the output terminal 3. On the other hand, of the thermal noise existing in the closed loop circuit 12,
Vector direction component of the frequency f _0/2 are different each in circuits operating in parallel, also, FETs 1a, FET1
vector direction and magnitude of b frequency f _0/2 of the component amplified by the characteristic variations of different respectively circuits operating in parallel. These components can be decomposed into respective equilibrium mode e _e and unbalanced mode e _{0 as shown} in FIG. If there is no resistance circuit 13, the unbalanced mode e _o has its phase inverted at point B and is totally reflected, so that it is fed back to the FET 1a and FET 1b, respectively.

Here, the gate ends of FET1a and FET1b
Since the open-ended transmission line is not connected to the child,
Equity mode e_oReaches point A, and the phase is opposite here.
Then it is totally reflected and input again to FET1a and FET1b.
Be done. Therefore, the signal frequency f ₀ And frequency f₀ / 2 at the same time
Is input to FET1a and FET1b, and the FET is non-linear
Mixing occurs during operation, resulting in frequency f
₀ And frequency f₀ Frequency f of difference of / 2₀ / 2 component is output
Is done.

The components of the output f _0/2 is totally reflected by the phase is reversed again point B, it will repeat the above operation.
Thus the frequency f _0/2 of the unbalanced mode, continue to though propagating loop circuit 12 between points A and B so as to draw a loop. Component of the frequency f _0/2 generated by mixing the non-linearity of the FET is greater increases, the oscillation of the loop gain increases the frequency f _0/2 occurs in the loop circuit, increases the amplitude until the saturation level of the system allows To do. Since the saturated output of the system is defined by the sum of f ₀ component and the f _0/2 component, component of f ₀ decreases abruptly at the moment of f _0/2 component appeared.

The loop oscillation condition at this time is expressed by the equations (1) and (2) in the loop circuit shown in FIG.

[0044]

[Equation 1]

Here, a1 and b1 are input traveling waves on the input side and outputs from the loop circuit when the ideal circulator 20 is provisionally added to the input side of the closed loop 12 shown in FIG. Shows traveling wave, a2
3 and 2 respectively show the input traveling wave on the output side and the output traveling wave from the loop circuit when the ideal circulator 20 is provisionally added to the output side of the closed loop 12 shown in FIG. 3B.

FIG. 4 is a diagram showing the measurement results of the input / output characteristics of the amplifier when the resistance circuit 13 is not provided in the closed loop circuit and when it is provided. If there is no resistance circuit 13 in the closed loop circuit of the amplifier, the non-linearity of the FET increases,
Wherein the closed loop circuit at a frequency of f _0/2 (1),
When (2) is satisfied, the component of f _0/2 increases, and the amplifier input / output characteristic causes an abnormal amplification phenomenon as shown in FIG. 4 (a). When this abnormal amplification phenomenon occurs,
F _0/2 components occurs as the output spectrum of the amplifier as shown in Figure 4 (b).

[0047] Therefore, in this amplifier, connecting a resistor circuit 13 to the opposite position is determined according to the frequency of the closed loop circuit 12, both ends at the same amplitude of the frequency f _0/2 of the unbalanced mode resistor 15, reverse Since they are in phase, the unbalanced mode power can be absorbed by combining them on the resistor 15. Therefore, at a frequency of f _0/2 (1),
Equation (2) is no longer satisfied, and loop oscillation can be suppressed. That is, as shown in FIG. 4C, the signal frequency f
It is possible to eliminate the abnormal amplification phenomenon in which the component of ₀ sharply decreases. In this case, the components of f _0/2 in the spectrum is not detected. As described above, by connecting the resistance circuit 13 to the predetermined opposed position of the closed loop circuit 12,
The abnormal amplification phenomenon in which the component of the signal frequency f ₀ sharply decreases can be eliminated.

Example 2. FIG. 5 is a block diagram of an amplifier showing an embodiment of another invention. In FIG.
Are the same as those in FIG. Reference numeral 23 is a resistance circuit, which is composed of a resistance 22 and a connecting line 21, and is connected to a predetermined opposing position in the output side matching circuit of the closed loop circuit 12. Here, it is shown that two resistance circuits are connected.

Next, the operation will be described. In the case where two signals having different frequencies are input in FIG. 5, at a frequency that is ½ times each of the signal frequencies, the predetermined conditions such that the loop oscillation conditions (1) and (2) in the closed loop circuit are not satisfied. The resistance circuit 13 and the resistance circuit 23 are respectively connected to the opposing positions in the closed loop circuit. This makes it possible to eliminate the abnormal amplification phenomenon of two waves having different frequencies. Although FIG. 5 shows a case of two waves, even when a plurality of signals having different frequencies are input, a plurality of resistance circuits are respectively expressed by the loop oscillation condition formula (1),
It suffices to connect to a position where the condition (2) is not established, whereby the abnormal amplification phenomenon of each signal frequency can be eliminated.

Example 3. FIG. 6 is a block diagram of an amplifier showing an embodiment of another invention. In FIG.
2 are the same as the reference numerals in FIG. Reference numeral 24 denotes a thin film resistor formed on the dielectric substrate, which is a portion between the transmission lines 6 forming the input matching circuit and the transmission line 7 forming the output matching circuit, which are arranged facing each other in the closed loop circuit. It is provided in a strip shape in the section and is connected to each transmission line.

Next, the operation will be described. In FIG. 6, when a signal is input in a wide band, in order to prevent the conditions (1) and (2) of the loop oscillation in the closed loop circuit from being satisfied at a frequency that is ½ times that of all signals in the band. The predetermined position for loading the resistor is continuous. Therefore, the thin film resistor 24 is continuously provided in a band shape between the transmission lines arranged opposite to each other in the closed loop circuit, so that an abnormal amplification phenomenon of an arbitrary signal frequency within a predetermined band can be eliminated.

Example 4. FIG. 7 is a configuration diagram of an amplifier according to another embodiment of the invention. In FIG.
2 are the same as the reference numerals in FIG. FET1a
The body and the FET1b body are formed on the same substrate 27, and
Reference numeral 8 is a resistance circuit, which is composed of a resistor 26 and a connection transmission line 25 formed on the same substrate between the gate terminals which are the input terminals of the FETs 1a and 1b.

Next, the operation will be described. 7, the loop oscillation conditions of the signal frequency is in the closed loop circuit at a frequency of _{f 0/2 (1),} (2) when the position where expression is to absorb unbalanced mode power not satisfied is the immediate vicinity of the FET, By forming the resistance circuit 28 on the same substrate on which the FETs 1a and 1b are formed, the resistance circuit 28 can be connected closer to the FET than the conductive wire 18 for connection, so that the inductance of the conductive wire 18 can be reduced. consider it is unnecessary, exactly it is possible to absorb an unbalanced mode power of the frequency f _0/2 to the resistor 26, it is possible to eliminate the abnormal amplification phenomena of the signal frequency. In FIG. 7, the FET 1a and FET 1b and the resistor circuit 28 are formed on the same substrate 27.
Although formed above, as shown in FIG. 8, a microwave amplifier including a FET, a resistance circuit, an input matching circuit and an output matching circuit may be integrally formed on the same substrate 29. In this case, since the bonding wire is unnecessary, the variation is reduced and the design accuracy is improved. In addition, the yield is improved and is stable.

Example 5. FIG. 9 is a circuit diagram of an amplifier showing an embodiment of another invention.
Are the same as those in FIG. 30 is f ₀
It is a circuit which becomes a resistance circuit at a frequency of / 2, and is connected between the input side matching circuit of the closed loop circuit 12 and the ground through a DC blocking capacitor 31.

Next, the operation will be described. 9, one end serving as a resistive circuit at the frequency of f _0/2 in place of the closed loop circuit 12 is loaded with a circuit 30 which is grounded via a DC block. Further, in order to operate the amplifier in a well-balanced manner, the circuit 30 is connected to each of the parallel paths passing through the FETs 1a and 1b at the same position. Circuit 30 to become a resistance circuit at a frequency of f _0/2, the frequency component of f _0/2 is absorbed in the resistor circuit. Thus, the loop gain of the frequency components of f _0/2 of the loop circuit 12 is reduced, the loop oscillation conditions of a closed loop circuit 12 (1),
Equation (2) is no longer satisfied, and loop oscillation can be suppressed. Therefore, the abnormal amplification phenomenon of the signal frequency f ₀ can be eliminated. Further, since the resistance circuit is provided between the input or output matching circuit and the ground, it is possible to prevent the resistance circuit from being loaded, for example, in space at a position opposite to the input or output matching circuit of the semiconductor elements operating in parallel. Is effective in case

Example 6. FIG. 10 is a circuit diagram of an amplifier according to another embodiment of the invention. In FIG.
Reference numeral 8 is the same as the reference numeral in FIG. 35 is f
_It is a circuit that becomes a resistance circuit at a frequency of 0/2 and is composed of a resistor 32, an inductor 33 and a capacitor 34 connected in series, and is connected between the input side matching circuit of the closed loop circuit 12 and the ground.

FIG. 11 is a block diagram of the amplifier of FIG.
Since 1 to 19 are the same as the reference numerals in FIG. The resistor 32 is formed of a thin film on the same dielectric substrate as the dielectric substrate 16 on which the transmission lines 4, 5, 6 are formed, one end of which is connected to the input matching circuit and the other end of which is connected to the transmission line 33. It is grounded through the DC block capacitor 34 and the grounding through hole 67.

Next, the operation will be described. In FIG. 10, the impedance Z of the circuit 35 is the resistance value R of the resistor 32, the capacitance C of the capacitor 34, and the transmission line 33.
It is shown by a formula (3) using the inductance L of. If you choose C and L (4) as in the formula, the capacitor 34 and inductance 33 at a frequency of f _0/2 the impedance Z of the circuit 35 becomes a short circuit with series resonance becomes a resistor circuit R only.

[0059]

[Equation 2]

[0060] Accordingly, at a predetermined position where the loop oscillation condition is not satisfied in the circuit 35 in a closed loop circuit 12 at a frequency of f _0/2, and, for operating a balanced amplifier, the parallel through each FETs 1a, 1b If they are connected to the same position on each path, the frequency component of f _0/2 will be f ₀ /
It is absorbed by the circuit 35 that becomes a resistance circuit at a frequency of 2 and f ₀
The loop gain of the frequency component of / 2 is reduced, and loop oscillation can be suppressed. Therefore, the abnormal amplification phenomenon of the signal frequency can be eliminated. Further, since the resistance circuit is composed of lumped constant elements, it can be made compact.

Example 7. FIG. 12 is a configuration diagram of an amplifier according to another embodiment of the invention. In FIG.
Since 9 is the same as the reference numeral in FIG. 2, its explanation is omitted. 36 The resistor 37 is connected to one end of the open-end line a and the resistor 36 having a line length of a quarter wavelength at a frequency of f _0/2. The other end of the resistor 36 is connected in parallel with the input matching circuit.

Next, the operation will be described. In FIG. 12, the circuit composed of the resistor 36 and the open-ended line 37 is f
_At the frequency of 0/2, the open-ended line 37 is short-circuited at the connection point with the resistor, so that it can be considered as a circuit in which the resistor 36 is short-circuited. Therefore, a circuit comprising a resistor 36 and a open-end line 37 at a predetermined position where the loop oscillation condition is not satisfied in a closed-loop circuit 12 at a frequency of f _0/2, and, for operating a balanced amplifier, the FETs 1a, 1b if connected to the same position of the parallel of each path through the frequency components of f _0/2 is absorbed by the resistor 36, the loop gain of the frequency components of f _0/2 is reduced, it is possible to suppress loop oscillation . For this reason,
The abnormal amplification phenomenon of the signal frequency can be eliminated. Further, in the case of this configuration, it is not necessary to actually ground one end of the resistance circuit, and a circuit such as a through hole for series resonance and a capacitor is not necessary. Therefore, since the number of steps is reduced accordingly, the input matching circuit board 16 can be inexpensively and accurately realized.

Example 8. FIG. 13 is a circuit diagram of the amplifier of FIG. 12, and in the figure, 1 to 18 are the same as the reference numerals of FIG. 40 is a feedback circuit comprising a resistor circuit at a frequency of f _0/2, the closed-loop circuit 12 of the gate terminal and the DC blocking capacitor 39 and the connection conductive wire between the drain terminal is an output terminal which is an input terminal of the FET Are connected via an inductance 38 of.

Next, the operation will be described. 13, the feedback circuit 40 is kept configured such that the resistance circuit at a frequency of f _0/2. Therefore, the feedback circuit 40 is set to f ₀ /
At a predetermined position where the loop oscillation condition in the closed loop circuit 12 is not satisfied at the frequency of 2, and in order to operate the amplifier in a well-balanced manner, if they are connected to the same position of each parallel path passing through each FET 1a, 1b, f frequency components of _0/2 is absorbed by the feedback circuit 40, the loop gain of the frequency components of f _0/2 is reduced, it is possible to suppress loop oscillation. Therefore, the abnormal amplification phenomenon of the signal frequency can be eliminated. In this case, the feedback circuit 40 is configured to be resistive at the frequency of f _0/2, the resistance at the frequency of f _0/2, including a connecting conductive wires 38 and DC block capacitor 39 It may be configured as a circuit. This applies not only to this embodiment but also to other embodiments. Further, in this embodiment, the case where the feedback circuit is formed between the input terminal and the output terminal of the FET has been described, but the feedback circuit is formed between the predetermined position of the input matching circuit and the predetermined position of the output matching circuit. It is also possible. This applies not only to this embodiment but also to other embodiments using a feedback circuit.

Further, in this configuration, since the feedback circuit which is a resistance circuit with the 1/2 harmonic of the fundamental frequency is formed between the input terminal and the output terminal of the semiconductor element, the input or output matching of the semiconductor elements operating in parallel is performed. This is effective in the case where the resistance circuit cannot be loaded at the opposite position of the circuit or in the case of the amplifier configuration in which the ground circuit cannot be configured.

Example 9. FIG. 14 is a circuit diagram of an amplifier according to another embodiment of the invention.
2 are the same as the reference numerals in FIG. 45 is f ₀
In the feedback circuit which becomes a resistance circuit at the frequency of / 2, the resistance 41,
It is composed of a capacitor 42 and an inductor 43, and is connected between an input terminal and an output terminal of the FET of the closed loop circuit 12 through a connecting line 44 and an inductance 38 of a conductive wire (this impedance can be ignored).

FIG. 15 is a block diagram of the amplifier shown in FIG. In the figure, reference numerals 1 to 19 are the same as those in FIG. The feedback circuit 45 includes the dielectric substrates 46 and 4
7 on each side, one end of which is the input terminal of the FET,
The other end is connected to the output terminal of the FET via a connecting conductive wire 38, respectively.

Next, the operation will be described. In FIG. 14, the impedance Z of the feedback circuit 45 is the resistance value R of the resistor 41, the capacitance C of the capacitor 42, the transmission line 4
It is shown by the equation (3) using the inductance L of 3. C
Be selected and L (4) as in the formula, the capacitor 42 and transmission line 43 at a frequency of f _0/2 is a short circuit in series resonance, the impedance Z of the feedback circuit 45 is a resistor circuit R only.

[0069]

(Equation 2)

[0070] Therefore, a feedback circuit 45 in place of the loop oscillation condition is not satisfied in a closed loop circuit 12 at a frequency of f _0/2, and, for balancing good operation amplifier, in parallel through each FETs 1a, and 1b if each the same positions of each path of the connection, the frequency components of f _0/2 is, f
_0/2 is absorbed by the resistor 41 of the circuit 45 comprising a resistor circuit in the frequency, the loop gain of the frequency components of f _0/2 is reduced, it is possible to suppress loop oscillation. Therefore, the abnormal amplification phenomenon of the signal frequency can be eliminated. Further, since the feedback circuit is composed of lumped constant elements, it can be made compact.

Example 10. FIG. 16 is a block diagram of an amplifier showing an embodiment of another invention. In FIG.
Reference numeral 19 is the same as the reference numeral in FIG. 44 is a connecting line, 38 is an inductance of a conductive wire, 4
Reference _numeral 5 is a feedback circuit which serves as a resistance circuit at a frequency of f 0/2 and is composed of a resistor 41, a capacitor 42 and an inductor 43, and is connected between the transmission lines 6 and 7 of the closed loop circuit 12. The feedback circuit 45 is composed of FETs 1a and 1b that operate in parallel.
Is provided on the same substrate as and between the FET 1a and the FET 1b.

Next, the operation will be described. 16, in the case of the configuration of the present amplifier, the closed loop circuit 12 is composed of transmission lines 6 and 7, FETs 1a and 1b, and a conductive wire 18 for connection. Usually, in many cases FET1a and 1b is not divided, in such a case, the need to configure the feedback circuit at a predetermined position where the loop oscillation condition is not satisfied in a closed loop circuit 12 at a frequency of f _0/2 in some cases, the frequency components of the FET to 1a, that good balance to operate the amplifier in providing the feedback circuit 45 therebetween divided into 1b, and f _0/2 as in the present configuration is absorbed by the resistor 41 of the feedback circuit 45 , the loop gain of the frequency components of f _0/2 is reduced, it is possible to suppress loop oscillation. Therefore, the abnormal amplification phenomenon of the signal frequency can be eliminated.
Also, by constructing the feedback circuit on the same substrate as the semiconductor element and arranging it between semiconductors that operate in parallel, the connection wire or line for the feedback circuit can be made the shortest, so eliminating the effect. Can be generated, 1 / of the fundamental frequency
A feedback circuit that becomes a resistance circuit can be accurately configured at twice the frequency.

Example 11. FIG. 17 is a circuit diagram of an amplifier according to another embodiment of the invention. In the figure, reference numerals 1 to 18 are the same as those in FIG. 48 becomes high impedance to the signal frequency f _0, f _0/2 of the feedback circuit comprising a resistor circuit in frequency, for the DC block capacitor 39 and connected between the input terminals of the FET of the closed-loop circuit 12 and the output terminal It is connected via the inductance 38 of the conductive wire.

Next, the operation will be described. 17, feedback circuit 48 becomes high impedance to the signal frequency f _0, it should be configured so that the resistance circuit at a frequency of f _0/2. Therefore, when loading a feedback circuit 48 in place of the loop oscillation condition is not satisfied in a closed loop circuit 12 at a frequency of f _0/2, the feedback circuit 48 will affect the characteristics of the signal frequency f ₀ of the amplifier Without f
Frequency components of _0/2 is absorbed by the feedback circuit 48, f ₀ /
The loop gain of the frequency component of 2 is reduced, and loop oscillation can be suppressed. Therefore, the abnormal amplification phenomenon of the signal frequency can be eliminated. In this case, it will not affect the characteristics of the signal frequency f ₀ of the amplifier for the feedback circuit 48 becomes high impedance to the signal frequency f _0.
Therefore, when the feedback circuit 48 is actually configured, the amplifiers are operated in a well-balanced manner, so that it is not necessary to connect them to the same positions of the respective parallel paths passing through the FETs 1a and 1b, and they can be connected to arbitrary positions. The effects of the DC blocking capacitor 39 and the connecting conductive wire inductance 38 can be ignored.

Example 12 FIG. 18 is a circuit diagram of an amplifier showing another embodiment of the invention. In FIG.
Reference numeral 18 is the same as the reference numeral in FIG. Reference numeral 52 denotes a feedback circuit which is opened at a signal frequency f ₀ and serves as a resistance circuit at a frequency of f _{0/2. The} feedback circuit 52 is composed of a resistor 49, a capacitor 51 and an inductor 50, and has a DC block capacitor 39, a connecting line 44 and a conductive line. It is connected between the input terminal and the output terminal of the FET of the closed loop circuit 12 via the inductance 38 of the conductive wire. FIG. 19 is a block diagram of the amplifier. Since 1 to 19 are the same as the reference numerals in FIG. The feedback circuit 52 is formed on each of the dielectric substrates 53 and 54, one end of which is connected to the input terminal of the FET and the other end of which is connected to the output terminal of the FET through the connecting conductive wires 38.

Next, the operation will be described. In FIG. 18, the impedance Z of the feedback circuit 52 is the resistance value R of the resistor 49, the capacitance C of the capacitor 51, and the transmission line 5.
It is shown by the equation (5) using the inductance L of 0. C
If L and L are selected as in equation (6), the capacitor 51 and the transmission line 50 resonate in parallel at a frequency of f ₀ to form an open circuit, and the impedance Z of the feedback circuit 52 becomes infinite.

[0077]

(Equation 3)

[0078] In addition, the capacitor 5 is at a frequency of f _0/2
The impedance of the parallel circuit of 1 and the transmission line 50 becomes capacitive, and Z becomes a resistance circuit in which a resistance and a capacitance are connected in series. Thus, if loading the feedback circuit 52 in place of the loop oscillation condition is not satisfied in a closed loop circuit 12 at a frequency of f _0/2, the feedback circuit 52 will affect the characteristics of the signal frequency f ₀ of the amplifier None, f _0/2
The frequency component of is absorbed by the resistor 49 of the feedback circuit 52 and f
_0/2 of the loop gain of the frequency component is reduced, it is possible to suppress loop oscillation. Therefore, the abnormal amplification phenomenon of the signal frequency can be eliminated. Further, since the twelfth feedback circuit uses the parallel resonant circuit using the lumped constant element, it is possible to construct a small circuit having a very large impedance at the fundamental frequency.

Example 13. FIG. 20 is a circuit diagram of an amplifier showing another embodiment of the invention. In FIG.
Reference numeral 18 is the same as the reference numeral in FIG. 55 becomes a resistance circuit at a frequency of f _0/2, and in a circuit as a short circuit at 2 · f _0, is connected via a DC blocking capacitor 56 between ground and the output matching circuit of the closed-loop circuit 12.

Next, the operation will be described. In Figure 20, in place of the closed loop circuit 12 becomes a resistance circuit at a frequency of f _0/2, and becomes a short circuit at 2 · f _0, end loading circuit 55 is grounded through a DC block 56 . Also, in order to operate the amplifier in a well-balanced manner,
The circuit 55 is loaded at the same position on each of the parallel paths passing through the FETs 1a and 1b. Circuit 55 to become a resistance circuit at a frequency of f _0/2, the frequency component of f _0/2 is absorbed in the resistor circuit. Therefore, f ₀ / of the loop circuit 12
The loop gain of the frequency component of 2 decreases and the closed loop circuit 1
The loop oscillation condition in 2 is no longer satisfied, and loop oscillation can be suppressed. Therefore, the abnormal amplification phenomenon of the signal frequency f ₀ can be eliminated. Furthermore, in the case of this configuration,
Circuit 55 no longer output power of the frequency of 2 · f ₀ for a short circuit 2 · f _0, the effect that the power efficiency of the signal frequency f ₀ is increased occurs.

Example 14 FIG. 21 is a circuit diagram of an amplifier showing another embodiment of the invention. In FIG.
Reference numeral 18 is the same as the reference numeral in FIG. 64 becomes a resistance circuit at a frequency of f _0/2, and in a circuit as a short circuit at 2 · f _0, the transmission circuit 57 of the length of 1/4 wavelength at the signal frequency, resistor 58, inductor 59, 60, 61, Capacitors 62 and 63 and DC block capacitor 5
6 and 6. One end of the transmission line 57 is connected to the output matching circuit, and the series resonance circuit including the inductor 59 and the capacitor 62, the series resonance circuit including the inductor 60 and the capacitor 63, and the inductor 61 are connected between the other end and the ground.
And a resistor 58 connected in parallel to the DC block capacitor 56.
The circuit 65 connected in parallel with the circuit connected in series is connected. FIG. 22 is a block diagram of the amplifier. 1
2 to 19, which are the same as those in FIG. 2, will not be described. The circuit 64 is formed on the dielectric substrate 17 and is connected between the output matching circuit and the ground through a through hole 66.

Next, the operation will be described. In FIG. 21, the impedance Z of the circuit 65 is the resistance value R of the resistor 58, the capacitances of the capacitors 62 and 63 are C ₁ and C ₂ , respectively, and the inductances of the transmission lines 59, 60 and 61 are L ₁ , L ₂ and L _{3 respectively.} Then, it is shown by the equation (7). Let C ₁ and L _{1 be} C ₂ and L as shown in equation (8).
_{If 2} is selected as in the equation (9) and L ₃ is selected as in the equation (10), the capacitor 62 and the transmission line 59 at the frequency of f _0.
Becomes a short circuit by series resonance, and the capacitor 63 and the transmission line 60 make a short circuit by series resonance at a frequency of 2 · f ₀ . In addition, capacitors 62 and 63, transmission lines 59 and 6
The impedance Z of the circuit 65 is R because the circuit consisting of _{0 and} 61 resonates in parallel at a frequency of f 0/2 to form an open circuit.
It becomes a resistance circuit only.

[0083]

[Equation 4]

[0084] Therefore, circuit 64 for the transmission line 57 of the length of 1/4 wavelength at the signal frequency f ₀ in the circuit 65 is connected, open circuit at a frequency of f _0, short at a frequency of 2 · f ₀ circuit, and a resistor connected in series circuit of a resistor R of the inductance and resistance 58 of the transmission line 57 at a frequency of f _0/2. Therefore, in order to operate the circuit 64 in a predetermined position where the loop oscillation condition in the closed loop circuit 12 is not satisfied and the amplifier is balanced,
a, if connected to the same position of the parallel of each path through the 1b, the frequency components of f _0/2 is absorbed by the resistor 58, f
_0/2 of the loop gain of the frequency component is reduced, it is possible to suppress loop oscillation. Therefore, the abnormal amplification phenomenon of the signal frequency can be eliminated. Moreover, further circuit 64 no longer output power of the frequency of 2 · f ₀ for a short circuit 2 · f _0, the effect that the power efficiency of the signal frequency f ₀ is increased occurs. In addition, although the above-mentioned embodiments all describe the case of two parallels, the present invention is not limited to this, and in the case of a plurality of parallel operations, the above-mentioned circuit is connected in a predetermined closed loop circuit. By doing so, the same effect can be obtained.

[0085]

As described above, according to the first aspect of the present invention, the unbalanced mode power due to the signal whose frequency in the thermal noise, which increases due to the non-linearity of the semiconductor element, is 1/2 times the fundamental frequency, is closed loop circuit. There is an effect that it can be eliminated by absorbing it by the resistance of a resistance circuit provided inside, loop oscillation can be suppressed, and abnormal amplification phenomenon in which the component of the fundamental frequency decreases can be eliminated.

According to the second aspect of the invention, the unbalanced mode power of a signal having a frequency that is 1/2 times the total frequency in the band can be absorbed over a wide band, and the abnormal amplification phenomenon of the signal frequency in the band can be prevented. The effect is that it can be resolved.

According to the third aspect of the invention, the resistance circuit is formed on the same substrate as the semiconductor element, so that the position of the resistor for absorbing the unbalanced mode is provided in the vicinity of the semiconductor element, so that the accuracy is improved. There is an effect.

Further, according to the fourth invention, since the resistance circuit is provided between the input or output matching circuit and the ground, the resistance circuit is provided at a position opposite to the input or output matching circuit of the semiconductor elements operating in parallel. There is an effect that it is effective in the case of an amplifier that cannot be loaded.

Further, according to the fifth aspect of the invention, since the resistance circuit is composed of the lumped constant elements, there is an effect that it can be made small.

According to the sixth aspect of the invention, since the resistance circuit is formed by using the open-ended line, the grounding through hole and the DC block capacitor are not required, and the matching circuit board is inexpensive. There is an effect that it can be realized with high accuracy.

Further, according to the seventh aspect of the invention, since the feedback circuit serving as the resistance circuit is constituted by the 1/2 harmonic wave of the fundamental frequency between the input terminal and the output terminal of the semiconductor element, the semiconductor elements operating in parallel are connected. There is an effect that it is effective when a resistance circuit cannot be loaded at a position opposite to an input or output matching circuit, or in the case of an amplifier configuration in which a ground circuit cannot be configured.

According to the eighth aspect of the invention, the feedback circuit is formed on the same substrate as the semiconductor element and is arranged between the semiconductors operating in parallel, so that the connection wire or the connection line of the feedback circuit can be minimized. Therefore, there is an effect that the influence can be eliminated, and the feedback circuit serving as a resistance circuit can be accurately configured at a frequency of 1/2 times the fundamental frequency.

According to the ninth aspect of the invention, the impedance is high with respect to the fundamental frequency and 1 / of the fundamental frequency is obtained.
Since the feedback circuit that functions as a resistance circuit is configured at twice the frequency, it is 1/2 without affecting the characteristics of the fundamental frequency.
There is an effect that the electric power of the harmonic wave can be absorbed.

Further, according to the tenth aspect of the invention, not only a resistance circuit is formed at a frequency of 1/2 the fundamental frequency, but also a short circuit is formed at a frequency of twice the fundamental frequency. There is an effect that the output power of the frequency is lost and the efficiency of the fundamental wave is increased.

According to the eleventh aspect of the invention, since the resonance circuit in the circuit is composed of lumped constant elements, it is possible to reduce the size to 1
There is an effect that it is possible to realize a circuit that becomes a resistance circuit at the second harmonic wave and becomes a short circuit at the second harmonic wave.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an amplifier showing an embodiment of the present invention.

2 is a configuration diagram of the amplifier of FIG. 1. FIG.

FIG. 3 is a circuit for calculating a loop gain of the loop circuit in the amplifier according to the present invention.

FIG. 4 is a diagram showing measurement results of input / output characteristics of an amplifier with and without a resistance circuit 13 provided in a closed loop circuit.

FIG. 5 is a configuration diagram of an amplifier showing an embodiment of another invention.

FIG. 6 is a configuration diagram of an amplifier showing an embodiment of another invention.

FIG. 7 is a configuration diagram of an amplifier showing an embodiment of another invention.

FIG. 8 is a configuration diagram in which a microwave amplifier including an FET, a resistance circuit, an input matching circuit, and an output matching circuit is integrally formed on the same substrate.

FIG. 9 is a circuit diagram of an amplifier showing an embodiment of another invention.

FIG. 10 is a circuit diagram of an amplifier showing an embodiment of another invention.

11 is a configuration diagram of the amplifier of FIG.

FIG. 12 is a configuration diagram of an amplifier showing an embodiment of another invention.

13 is a circuit diagram of the amplifier of FIG.

FIG. 14 is a circuit diagram of an amplifier showing an embodiment of another invention.

15 is a configuration diagram of the amplifier shown in FIG. Is.

FIG. 16 is a configuration diagram of an amplifier showing an embodiment of another invention.

FIG. 17 is a circuit diagram of an amplifier according to another embodiment of another invention.

FIG. 18 is a circuit diagram of an amplifier according to another embodiment of another invention.

FIG. 19 is a configuration diagram of FIG. 18.

FIG. 20 is a circuit diagram of an amplifier according to another embodiment of the present invention.

FIG. 21 is a circuit diagram of an amplifier according to another embodiment of another invention.

22 is a configuration diagram of the amplifier in FIG. 21. FIG.

FIG. 23 is a circuit diagram of a conventional semiconductor amplifier before stabilization.

FIG. 24 is a circuit diagram of a conventional stabilized semiconductor amplifier.

[Explanation of symbols]

1a Source grounded FET 1b Source grounded FET 2 Input terminal 3 Output terminal 4 Transmission line 5 Transmission line 6 Transmission line 7 Transmission line 8 Transmission line 9 Transmission line 74 Transmission line 75 Transmission line 10 Input matching circuit 11 Output matching circuit 12 Closed loop circuit 13 Resistance circuit 23 Resistance circuit 28 Resistance circuit 14 Connection line 21 Connection line 25 Connection line 44 Connection line 15 Resistor 22 Resistor 24 Resistor 26 Resistor 32 Resistor 36 Resistor 41 Resistor 49 Resistor 58 Resistor 16 Dielectric substrate 17 Dielectric substrate 46 Dielectric Substrate 47 Dielectric Substrate 53 Dielectric Substrate 54 Dielectric Substrate 18 Conductive Wire 38 Conductive Wire 19 Ground Plate 20 Ideal Circulator 27 GaAs Substrate 29 GaAs Substrate 30 f _{0 A} Circuit That Becomes a Resistance Circuit 35 f ₀ A circuit that becomes a resistance circuit at 1/2 40 f _0/2 in the resistance circuit circuit 45 f _0/2 in the resistance circuit circuit 31 DC block capacitor 39 DC block capacitor 56 DC block capacitor 33 an inductor 43 inductor 50 inductor 59 inductor 60 inductor 61 inductor 70 inductor 71 Inductors 72 Inductors 73 Inductors 76 Inductors 34 Capacitors 42 Capacitors 51 Capacitors 62 Capacitors 63 Capacitors 68 Capacitors 69 Capacitors 37 2 / f ₀ open-ended transmission line with a length of ¼ wavelength 48 f ₀ with high impedance and f ₀ / 2 becomes a resistance circuit 52 f ₀ has high impedance, and f _0/2 makes a resistance circuit 55 f _0/2 makes a resistance circuit, and 2 · f ₀ makes a short circuit 64 f _0/2 resistance Road, and 2 · f ₀ at a short circuit transmission line 65 f ₀ and 2 · f ₀ length of a quarter wavelength circuit 57 f ₀ as a short circuit, f _0/2 in the resistance circuit 66 through hole 67 Through-hole 77 f ₀ , open-ended transmission circuit with a length of ½ wavelength.

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[Procedure amendment]

[Submission date] October 21, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0069

[Correction method] Delete

[Procedure amendment]

[Submission date] October 21, 1994

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] Fig. 25

[Correction method] Added

[Correction content]

FIG. 25 is an explanatory diagram showing the operation of the components of the frequency f _0/2 of the circuit of Figure 23 in a closed loop constituted by parallel connection.

[Procedure 3]

[Document name to be corrected] Drawing

[Correction target item name] All drawings

[Correction method] Change

[Correction content]

FIG.

[Fig. 2]

[Figure 3]

[Figure 4]

FIG. 23

[Figure 5]

[Figure 6]

[Figure 7]

[Figure 8]

[Figure 9]

[Figure 10]

FIG. 24

FIG. 11

[Fig. 12]

[Fig. 13]

FIG. 14

FIG. 15

FIG. 16

FIG. 17

FIG. 18

FIG. 19

FIG. 20

FIG. 21

FIG. 22

FIG. 25

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Nao Takagi 5-1-1, Ofuna, Kamakura-shi Electronic Systems Research Laboratories, Mitsubishi Electric Corporation (72) Inventor, Masaki Kono 4-1-1, Mizuhara, Itami-shi Mitsubishi Electric Corporation Inside Kita Itami Works (72) Inventor Seiichi Tsuji 4-1-1 Mizuhara, Itami City Inside Kita Itami Works, Mitsubishi Electric Corporation

Claims (11)

[Claims] 1. A plurality of amplifier circuits, each of which is composed of an input matching circuit, a semiconductor element connected to the input matching circuit for amplifying a signal, and an output matching circuit connected to the semiconductor element, are connected in parallel. A microwave semiconductor amplifier comprising: a closed loop circuit to be formed; and a resistance circuit connected to a predetermined opposing position in the closed loop and absorbing a 1/2 harmonic unbalanced mode power. 2. A resistor circuit formed in a band shape between the input matching circuits or between the output matching circuits arranged opposite to each other and provided with a resistance circuit for absorbing the unbalanced mode power of 1/2 harmonic wave. The microwave semiconductor amplifier according to claim 1. 3. The microwave semiconductor amplifier according to claim 1, wherein the resistance circuit, the input matching circuit, or the output matching circuit is provided on the same substrate on which the semiconductor element is formed. 4. The microwave semiconductor amplifier according to claim 1, wherein a circuit that becomes a resistance circuit with a 1/2 harmonic is provided between the input matching circuit and ground or between the output matching circuit and ground. 5. A circuit that becomes a resistance at a 1/2 harmonic by a series circuit of an inductor and a capacitor that resonate in series with respect to a 1/2 harmonic and a resistor connected in series to a non-grounded end of the series circuit. The microwave semiconductor amplifier according to claim 4, wherein the microwave semiconductor amplifier is provided. 6. The input matching circuit or the output matching circuit is provided in parallel with a series circuit composed of an open-ended transmission line having a quarter wavelength for a half harmonic. Microwave semiconductor amplifier. 7. The microwave semiconductor amplifier according to claim 1, further comprising a feedback circuit serving as a resistance circuit with a 1/2 harmonic wave, which is provided between the input side terminal and the output side terminal of the semiconductor element. 8. The input matching circuit and the output matching circuit are connected to each other, and a feedback circuit serving as a resistance circuit with 1/2 harmonic is provided, and the feedback circuit is arranged between the semiconductor elements operating in parallel. The microwave semiconductor amplifier according to claim 1. 9. A high impedance circuit for the fundamental wave is formed between the input side terminal and the output side terminal of the semiconductor element.
9. The microwave semiconductor amplifier according to claim 8, further comprising a feedback circuit serving as a resistance circuit for the / 2nd harmonic. 10. The microwave according to claim 1, further comprising a circuit which is a resistance circuit for the 1/2 harmonic and a short circuit for the second harmonic is provided between the output matching circuit and the ground. Semiconductor amplifier. 11. The circuit comprises a transmission line having a quarter wavelength with respect to a fundamental wave, one end of the transmission line having a first series resonance circuit that resonates in series with a fundamental wave, and a series resonance with a second harmonic wave. A parallel circuit is provided in which a second series resonant circuit and a circuit that becomes a resistance circuit for the 1/2 harmonic and becomes a short circuit at the second harmonic are connected in parallel, and the transmission line and the parallel circuit are connected in series. The device according to claim 1, which is configured by being connected.
0. The microwave semiconductor amplifier described in 0.