JPH08316687A - Multilayer printed circuit board - Google Patents
Multilayer printed circuit boardInfo
- Publication number
- JPH08316687A JPH08316687A JP14138395A JP14138395A JPH08316687A JP H08316687 A JPH08316687 A JP H08316687A JP 14138395 A JP14138395 A JP 14138395A JP 14138395 A JP14138395 A JP 14138395A JP H08316687 A JPH08316687 A JP H08316687A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- layer
- shield layer
- printed wiring
- conductive paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、電気機器等に使用され
るプリント配線板に関し、特に、信号層が形成されたプ
リント配線板の上下にシ−ルド層を形成した多層構造の
多層プリント配線板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board used for electrical equipment and the like, and more particularly to a multilayer printed wiring board having a multilayer structure in which a shield layer is formed above and below a printed wiring board on which a signal layer is formed. Regarding the board.
【０００２】[0002]
【従来の技術】信号層を挟んで上下にシールド層を有す
る両面シ−ルド付き多層プリント配線板の従来の構造を
図２に示す。図２の多層プリント配線板は、絶縁性基板
２ａ上に信号層１としての配線パタ−ンを形成してなる
プリント配線板１０と、プリント配線板１０の下部に形
成された導電ペ−ストからなる第１シ−ルド層３′と、
プリント配線板１０の上部に絶縁性基板２ｂを介して形
成された導電ペーストからなる第２シ−ルド層４′と、
さらにそれぞれの外側に形成された絶縁フィルム５およ
び６によって構成されている。さらに、信号層１のうち
接地パターンとなる部分の一部とその上下の絶縁性基板
２ａおよび２ｂに、それぞれ貫通孔８ｂ、８ａおよび８
ｃを形成し、第２シ−ルド層４′（または第１シ−ルド
層３′）の導電ペ−スト膜形成時に、同時にこの貫通孔
８ｂ、８ａおよび８ｃに導電ペ−ストを充填し、第２シ
−ルド層４′と、接地パタ−ンの信号層４および第１シ
−ルド層３′間とを電気的に接続するようになってい
る。2. Description of the Related Art FIG. 2 shows a conventional structure of a double-sided shielded multilayer printed wiring board having upper and lower shield layers sandwiching a signal layer. The multilayer printed wiring board of FIG. 2 comprises a printed wiring board 10 formed by forming a wiring pattern as a signal layer 1 on an insulating substrate 2a, and a conductive paste formed under the printed wiring board 10. A first shield layer 3 ',
A second shield layer 4'made of a conductive paste formed on the printed wiring board 10 via an insulating substrate 2b;
Further, the insulating films 5 and 6 are formed on the outer sides of the respective films. Further, through holes 8b, 8a and 8 are formed in a part of the signal layer 1 which is to be the ground pattern and in the insulating substrates 2a and 2b above and below, respectively.
c, the through holes 8b, 8a and 8c are simultaneously filled with the conductive paste when the conductive paste film of the second shield layer 4 '(or the first shield layer 3') is formed. , The second shield layer 4'is electrically connected to the signal layer 4 of the ground pattern and the first shield layer 3 '.
【０００３】[0003]
【発明が解決しようとする課題】上記従来の構造による
両面シ−ルド付き多層プリント配線板は、上下シールド
層３′および４′を両面とも導電ペーストによって形成
しているため、２回の導電ペ−スト着膜と、熱硬化処理
が必要となり、生産の工程が増加する。熱硬化処理を１
度に行うには、プリント配線板１０の両面に（信号層１
側は絶縁性基板２ｂを介して）同時に導電ペーストを塗
布する必要があり、困難が予想される。また導電ペース
トは、塗布が不均一になった場合あるいは塗布面の表面
粗度などの影響を受けた場合にピンホールが発生する可
能性があり、特に図２の構造においては、導電ペ−スト
を２層設けているため信頼性に問題があった。In the multi-layer printed wiring board with double-sided shield having the above-mentioned conventional structure, since the upper and lower shield layers 3'and 4'are formed by the conductive paste, the conductive paste is formed twice. -Strike coating and heat curing are required, increasing the production process. 1 heat curing process
In order to do it once, on both sides of the printed wiring board 10 (signal layer 1
It is necessary to simultaneously apply the conductive paste on the side (via the insulating substrate 2b), which is expected to be difficult. In addition, the conductive paste may cause pinholes when the coating becomes uneven or when the surface roughness of the coating surface is affected. In particular, in the structure of FIG. Since there are two layers, there is a problem in reliability.
【０００４】本発明は上記実情に鑑みてなされたもの
で、導電ペースト塗布の回数および使用量を軽減し、か
つ工程を簡略化し、高信頼性を有する構造の両面シール
ド付きの多層プリント配線板を提供することを目的とす
る。The present invention has been made in view of the above circumstances, and provides a multilayer printed wiring board with a double-sided shield, which has a highly reliable structure in which the number and amount of conductive paste applied are reduced and the process is simplified. The purpose is to provide.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
請求項１の発明は、信号層としての配線パタ−ンが形成
されたプリント配線板と、前記プリント配線板の下部に
形成された第１シ−ルド層と、前記プリント配線板の上
部に形成された第２シ−ルド層とからなる多層プリント
配線板において、前記第１シ−ルド層または第２シ−ル
ド層のいずれか片方が金属箔により形成され、他方が導
電ペーストで形成されたことを特徴としている。In order to achieve the above object, the invention of claim 1 is a printed wiring board on which a wiring pattern as a signal layer is formed, and a printed wiring board formed under the printed wiring board. A multilayer printed wiring board comprising one shield layer and a second shield layer formed on the printed wiring board, wherein either one of the first shield layer and the second shield layer is provided. Is formed of a metal foil, and the other is formed of a conductive paste.
【０００６】また、請求項２の発明は、請求項１記載の
多層プリント配線板において、前記第１シ−ルド層また
は第２シ−ルド層のいずれか片方を形成する導電ペース
トは、前記プリント配線板に設けられた貫通孔を介し
て、前記信号層および金属箔よりなる他方のシールド層
と接続されていることを特徴としている。According to a second aspect of the present invention, in the multilayer printed wiring board according to the first aspect, the conductive paste forming either one of the first shield layer and the second shield layer is the printed paste. It is characterized in that it is connected to the other shield layer made of the signal layer and the metal foil through a through hole provided in the wiring board.
【０００７】[0007]
【作用】請求項１の発明によれば、上下シ−ルド層のい
ずれか一方を所定のパタ−ンを有する金属箔により形成
するため、導電ペ−ストにより両シ−ルド層を形成する
場合と比較して、導電ペ−ストの使用量を軽減でき、か
つ熱硬化処理工程が１回でよく工程を簡略化することが
でき、また、導電ペ−ストの塗布の不均一性や塗布面の
表面粗度の影響などによるシ−ルド層の信頼性低下を軽
減することができる。According to the first aspect of the present invention, since one of the upper and lower shield layers is formed of a metal foil having a predetermined pattern, both shield layers are formed by a conductive paste. Compared with the above, it is possible to reduce the amount of conductive paste used, and it is possible to simplify the process by only one heat curing treatment step. Moreover, non-uniformity of conductive paste coating and the coating surface It is possible to reduce the decrease in reliability of the shield layer due to the influence of the surface roughness.
【０００８】請求項２の発明によれば、上下シ−ルド層
のいずれか一方を導電ペ−ストにより形成すると同時
に、プリント配線板に形成された貫通孔に導電ペ−スト
を充填することにより、上下のシ−ルド層および信号層
間を容易に電気的に接続することができる。According to the second aspect of the present invention, by forming either one of the upper and lower shield layers with a conductive paste, the conductive paste is filled in the through hole formed in the printed wiring board. , The upper and lower shield layers and signal layers can be easily electrically connected.
【０００９】[0009]
【実施例】以下、本発明の多層プリント配線板につい
て、図１を参照しながら説明する。図１は本発明の多層
プリント配線板の一実施例を示す説明図であり、（ａ）
は斜視説明図、（ｂ）は（ａ）のＡ−Ａ′断面説明図、
（ｃ）は（ａ）のＢ−Ｂ′断面説明図である。EXAMPLE A multilayer printed wiring board of the present invention will be described below with reference to FIG. FIG. 1 is an explanatory view showing an embodiment of the multilayer printed wiring board of the present invention, (a)
Is a perspective explanatory view, (b) is an AA ′ cross-sectional explanatory view of (a),
(C) is BB 'cross section explanatory drawing of (a).
【００１０】図１に示すように両面シ−ルド付き多層プ
リント配線板は、絶縁性基板２ａ上に信号層１としての
配線パタ−ンを導電部材により形成してなるプリント配
線板１０と、プリント配線板１０の下部に形成された銅
箔からなる第１シ−ルド層３と、プリント配線板１０の
上部に絶縁性基板２ｂを介して形成された導電ペ−スト
からなる第２シ−ルド層４と、さらにそれぞれの外側に
形成された絶縁フィルム５および６によって構成されて
いる。さらに、図１（ｂ）、（ｃ）に示すように、信号
層１のうち接地パターンとなる部分については、その一
部に貫通孔７ｂを形成し、その上下の絶縁性基板２ａお
よび２ｂにもそれぞれ貫通孔７ａおよび７ｃを形成して
おき、第２シ−ルド層４の導電ペ−スト膜形成時に、同
時にこの貫通孔７ａ、７ｂおよび７ｃに導電ペ−ストを
充填し、接地パタ−ンの信号層１を第１シ−ルド層３お
よび第２シ−ルド層４と電気的に接続し、接地する。As shown in FIG. 1, the multilayer printed wiring board with a double-sided shield is a printed wiring board 10 in which a wiring pattern as a signal layer 1 is formed on a insulating substrate 2a by a conductive member, and a printed wiring board. A first shield layer 3 made of copper foil formed below the wiring board 10 and a second shield layer made of a conductive paste formed above the printed wiring board 10 via an insulating substrate 2b. It is constituted by a layer 4 and further insulating films 5 and 6 formed on the outside of each. Further, as shown in FIGS. 1B and 1C, a through hole 7b is formed in a part of the signal layer 1 which becomes a ground pattern, and the insulating substrates 2a and 2b above and below the through hole 7b are formed. Through holes 7a and 7c are formed respectively, and at the same time when the conductive paste film of the second shield layer 4 is formed, the through holes 7a, 7b and 7c are simultaneously filled with the conductive paste, and the ground pattern is formed. Signal layer 1 is electrically connected to first shield layer 3 and second shield layer 4 and is grounded.
【００１１】次に、上記の両面シ−ルド付き多層プリン
ト配線板の製造方法について説明する。先ず、エポキシ
樹脂およびゴム系樹脂を含有する樹脂組成物を含浸し
た、不飽和ポリエステルを主成分とする不織布からなる
絶縁フィルム５上に銅箔を積層し、サブストラクティブ
法によって回路を形成し第１シールド層３とした。ここ
で用いた不飽和ポリエステル不織布は、Ｂステージ状態
（半硬化状態）、またはＣステージ状態という異なる状
態をとることができ、Ｂステージ状態においては接着剤
の効果を有し、Ｃステージ状態においてはその効果を有
してない。ここでは、絶縁性フィルム５の下部に接着す
べき部材がないので、Ｃステージ状態としている。一
方、絶縁フィルム５と同様の材料からなる絶縁性基板２
ａ上に銅箔を積層し、絶縁性基板２ａをＢステージ状態
にしてサブストラクティブ法によって回路を形成し信号
層１とし、プリント配線板１０を形成する。次に、第１
シールド層３上にプリント配線板１０を積層する。続い
て、さらにその上部に、絶縁性基板２ａと同じ材料から
なる絶縁性基板２ｂをＢステージ状態で積層する。次
に、これらを所定の位置に合わせて仮留めした後、１２
０〜１６０゜Ｃ、２０〜５０Ｋｇ／ｃｍ2、１５〜４５
分の条件で熱プレスして一体化する。尚、信号層１のう
ち接地パタ−ンであるものに対して、層間接続用に一部
に貫通孔７ｂを、その上下の絶縁性基板２ａおよび２ｂ
に貫通孔７ａおよび７ｃを、それぞれ金型による打ち抜
き加工を行って形成しておく。Next, a method of manufacturing the above-mentioned multilayer printed wiring board with a double-sided shield will be described. First, a copper foil is laminated on an insulating film 5 made of a non-woven fabric containing unsaturated polyester as a main component, which is impregnated with a resin composition containing an epoxy resin and a rubber resin, and a circuit is formed by a subtractive method. The shield layer 3 was used. The unsaturated polyester nonwoven fabric used here can be in different states such as a B stage state (semi-cured state) or a C stage state, has an adhesive effect in the B stage state, and has a C stage state. It does not have that effect. Here, since there is no member to be bonded to the lower part of the insulating film 5, the C stage state is set. On the other hand, the insulating substrate 2 made of the same material as the insulating film 5
A copper foil is laminated on a, the insulating substrate 2a is placed in the B stage state, a circuit is formed by the subtractive method to form the signal layer 1, and the printed wiring board 10 is formed. Then the first
The printed wiring board 10 is laminated on the shield layer 3. Then, an insulating substrate 2b made of the same material as that of the insulating substrate 2a is further stacked thereon in the B stage state. Next, after temporarily fixing these in place,
0-160 ° C, 20-50Kg / cm 2 , 15-45
Heat press under the condition of minutes to integrate. In addition, in the signal layer 1 which is a ground pattern, a through hole 7b is partially formed for interlayer connection, and insulating substrates 2a and 2b above and below the through hole 7b are provided.
The through holes 7a and 7c are formed by punching with a mold.
【００１２】次に、熱プレス一体化した配線板の上面か
らスクリーン印刷により導電ペ−スト（三井金属塗料化
学 ポリマー型銅ペースト）を塗布し、第２シールド層
４を形成する。この時、先程形成した貫通孔７ａ、７ｂ
および７ｃ部分においても導電ペ−ストが充填されるの
で、接地パタ−ン部分の信号層１と、第１シ−ルド層３
および第２シ−ルド層４間とは電気的に接続される。続
いて、導電ペ−ストの熱硬化処理を行った後、上部にポ
リイミドからなる絶縁フィルム６を熱圧着する。この
後、第１シ−ルド層３および第２シ−ルド層４を接地す
る（図示せず）。Next, a conductive paste (Mitsui Metal Paint Chemicals polymer type copper paste) is applied by screen printing from the upper surface of the heat-press integrated wiring board to form the second shield layer 4. At this time, the through holes 7a and 7b formed previously
Since the conductive paste is filled also in the portions 7 and 7c, the signal layer 1 in the ground pattern portion and the first shield layer 3 are formed.
The second shield layer 4 is electrically connected to the second shield layer 4. Then, after heat-curing the conductive paste, an insulating film 6 made of polyimide is thermocompression-bonded to the upper part. After that, the first shield layer 3 and the second shield layer 4 are grounded (not shown).
【００１３】上記工程により得られる多層プリント配線
板は、図２に示す様な従来の多層プリント配線板におけ
る導電ペーストからなる第１シールド層３′と絶縁フィ
ルム５の２層部分を、絶縁フィルム５上に銅箔からなる
第１シールド層３を積層した片面銅付シートとしている
ので、工程上１層として扱うことができるので、層構成
を簡単化することができる。The multi-layer printed wiring board obtained by the above-mentioned steps comprises a first shield layer 3'made of a conductive paste and a two-layer portion of an insulating film 5 in a conventional multi-layer printed wiring board as shown in FIG. Since the single-sided copper-clad sheet is formed by laminating the first shield layer 3 made of copper foil on the sheet, it can be treated as one layer in the process, so that the layer structure can be simplified.
【００１４】上記の工程において、信号層１のうち接地
パタ−ンであるものに対して、その一部に貫通孔７ｂを
形成し、その上部の絶縁性基板２ｂにのみ貫通孔７ｃを
形成した場合は、同様に導電ペ−ストを塗布して第２シ
−ルド層４を形成すると、貫通孔７ｃおよび７ｂ部分に
おいて導電ペ−ストが充填されるので、接地パタ−ン部
分の信号層１を、第２シ−ルド層４とのみ接続させるこ
とができる。In the above process, a through hole 7b is formed in a part of the signal layer 1 which is a ground pattern, and a through hole 7c is formed only in the insulating substrate 2b above it. In this case, if a conductive paste is applied in the same manner to form the second shield layer 4, the conductive paste is filled in the through holes 7c and 7b, so that the signal layer 1 in the ground pattern portion is formed. Can be connected only to the second shield layer 4.
【００１５】本実施例においては、フレキシブル配線板
を用いた場合を説明したが、絶縁フィルム５および絶縁
性基板２ａとしてガラエポ等の硬質材料からなる硬質基
板を用いた場合への適用も可能である。In this embodiment, the case of using a flexible wiring board has been described, but it is also applicable to the case of using a hard substrate made of a hard material such as glass epoxy as the insulating film 5 and the insulating substrate 2a. .
【００１６】[0016]
【発明の効果】本発明のによれば、信号層に対する上下
シ−ルド層のいずれか一方のみを導電ペーストの塗布に
より形成するので、導電ペースト塗布の回数および使用
量を軽減することによりコストを低減し、かつ工程を簡
略化し、高信頼性を有する構造の多層プリント配線板を
得ることができる。According to the present invention, since only one of the upper and lower shield layers with respect to the signal layer is formed by applying the conductive paste, the cost can be reduced by reducing the number of times the conductive paste is applied and the amount used. It is possible to obtain a multilayer printed wiring board having a highly reliable structure with a reduced number of steps.
【００１７】さらに、上記の多層プリント配線板におい
て、上下シ−ルド層のいずれか一方を導電ペ−ストによ
り形成すると同時に、プリント配線板に形成された貫通
孔に導電ペ−ストを充填することにより、上下のシ−ル
ド層および信号層間を容易に電気的に接続することがで
きる。Further, in the above-mentioned multilayer printed wiring board, either one of the upper and lower shield layers is formed by a conductive paste, and at the same time, the through holes formed in the printed wiring board are filled with the conductive paste. Thus, the upper and lower shield layers and signal layers can be easily electrically connected.
【図１】本発明の多層プリント配線板の説明図であり、
（ａ）は斜視説明図、（ｂ）は（ａ）のＡ−Ａ′断面説
明図、（ｃ）は（ａ）のＢ−Ｂ′断面説明図である。FIG. 1 is an explanatory view of a multilayer printed wiring board of the present invention,
(A) is a perspective explanatory view, (b) is an AA 'cross section explanatory view of (a), (c) is a BB' cross section explanatory view of (a).
【図２】従来の多層プリント配線板の断面説明図であ
る。FIG. 2 is a cross-sectional explanatory view of a conventional multilayer printed wiring board.
１…信号層、 ２ａ、２ｂ…絶縁性基板、 ３…第１シ
−ルド層、 ４…第２シールド層、 ５，６…絶縁フィ
ルム、 ７ａ，７ｂ，７ｃ…貫通孔、 １０…プリント
配線板DESCRIPTION OF SYMBOLS 1 ... Signal layer, 2a, 2b ... Insulating substrate, 3 ... First shield layer, 4 ... Second shield layer, 5, 6 ... Insulating film, 7a, 7b, 7c ... Through hole, 10 ... Printed wiring board
Claims (2)
プリント配線板と、前記プリント配線板の下部に形成さ
れた第１シ−ルド層と、前記プリント配線板の上部に形
成された第２シ−ルド層とからなる多層プリント配線板
において、 前記第１シ−ルド層または第２シ−ルド層のいずれか片
方が金属箔により形成され、他方が導電ペーストで形成
されたことを特徴とする多層プリント配線板。1. A printed wiring board on which a wiring pattern as a signal layer is formed, a first shield layer formed on a lower portion of the printed wiring board, and an upper portion of the printed wiring board. In a multilayer printed wiring board including a second shield layer, one of the first shield layer and the second shield layer is formed of a metal foil, and the other is formed of a conductive paste. Characteristic multilayer printed wiring board.
のいずれか片方を形成する導電ペーストは、前記プリン
ト配線板に設けられた貫通孔を介して、前記信号層およ
び金属箔よりなる他方のシールド層と接続されているこ
とを特徴とする請求項１記載の多層プリント配線板。2. The conductive paste forming either one of the first shield layer and the second shield layer, the signal layer and the metal foil through a through hole provided in the printed wiring board. The multilayer printed wiring board according to claim 1, wherein the multilayer printed wiring board is connected to the other shield layer made of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14138395A JP3605883B2 (en) | 1995-05-17 | 1995-05-17 | Multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14138395A JP3605883B2 (en) | 1995-05-17 | 1995-05-17 | Multilayer printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08316687A true JPH08316687A (en) | 1996-11-29 |
| JP3605883B2 JP3605883B2 (en) | 2004-12-22 |
Family
ID=15290726
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14138395A Expired - Fee Related JP3605883B2 (en) | 1995-05-17 | 1995-05-17 | Multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3605883B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002076535A (en) * | 2000-08-31 | 2002-03-15 | Sumitomo Metal Mining Co Ltd | Wiring board, substrate therefor, and their manufacturing methods |
| JP2007281303A (en) * | 2006-04-10 | 2007-10-25 | Fujikura Ltd | Printed wiring board, and its manufacturing method |
| JP2012028601A (en) * | 2010-07-26 | 2012-02-09 | Brother Ind Ltd | Electronic apparatus |
| JP2019029591A (en) * | 2017-08-02 | 2019-02-21 | 帝国通信工業株式会社 | Connector connection part of circuit board and manufacturing method of the same |
-
1995
- 1995-05-17 JP JP14138395A patent/JP3605883B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002076535A (en) * | 2000-08-31 | 2002-03-15 | Sumitomo Metal Mining Co Ltd | Wiring board, substrate therefor, and their manufacturing methods |
| JP4505700B2 (en) * | 2000-08-31 | 2010-07-21 | 住友金属鉱山株式会社 | Wiring substrate base material and method for manufacturing wiring substrate. |
| JP2007281303A (en) * | 2006-04-10 | 2007-10-25 | Fujikura Ltd | Printed wiring board, and its manufacturing method |
| JP2012028601A (en) * | 2010-07-26 | 2012-02-09 | Brother Ind Ltd | Electronic apparatus |
| JP2019029591A (en) * | 2017-08-02 | 2019-02-21 | 帝国通信工業株式会社 | Connector connection part of circuit board and manufacturing method of the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3605883B2 (en) | 2004-12-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20010010303A1 (en) | Multilayer combined rigid/flex printed circuit board containing flexible soldermask | |
| EP1123643B1 (en) | Printed board assembly and method of its manufacture | |
| JPH08125342A (en) | Flexible multilayered wiring board and its manufacture | |
| JP2864270B2 (en) | Multilayer wiring board and method of manufacturing the same | |
| US7259333B2 (en) | Composite laminate circuit structure | |
| JPH08107266A (en) | Printed-wiring board | |
| US20020048137A1 (en) | Two-layered embedded capacitor | |
| JPH08316687A (en) | Multilayer printed circuit board | |
| JPH07106728A (en) | Rigid-flexible printed wiring board and manufacture thereof | |
| JP3705370B2 (en) | Manufacturing method of multilayer printed wiring board | |
| JPS5854520B2 (en) | Printed board manufacturing method | |
| JPH10173342A (en) | Multilayer flexible rigid wiring board and production thereof | |
| KR100222754B1 (en) | Fabrication method of rigid-flexible laminate elevation of surface confidence | |
| JP3238901B2 (en) | Multilayer printed wiring board and method of manufacturing the same | |
| JPH0380359B2 (en) | ||
| JPH0717166Y2 (en) | Multilayer flexible printed wiring board | |
| JPH06244557A (en) | Manufacture of multilayered wiring board | |
| JPH0278253A (en) | Multilayer plastic chip carrier | |
| JPH0499394A (en) | Multilayer printed circuit board | |
| JP2770262B2 (en) | Method of manufacturing multilayer substrate with built-in resistor | |
| JPH09181453A (en) | Multilayer wiring board and its manufacturing method | |
| JPH11204896A (en) | Printed wiring board with flexible part and its manufacture | |
| JPH1154871A (en) | Printed circuit board and its manufacture | |
| JPH08148812A (en) | Printed wiring board and its manufacture | |
| JPH08116175A (en) | Multilayer printed wiring board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20040427 |
|
| A521 | Written amendment |
Effective date: 20040628 Free format text: JAPANESE INTERMEDIATE CODE: A523 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Effective date: 20040914 Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20040927 |
|
| R150 | Certificate of patent (=grant) or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20071015 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 4 Free format text: PAYMENT UNTIL: 20081015 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 5 Free format text: PAYMENT UNTIL: 20091015 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 6 Free format text: PAYMENT UNTIL: 20101015 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 7 Free format text: PAYMENT UNTIL: 20111015 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 8 Free format text: PAYMENT UNTIL: 20121015 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 8 Free format text: PAYMENT UNTIL: 20121015 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Year of fee payment: 9 Free format text: PAYMENT UNTIL: 20131015 |
|
| LAPS | Cancellation because of no payment of annual fees |