JPH08316450A - Multilayer solid-state image pickup device and its manufacture - Google Patents

Abstract

PURPOSE: To eliminate factors constituting step-difference from the base of a photoelectric conversion film, by forming a photoelectric conversion film coming into contact with a silicon substrate surface, and applying a voltage. CONSTITUTION: A second conductivity type source/drain diffusion layer 101 is formed in the interior of a silicon substrate 100. An insulating film 102 and a high concentration doped gate electrode 103 are formed on the surface 109 of the substrate 100. Thus, M0S structure is formed. Via an interlayer insulating film 104, wiring 105 is formed, on which an protective insulating layer 106 is formed. A photoelectric conversion film 107 is formed in contact with the surface 109 of the silicon substrate 100. A constant voltage is applied across a transparent electrode 108 on the film 107 and the surface 109. An incident light is converted to an electric signal. It is transmitted to the substrate 100, amplified by the MOS 1 structure, and outputted. Thereby, the electric field distribution is made uniform, and sensitivity difference between picture elements.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device and a method for manufacturing the same, and more particularly, to a structure suitable for a so-called laminated solid-state image pickup device having a photoelectric conversion means including a photoelectric conversion film, and manufacturing thereof. It is about the method.

[0002]

2. Description of the Related Art With the progress of development of high-definition television, there is an increasing demand for a solid-state image pickup device having a large number of pixels and a high density. In order to meet such a demand, a so-called stacked type solid-state imaging device has been devised which uses a photoelectric conversion film stacked above a signal processing circuit as photoelectric conversion means of the solid-state imaging device. An example of such a stacked solid-state image sensor is "A 2-Million Pixcel CCD Imager Ove".
rlaid with an AmorphousSilicon Photoconversion Lay
er ", ISSCC (International Solid-State Circuits Con
ference) Digest of Technical Papers, pp. 50-51, Fe
b., 1988 ("A2-Million Pixel CCD Imager Overlay Do With An Amorphous Silicon Photoconversion Layer", ISSC (International Solid-State Circuits Conference) Digest of Technical Papers, pp. 50-51,
February, 1988).

This will be described below with reference to FIG.
A p-type diffusion layer 201, an n− type diffusion layer 202 and an n + type diffusion layer 205 are provided on the p type silicon substrate 200, and a polysilicon 204 is provided on the surface of the p type silicon substrate 200 via a silicon dioxide 203. Are provided as transfer electrodes. These n-
Type diffusion layer 202, silicon dioxide 203, and polysilicon 204 are M
It constitutes the OS structure and acts as a vertical CCD. The p-type diffusion layer 201 is a diffusion layer that functions as an element isolation layer. further,
Mo polycide 206, BPSG 207,
A pixel electrode 208 is provided, and amorphous silicon 209 is deposited on these bases. Above this amorphous silicon 209, amorphous silicon carbide 210, which serves as an electron blocking layer, and amorphous silicon 209
There is a transparent electrode 211 made of indium lead oxide for applying a voltage to. The operation of the device is roughly as follows. Light incident on the amorphous silicon 209 to which a voltage is applied by the transparent electrode 211 and the pixel electrode 208 is photoelectrically converted into an electric signal, which is transmitted from the pixel electrode 208 to the n + type diffusion layer 205 via the Mo polycide 206. ,
Further, after being sent to the n-type diffusion layer 202 constituting the vertical CCD, it is transferred in accordance with the operation of this vertical CCD.

[0004]

In the above conventional example, the vertical
Amorphous silicon 209 is provided on the upper layer of the CCD to perform photoelectric conversion. Polysilicon 204 and Mo polycide 2
There is a problem in that the unevenness of the underlying layer due to 06 and the step due to the edge 212 of the pixel electrode 208 make the electric field distribution inside the amorphous silicon 209 non-uniform, causing variations in sensitivity between pixels and an increase in dark current due to local electric field concentration. Since the variation in sensitivity and the increase in dark current for each pixel are equivalent to the increase in noise, this problem causes a decrease in sensitivity and dynamic range. Further, when a high voltage is applied to the photoelectric conversion film to multiply the signal inside the film, this problem becomes more serious, and the dark current increase due to local electric field concentration under a high electric field is caused by the photoelectric conversion film. Can also be the cause of destruction of.

As described above, the above-mentioned problems exist in the conventional example, and they have not been sufficiently taken into consideration.

An object of the present invention is to provide a laminated solid-state imaging device and a method for manufacturing the same, which can solve the above-mentioned problems caused by unevenness and steps of the base of the photoelectric conversion film.

[0007]

The above object is to provide a photoelectric conversion film having a MOS structure and a surface of a silicon substrate on which an element for processing the electric signal (including scanning of the signal) is formed, or this silicon substrate. Is formed so as to be in direct contact with another surface having the same flatness as the surface of, and the surface of the silicon substrate or the other surface having the same flatness as the surface of the silicon substrate applies a voltage to the photoelectric conversion film. It is achieved by configuring as part of the applying means.

[0008]

[Function] An element for forming irregularities and steps from the base of the photoelectric conversion film by forming a photoelectric conversion film so as to contact the surface of the silicon substrate and applying a voltage (polysilicon 204, Mo polycide 206 in the above conventional example) , Pixel electrode 208)
Is removed, and the voltage is applied in a state where the flatness of the base is improved. As a result, the uniformity of the electric field distribution inside the photoelectric conversion film is improved, and variations in sensitivity between pixels and an increase in dark current can be suppressed. It goes without saying that the same effect can be obtained even when the photoelectric conversion film is formed so as to come into contact with another surface having the same flatness as the surface of the silicon substrate and a voltage is applied.

[0009]

【Example】

Example 1 A sectional view of Example 1 of the present invention is shown in FIG. FIG. 1 shows a solid-state imaging device having a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed, and including a MOS structure and processing the electric signal. 2 is an example of a structure in which a photoelectric conversion film is formed on the surface of a silicon substrate on which an element to be formed is formed.

A second conductive type source / drain diffusion layer 101 is provided inside the first conductive type silicon substrate 100, and an insulating film 102 made of, for example, silicon dioxide and a high concentration layer on the surface 109 of the silicon substrate 100. A gate electrode 103 made of doped polycrystalline silicon is formed, and these silicon substrate 100, insulating film 102, and gate electrode 103 form a MOS structure. Further, the MOS structure and the source / drain diffusion layer 101 function as a MOS transistor element. further,
A wiring 105 made of, for example, Al is formed via an interlayer insulating film 104 made of, for example, silicon dioxide, and a protective insulating film 106 made of, for example, silicon dioxide is formed thereon. The MOS transistor element and the wiring 105 constitute, for example, a signal processing circuit. On the other hand, the photoelectric conversion film 107 made of, for example, amorphous silicon is formed on the surface 1 of the silicon substrate 100 on which the MOS transistor element is formed.
It is formed so as to be in contact with 09, and functions to convert incident light into an electric signal in the state where a constant voltage is applied between the upper transparent electrode 108 and the surface 109 of the silicon substrate 100. As a material for the transparent electrode 108, for example, indium lead oxide (ITO) can be used. In addition,
In FIG. 1, the element isolation structure of the MOS transistor, the transparent electrode 1
The voltage applying means to 08 is omitted for simplicity, and this is the same in the following figures. The operation of this element is as follows. The light incident on the photoelectric conversion film 107 is photoelectrically converted into an electric signal in the film, and the photoelectric conversion film 10
Transferred to the silicon substrate 100 through the surface 109 with which 7 is in contact. Then, by connecting the input end of the signal processing circuit composed of MOS transistor elements to the silicon substrate 100, this electric signal is amplified and output.

In this embodiment, the photoelectric conversion film 107 is formed so as to come into contact with the surface 109 of the silicon substrate 100 on which the element including the MOS structure is formed. Generally, the gate electrode 102
The unevenness caused by the wiring 105 and the wiring 105 is about several tens to several hundreds of nm, while the unevenness on the surface 109 of the silicon substrate 100 used for forming the element including the MOS structure is about 10 nm or less. Therefore, by using the structure of this embodiment, the unevenness of the base can be significantly reduced as compared with the case where the photoelectric conversion film 107 is formed over the gate electrode 102 or the wiring 105, and the electric field distribution inside the photoelectric conversion film is uniform. It is possible to improve the characteristics and suppress variations in sensitivity between pixels and an increase in dark current.

Further, by providing photoelectric conversion means also in the silicon substrate 100, incident light can be more effectively converted into an electric signal, and the sensitivity can be improved.

Further, the solid-state image pickup device having a high pixel density can be realized more easily by using the following means and structure together.

(1) An electric signal is multiplied inside the photoelectric conversion film 107. For example, by applying an appropriate voltage between the transparent electrode 108 and the silicon surface 109 so that a high electric field necessary to cause the avalanche phenomenon is generated, the avalanche increase of the electric signal in the photoelectric conversion film 107 can be achieved. Can be doubled. As a result, it is possible to increase the sensitivity or reduce the pixels while maintaining the sensitivity.

(2) MOS to which an electric signal is first input
A capacitance for accumulating an electric signal from the photoelectric conversion film 107 is provided at a signal input end of the element including the structure. This allows
The amount of electric signals that can be handled increases, a high saturated light amount can be obtained, and the pixel size can be reduced.

The photoelectric conversion film 107 is not limited to the surface of the silicon substrate on which the element including the MOS structure is formed,
It may be formed on another surface having the same flatness. Further, the photoelectric conversion film formed on the surface of another substrate may be arranged so as to be in contact with the surface of the silicon substrate on which the element including the MOS structure is formed. Further, the photoelectric conversion film 107 may include a charge injection blocking layer, an electric field relaxation layer, or the like.

Further, the element having the MOS structure is not limited to the MOS transistor element, and may be a CCD element, for example.

Embodiment 2 A sectional view of Embodiment 2 of the present invention is shown in FIG. FIG. 3 shows a solid-state imaging device having a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed, including a MOS structure and processing the electric signal. Another embodiment of a structure in which a photoelectric conversion film is formed on the surface of a silicon substrate on which an element to be formed is formed will be shown. FIG.
The cross-sectional structure of the present embodiment shown in is basically similar to the structure of the first embodiment, but the diffusion layer 300 is formed in the region where the photoelectric conversion film 107 is present, and the electric signal passes through the diffusion layer 300 and the silicon substrate. It is different in that it is taken out. Although the device operation is similar to that described in the first embodiment, when the diffusion layer 300 has a conductivity type opposite to that of the silicon substrate 100, the input end of the signal processing circuit constituted by the MOS transistor device is connected to the diffusion layer 300. Need to be connected to.

By adopting the structure of this embodiment, it is possible to set the conductivity type and the impurity concentration on the surface 109 in contact with the photoelectric conversion film 107 independently of the conductivity type and the impurity concentration of the silicon substrate 100. . Moreover, since the diffusion layer 300 is formed inside the silicon substrate 100, the gate electrode 103
It does not increase the unevenness of the base unlike the wiring 105. As a result, it is possible to select the optimum conductivity type and impurity concentration for taking out an electric signal according to the characteristics of the photoelectric conversion film 107 without impairing the flatness of the surface 109 that is the base of the photoelectric conversion film 107.

Embodiment 3 A sectional view of Embodiment 3 of the present invention is shown in FIG. 4, and a plan view thereof is shown in FIG.
Shown in FIGS. 4 and 5 show a solid-state imaging device having a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed. It is another embodiment of a structure in which a photoelectric conversion film is formed on the surface of a silicon substrate on which an element for processing a signal is formed, and particularly shows a structure suitable for a one-dimensional solid-state imaging device. The cross-sectional structure of this embodiment shown in FIG. 4 basically conforms to the structure of the second embodiment, but the diffusion layer 301 formed in the region where the photoelectric conversion film 107 is present has a conductivity opposite to that of the silicon substrate 100. The difference is that it is a mold and is patterned.

A more detailed description will be given below with reference to FIG. The diffusion layer 301 is not uniformly formed in the region where the photoelectric conversion film 107 is present, but a plurality of patterned layers are formed on the stripe. Then, by applying a reverse bias to the diode formed by the plurality of diffusion layers 301 and the silicon substrate 100, the plurality of diffusion layers 301 and the diffusion layer 301 and the silicon substrate 100 are electrically isolated. be able to. Therefore, by extracting the electric signal from the photoelectric conversion film 107 through the plurality of diffusion layers 301, it becomes possible to obtain one-dimensional position information of the incident light. The electric signal thus obtained can be scanned and amplified by the signal processing circuit 302 electrically connected to the diffusion layer 301, and further sufficiently amplified by the output amplification circuit 303 and output to the outside. it can. Further, the signal processing circuit 302 and the output amplification circuit 303 can be easily configured by the element using the MOS structure included in FIG.

As described above, by adopting the structure of this embodiment, it is possible to construct a one-dimensional sensor while taking advantage of the advantages of the second embodiment.

The conductivity type of the diffusion layer 301 is set to the silicon substrate 1.
When it has the same conductivity type as 00, a diffusion layer having a conductivity type opposite to that of the silicon substrate 100 may be formed so as to completely include the diffusion layer 301. Further, by connecting wiring between the diffusion layer 301 and the signal processing circuit 302 outside the region where the photoelectric conversion film 107 is formed, the conductivity type of the diffusion layer 301 and the signal processing circuit 302 are connected.
The conductivity type of the diffusion layer used for the element constituting the can be set independently of each other. Further, the plane shape of the diffusion layer 301 is not limited to the simple stripe shape as shown in FIG. 5, and may be another plane shape as long as the plurality of diffusion layers 301 can be electrically separated. Is also good.

Embodiment 4 FIG. 6 is a sectional view of Embodiment 4 of the present invention, and FIG.
Shown in 6 and 7 show a solid-state imaging device having a photoelectric conversion film, an element including a MOS structure for processing the electric signal, and a silicon substrate on which the element is formed, and including the MOS structure. This is an example of a structure in which a photoelectric conversion film is formed on another surface having the same flatness as the surface of a silicon substrate on which a signal processing element is formed, and a structure particularly suitable for a two-dimensional solid-state image pickup element is shown. ing.

The feature of this embodiment is that the element including the MOS structure and the photoelectric conversion film are formed on the surfaces belonging to different main surfaces of the silicon substrate and having the same flatness, and in addition, the photoelectric conversion is performed. The point is that a signal transmission means for transmitting an electric signal from the film to the element including the MOS structure is provided inside the silicon substrate.

First, FIG. 6 will be described. An insulating film 102 and second-conductivity-type source / drain diffusion layers 101, 101a are formed on a first surface 109a of the first conductivity type silicon substrate 600, which is one main surface.
And a gate electrode 103 are formed, which constitute a MOS transistor element. On the other hand, the photoelectric conversion film 107 is formed on the second surface 109b that is the other main surface of the silicon substrate 600, and light is incident from the side of the first surface 109b and photoelectric conversion is performed in the photoelectric conversion film 107. To be done. Then, a transparent electrode 108 is formed to apply a predetermined voltage to the photoelectric conversion film 107 to perform photoelectric conversion, and a second conductive type diffusion layer 603 is formed to capture an electric signal generated in the photoelectric conversion film 107. ing. Further, the second-conductivity-type source / drain diffusion layer 101a and the second-conductivity-type diffusion layer 603 are made of, for example, a second-conductivity-type polycrystalline silicon that is embedded in a silicon substrate and is highly doped. It is electrically connected by the body 602, and thereby an electric signal is transmitted from the photoelectric conversion film 107 to the MOS transistor element on the first surface 109a through the second conductivity type diffusion layer 603 and the conductor 602. Here, the MO of the first surface 109a
The S transistor element is provided in one-to-one correspondence with the diffusion layer 603 of the second conductivity type and has a function of switching the electric signal from the photoelectric conversion film 107. Further, by using, for example, a double-side polished silicon substrate as the first conductivity type silicon substrate 600, the first conductivity type silicon substrate 60
A first surface 109a on one main surface and a second surface on the other main surface
The flatness of the surface 109b can be made equal, and even if the diffusion layer 603 is provided, this flatness is not impaired, as described in the second embodiment. Note that, in FIG. 6, the interlayer insulating film 104, the wiring 105, and the protective insulating film 106 in FIG. 1 are omitted for simplification, and this is the same in the sectional views after the present embodiment.

Next, FIG. 7 which is a plan view of the device shown in the sectional view of FIG. 6 will be described. In the region where the photoelectric conversion film 107 is present, the second conductive type diffusion layer 603 formed in an island shape is formed.
Although arranged in a dimension, the plurality of diffusion layers 603 and the silicon substrate 600 can be electrically separated from each other in the same manner as in the third embodiment. Therefore, a plurality of second conductivity type diffusion layers
An electric signal from the photoelectric conversion film 107 is taken out through 603,
In addition, the Y-direction scanning signal processing circuit 604 and the X-direction scanning signal processing circuit 605 are used to sequentially switch the MOS transistor elements of FIG. 6 to scan the electric signal while specifying the position on the two-dimensional plane. It can be taken out, that is, a two-dimensional solid-state imaging device can be constructed. The extracted electric signal is finally sufficiently amplified by the output amplifier circuit 303 and then output to the outside. It is needless to say that the X-direction scanning signal processing circuit 605, the Y-direction scanning signal processing circuit 604, and the output amplifier circuit 303 can be configured by an element including a MOS structure formed on the main surface on the first surface 109a side. Yes.

In the structure of this embodiment, the element including the MOS structure and the photoelectric conversion film 107 are formed on the surfaces belonging to different main surfaces of the silicon substrate 600 and having the same flatness. , The photoelectric conversion film can be formed on the surface having high flatness without being affected by the increase in the step difference of the underlying layer due to the element including the MOS structure. Further, when the element including the MOS structure and the photoelectric conversion film 107 are formed on the same main surface as in the first embodiment, the diffusion layer 603 is formed with a MOS transistor for switching electric signals in a one-to-one correspondence. It is necessary to completely separate the region to be formed and the region where the photoelectric conversion film 107 is formed, so that the chip area is increased. On the other hand, in the structure of this embodiment, the element including the MOS structure and the photoelectric conversion film 107 are formed on different main surfaces, and the signal transmission means is formed inside the silicon substrate. As a result, it becomes possible to completely overlap the diffusion layer 603 with the region for forming the MOS transistor for switching electrical signals in a one-to-one correspondence and the region for forming the photoelectric conversion film 107, thereby increasing the chip area. Can be suppressed.

As described above, by adopting the structure of this embodiment, it is possible to construct a two-dimensional solid-state image pickup device having a small chip area without deteriorating the flatness of the base of the photoelectric conversion film.

Before the light enters the photoelectric conversion film 107, it passes through a filter for attenuating the light in the wavelength region not intended, so that the MO on the first surface 109a side can be reduced.
It is possible to prevent the operation of the device including the S structure from being affected by the incident light. For example, in the case of an element intended for imaging in the visible light region, a filter that attenuates the infrared region may be provided. Further, the advantage of providing the photoelectric conversion means inside the silicon substrate 600 in addition to the photoelectric conversion film 107 formed on the second surface 109b is as described in the first embodiment.

Embodiment 5 Cross-sectional views of Embodiment 5 of the present invention are shown in FIGS. FIG.
Numerals 12 to 12 are solid-state imaging devices including a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed, including a MOS structure and processing the electric signal. FIG. 8 is a cross-sectional structure, and FIG. 9 to FIG. 12 are other examples of the structure in which the photoelectric conversion film is formed on another surface having the same flatness as the surface of the silicon substrate on which the element to be formed is formed. The manufacturing method will be described. The structure of FIG. 8 basically conforms to the structure of Example 4, but the silicon substrate is a bonded silicon substrate and has an insulating film in contact with the second surface, and the photoelectric conversion film is formed. Forming a device including a second surface and a MOS structure
The difference is that there is a region thicker than the substrate thickness between the substrate and the surface of the substrate.

First, FIG. 8 will be described. A first conductivity type first silicon layer 801 and a first conductivity type or a second conductivity type second
In the bonded silicon substrate comprising the silicon layer 803 and the silicon oxide film 802 provided between them,
First surface 109a of first conductivity type first silicon layer 801
Insulating film 102 and second conductivity type source / drain diffusion layer 1
01 and 101a and the gate electrode 103 are formed, and these are MOS
It constitutes a transistor element. Further, there is a region 805 having a small substrate thickness and a region 804 having a large substrate thickness, and in the region 805 having a small substrate thickness, the second silicon layer 803 of the first conductivity type or the second conductivity type and the silicon oxide Membrane 802
Are removed to expose the second surface 109b of the first conductivity type first silicon layer 801. And this second surface
A photoelectric conversion film 107 is deposited on 109b, and light is emitted from the second surface 109.
The light enters from the side of b and is photoelectrically converted in the photoelectric conversion film 107.
Further, the electric signal from the photoelectric conversion film 107 is taken in through the diffusion layer 603 of the second conductivity type, and the first electric signal by the conductor 602.
Is transmitted to the MOS transistor element on the surface 109a. On the other hand, in the region 804 where the substrate thickness is large, the second silicon layer 803 of the first conductivity type or the second conductivity type and the silicon oxide film 8 are formed.
02 and are left.

In the embodiment shown in FIG. 8, a bonded silicon substrate is used as the silicon substrate, and the silicon surface at the interface generated by the bonding is the second surface 109b.
The interface between the silicon oxide film and the silicon in the bonded silicon substrate is an interface formed by thermally oxidizing mirror-polished silicon, or an interface formed by pressure-bonding the silicon oxide film to the mirror-polished silicon surface. However, the silicon surface at this interface has the same high flatness as the surface on which the element including the MOS structure is formed. Further, since the substrate thickness in the region where the photoelectric conversion film 107 is formed is small, the signal transmission means for transmitting the electric signal from the photoelectric conversion film 107 to the MOS transistor element on the first surface 109a is formed. On the other hand, since a region with a large substrate thickness is provided, it is possible to prevent the mechanical strength of the silicon substrate from decreasing and prevent the silicon substrate from being bent or cracked during the element formation process. You can

As described above, by adopting the structure of the embodiment shown in FIG. 8, a two-dimensional solid-state image pickup device which is easy to manufacture and has a small chip area can be obtained without deteriorating the flatness of the base of the photoelectric conversion film. It is possible to build.

By forming at least a part of the element including the MOS structure formed on the first surface 109a in a region having a large substrate thickness, the influence of incident light on the element including the MOS structure can be reduced. can do. Therefore, by forming a signal processing circuit including an element including a MOS structure, for example, a signal amplification circuit, a driving circuit, an A / D conversion circuit, etc. in a region where the substrate thickness is large, the operation of these peripheral circuits Can be made more stable. Further, the advantage of providing the photoelectric conversion means inside the first silicon layer 801 in addition to the photoelectric conversion film 107 formed on the second main surface 109b is as described in the first embodiment.

Next, FIGS. 9A to 9C showing a method of manufacturing the structure of FIG.
FIG. 12 will be described. FIG. 9 shows a silicon substrate for forming an element, which includes a first conductive type first silicon layer 801 (for example, a p type silicon layer) and a first conductive type or second conductive type second silicon layer 801. The bonded silicon substrate is composed of a layer 803 (for example, a p-type or n-type silicon layer) and a silicon oxide film 802 provided between the two silicon layers. Further, 109a indicates the first surface and 109b indicates the second surface. On the first surface 109a, the insulating film 102 is deposited by, for example, thermal oxidation, and the gate electrode 103 is deposited by, for example, polycrystalline silicon by a low pressure CVD method, and after high-concentration doping, patterning is performed. The drain diffusion layers 101 and 101a are respectively formed by ion implantation of arsenic and diffusion. In addition, the second conductive type diffusion layer 60 is formed on the second surface 109b.
3 is formed, and a conductor 602 made of, for example, highly doped second-conductivity polycrystalline silicon is formed inside the first silicon layer 801 (FIG. 10). At this time, the substrate thickness of a normal silicon substrate is about several hundreds μm, whereas the substrate thickness of the first silicon layer 801 is set to about 1 to several tens μm in the bonded silicon substrate. You can Therefore, it becomes very easy to form the conductor 602 that constitutes the signal transmission means. Next, in order to form a region with a small thickness of the substrate on which the photoelectric conversion film is formed,
After partially forming a mask on the third surface 109c of the second silicon layer 803, the second silicon layer 803 is removed by wet etching using, for example, a mixed solution of hydrofluoric acid and nitric acid (FIG. 11). Although the mask on the third surface 109c is already removed in FIG. 11, it is possible to perform the subsequent process without removing it. Furthermore, the second surface
In order to expose 109b, the silicon oxide film 802 is removed by wet etching using hydrofluoric acid, for example (FIG. 12).
Finally, the second part exposed in the area 805 where the substrate thickness is small.
A photoelectric conversion film 107 of, for example, amorphous silicon and a transparent electrode 1 made of, for example, indium lead oxide are formed on the surface 109b of the
08 is deposited to complete the structure shown in FIG.

In the embodiment of the manufacturing method shown in FIGS. 9 to 12 and FIG. 8, the device including the MOS structure on the side of the first surface 109a is removed by removing the second silicon layer 803 to reduce the substrate thickness. Forming before forming the small region 805 reduces the number of process steps performed after forming the region 805 having a small substrate thickness and exposing the second surface 109b. Therefore, by adopting such a manufacturing method, it is possible to effectively prevent the substrate from cracking or bending. Also, the second surface 109b
The etching of the silicon oxide film 802 for exposing the film can be performed with a very high selection ratio with respect to silicon by using, for example, hydrofluoric acid. As a result, the first silicon layer 801 becomes a good etching stopper, so that the variation in film thickness of the first silicon layer 801 due to the variation in etching can be suppressed.

Embodiment 6 Cross-sectional views of Embodiment 6 of the present invention are shown in FIGS. 13 to 16 show a solid-state imaging device having a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed, and including the MOS structure. 13 is another example of the structure in which the photoelectric conversion film is formed on the other surface having the same flatness as the surface of the silicon substrate on which the element for processing the
Shows a sectional structure, and FIGS. 14 to 16 show an embodiment of a method for manufacturing the structure. The structure and manufacturing method of this embodiment are basically the same as those of the fifth embodiment, but the bonded silicon substrate used as the silicon substrate is composed of three silicon layers and two silicon oxide films. And a photoelectric conversion film is formed in two electrically separable silicon layers each having the above structure.

First, FIG. 13 will be described. First of the first conductivity type
Silicon layer 1301 and second silicon layer 1302 of the first conductivity type
And a third silicon layer 13 of the first conductivity type or the second conductivity type
In the bonded silicon substrate consisting of 03 and the first and second silicon oxide films 1304 and 1305 provided between them, the first surface of the first conductivity type first silicon layer 1301.
An insulating film 102, second-conductivity-type source / drain diffusion layers 101 and 101a, and a gate electrode 103 are formed on 109a.
It constitutes a transistor element. In the region 805 where the substrate thickness is small, the third silicon layer 1303 of the first conductivity type or the second conductivity type and the second silicon oxide film 1305 are formed.
Are removed and the second surface 109b is exposed, and the photoelectric conversion film 107 deposited here photoelectrically converts the light incident from the second surface 109b side. Further, the generated electric signal is taken in through the diffusion layer 603 of the second conductivity type, and the conductor 60 provided through the first silicon oxide film 1304.
2 is transmitted to the MOS transistor element on the first surface 109a. On the other hand, in the region 804 where the substrate thickness is large, the first
The third silicon layer 1303 of the conductivity type or the second conductivity type and the second silicon oxide film 1305 remain without being removed.

In the embodiment shown in FIG. 13, the first surface 10
The first silicon oxide film 1304 is formed between the surface 9a and the second surface 109b.
Is provided. As a result, the first silicon layer 1301 and the second silicon layer 1302 can be electrically separated, and an optimal substrate bias voltage can be applied to each. In addition, the impurity concentration distributions of the respective silicon layers and the diffusion layers formed therein are also different from those of the first silicon layer 1301 and the second silicon layer 1301.
It can be set independently of the silicon layer 1302, and a value suitable for each can be easily set. The first silicon layer 1301 and the second silicon layer 1302 may have different conductivity types. At this time, the source / drain diffusion layer 10
1 and 101a and the diffusion layer 603 also need to have a conductivity type opposite to that of the silicon layer to which they belong.

Next, FIG. 1 showing a method of manufacturing the structure of FIG.
4 to 16 will be described. FIG. 14 shows a silicon substrate for forming an element, which is a first conductivity type first substrate.
Silicon layer 1301 (eg, p-type silicon layer), second silicon layer 1302 of first conductivity type (eg, p-type silicon layer), and third silicon layer 1303 of first conductivity type or second conductivity type
(For example, a p-type or n-type silicon layer) and a bonded silicon substrate composed of first and second silicon oxide films 1304 and 1305 provided between these three semiconductor layers. On the first surface 109a, the insulating film 102 is deposited by, for example, thermal oxidation, and the gate electrode 103 is deposited by, for example, polycrystalline silicon by a low pressure CVD method, and after high-concentration doping, patterning is performed. The drain diffusion layers 101 and 101a are formed by diffusing, for example, arsenic, and the second conductivity type diffusion layer is formed on the second surface 109b.
Form 603. Further, in order to transmit an electric signal, a first conductor 602 made of, for example, heavily doped second-conductivity polycrystalline silicon is formed inside the first silicon layer 1301 and the second silicon layer 1302. Embedded so as to penetrate the silicon oxide film 1304. (FIG. 15). Then, in order to form a region 805 having a small substrate thickness for forming a photoelectric conversion film, a mask is partially formed on the third surface 109c of the third silicon layer 1303, and then the third silicon layer 1303 is covered with, for example, a fluorine film. Removed by wet etching with a mixed solution of acid and nitric acid,
Further, in order to expose the second surface 109b, the second silicon oxide film 1305 is removed by wet etching with hydrofluoric acid, for example (FIG. 16). Finally, a photoelectric conversion film 107 made of, for example, amorphous silicon and a transparent electrode 108 made of, for example, indium lead oxide are deposited on the second surface 109b exposed in the region 805 having a small substrate thickness, and then, as shown in FIG.
The structure of is completed.

Embodiment 7 Cross-sectional views of Embodiment 7 of the present invention are shown in FIGS.
17 and 18 show a solid-state imaging device having a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed.
It is another embodiment of the structure in which the photoelectric conversion film is formed on the other surface including the S structure and having the same flatness as the surface of the silicon substrate on which the element for processing the electric signal is formed.

The structure shown in FIG. 17 is basically the same as that shown in FIG.
18 and the structure of FIG. 18 basically conforms to the structure of FIG. 13 of the sixth embodiment, but the signal transmission means for transmitting an electric signal from the second surface to the first surface is a conductor. And a groove formed in the silicon substrate for embedding it and the groove does not reach the surface where the photoelectric conversion film is formed. That is, as shown in FIGS. 17 and 18, the grooves 1701 and 1801 are formed on the second surface 109b.
The diffusion layer 603 for taking out an electric signal from the photoelectric conversion film 107 is formed in such a manner that it does not reach to the electric field, and at least a part of the diffusion layer 603 is formed inside the grooves 1701 and 1801.
It is configured so as to be in contact with 602 and be electrically conductive.

In this embodiment, since the grooves 1701 and 1801 are formed so as not to reach the second surface 109b on which the photoelectric conversion film 107 is laminated, the grooves 1701 and 1801 are formed on the second surface 109b.
Unevenness due to 1801 does not occur. Therefore, by adopting the structure of this embodiment, the surface 1 which is the base of the photoelectric conversion film 107 is
The signal transmission means can be formed without impairing the flatness of 09b.

The conductor 602 which constitutes the signal transmission means
By providing at least a part of the channel region of the MOS transistor element directly connected to the inside of the groove 1701 or 1801 along the inner side wall, the planar area of the pixel can be reduced, and the two-dimensional structure having a high pixel density can be obtained. The solid-state image sensor can be realized more easily.

Embodiment 8 A sectional view of Embodiment 8 of the present invention is shown in FIG. FIG. 19 shows
In a solid-state imaging device having a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed, an element including a MOS structure and processing the electric signal is formed. It is another embodiment of the structure in which the photoelectric conversion film is formed on the other surface having the same flatness as the surface of the silicon substrate.

The structure of this embodiment basically conforms to the structure of FIG. 8 of the fifth embodiment, but between the conductor 602 forming the signal transmitting means and the diffusion layer 101a forming the signal processing circuit. Are different from each other in that they are connected by a wiring 1901 formed of a metal film or a silicide film.

In this embodiment, since the conductor 602 and the diffusion layer 101a are connected by the wiring 1901 made of a metal film or a silicide film, for example, the conductor 602 is p-type silicon and the diffusion layer 101a is n. Even in the case of the type diffusion layer, non-ohmic electrical characteristics do not occur between the conductor 602 and the diffusion layer 101a. Therefore, the conductivity type of the diffusion layer 101a on the side of the first surface 109a directly connected to the conductor 602, and thus the type of the MOS transistor element formed on the first surface 109a, is converted from the photoelectric conversion film 107 by an electric signal. The conductivity types of the diffusion layer 603 and the conductor 602 for taking out can be set independently of each other, which facilitates compatibility with various circuit systems.

The structure of this embodiment is similar to that of the sixth embodiment shown in FIG.
It goes without saying that the same can be applied to the structure of No. 3. Further, the interlayer insulating film and the contact hole under the wiring 1901 are omitted in FIG. 19 for simplicity.

Embodiment 9 Cross-sectional views of Embodiment 9 of the present invention are shown in FIGS. 20 to 34 are examples showing a method of manufacturing the structure shown in FIG. 17 of Example 7, and FIGS. 20 to 26 are examples using impurity ion implantation from the first surface side, FIG. 27-
FIG. 30 shows an example using solid phase diffusion from the bottom of the groove forming the signal transmitting means, and FIGS. 31 to 34 show an example using impurity ion implantation to the bottom of the groove forming the signal transmitting means. .

First, the manufacturing method shown in FIGS. 20 to 26 will be described. 20 shows an ion implantation mask 20 for the bonded silicon substrate shown in FIG. 9 of the fifth embodiment.
01 for example resist or silicon oxide film or W
Ion implantation of impurities for forming a second conductive type diffusion layer, for example, using a heavy metal film such as
02 is performed from the side of the first surface 109a, and the impurity 2003 is implanted into the side of the second surface 109b. Implantation of such impurity ions can be performed by setting the range of accelerated impurity ions to be approximately equal to the thickness of the first conductivity type first silicon layer 801. Next, the ion implantation mask 2001 is removed, and the implanted impurities are activated by heat treatment at, for example, about 900 ° C. to form a second conductivity type diffusion layer 2004 for extracting an electric signal from the photoelectric conversion film ( Figure 21). Needless to say, the heat treatment for activation does not necessarily have to be performed independently, and the heat treatment included in the process after ion implantation may be used.

Next, the groove 2005 is formed to such an extent that it does not reach the second surface 109b and penetrates into the diffusion layer 2004.
For example, it is formed by dry etching with respect to silicon (FIG. 22). Further, the groove 2005 is filled with a conductor 2007 made of, for example, polycrystalline silicon containing impurities of the second conductivity type (FIG. 23). At this time, by providing the in-groove insulating film 2006 made of, for example, a silicon oxide film on the inner wall of the groove 2005, the insulation between the conductor 2007 and the first silicon layer 801 can be made more reliable. The in-groove insulating film 2006 can be formed, for example, by depositing a silicon oxide film by a low pressure CVD method and then performing anisotropic dry etching of the silicon oxide film. In the groove 2005, the in-groove insulating film 2006 is partially grooved on the side of the first surface 109a.
Although there is a portion that does not exist on the inner wall of the silicon oxide film, this can be realized by performing anisotropic dry etching of the silicon oxide film more than the film thickness of the silicon oxide film. Then, the MOS transistor element that constitutes the signal processing circuit,
Insulating film 102, gate electrode 103, source / drain diffusion layer 10
It is formed by 1a and 101 (FIG. 24). Thus
The electrical signal is transmitted from the diffusion layer 2004 through the conductor 2007 inside the groove 2005 to the diffusion layer 101a which constitutes the source / drain of the MOS transistor element. In Groove 2005,
The in-groove insulating film 2006 is not partially provided on the first surface 109a side because the conductor 2007 is electrically connected to the diffusion layer 101a forming the source / drain of the MOS transistor element at this portion. is there. Of course, the in-groove insulating film 2006 may be provided on the entire inner wall of the groove 2005. In this case, the conductor 2007 and the MOS
Diffusion layer 101a forming source / drain of transistor element
For example, as shown in the eighth embodiment, it is possible to electrically connect with the wiring layer by newly providing a wiring layer that connects the upper surface of the conductor 2007 on the first surface 109a side and the diffusion layer 101a. After that, in order to form a region 805 having a small substrate thickness, which is a region where the photoelectric conversion film is laminated, first, the second silicon layer 803 is removed by wet etching with a mixed solution of hydrofluoric acid and nitric acid, and then, The silicon oxide film 802 is removed by wet etching with hydrofluoric acid, for example (FIG. 25). Finally, the photoelectric conversion film 107 and the transparent electrode 108 are deposited (FIG. 2).
6).

In the embodiment of the manufacturing method shown in FIGS. 20 to 26, the first method is used to form the diffusion layer 2004 serving as an outlet for the electric signal from the photoelectric conversion film 107 on the second surface 109b. Impurity ion implantation from the surface 109a side is used. By using this method, the diffusion layer 20
It is possible to form 04 without exposing the second surface 109b. As a result, when performing the silicon process, it is not necessary to use a special device for the back surface of the silicon substrate, and the process cost can be suppressed. Further, after the second surface 109b is exposed, the processes such as lithography, ion implantation, and heat treatment can be omitted, and it is possible to prevent the region 805 having a small substrate thickness from being cracked or bent.

Next, the manufacturing method shown in FIGS. 27 to 30 will be described. FIG. 27 shows a bonded silicon substrate having the same structure as that of FIG. 9 of the fifth embodiment.
A groove 2005 that does not reach the surface 109b is formed by dry etching of silicon, for example (FIG. 28).
Next, the groove 2005 is filled with a conductor 2007 made of, for example, polycrystalline silicon containing impurities of the second conductivity type.
Impurities contained in the conductor 2007 are solid-phase diffused into the first silicon layer 801 from the bottom of 2005 to form a diffusion layer 2010 for extracting an electric signal from the photoelectric conversion film (FIG. 29). Groove 2005
The in-groove insulating film 2006 made of, for example, a silicon oxide film provided on the inner wall of the same has the same function as the in-groove insulating film 2006 of FIG. 23, but the conductor 2007 to the first silicon layer 801
It also has the function of limiting the solid phase diffusion of impurities to the bottom of the groove 2005. The method of forming the in-groove insulating film 2006 may be the same as the method of forming the in-groove insulating film 2006 described in the description of FIG. In the groove 2005, the in-groove insulating film 2006 is provided up to the first surface 109a side.
This is because the source / drain diffusion layer of the MOS transistor element on the surface 109a side and the diffusion layer serving as the signal acquisition electrode on the second surface 109b side are formed independently. Next, a MOS transistor element forming a signal processing circuit is formed in the same manner as in FIG. 24, and the conductor 2007 and the source / drain diffusion layer 101a of the MOS transistor element are formed in the same manner as in FIG. 19 of the eighth embodiment. A wiring 1901 made of a metal film or a silicide film for connection is formed of, for example, an Al film containing silicon (FIG. 30). In this embodiment, the case where the wiring is connected as shown in FIG. 30 is shown, but it is also possible to connect the side wall inside the groove as shown in FIGS. After this, as in FIGS. 25 and 26, the second silicon layer 803 and the silicon oxide film 802 are partially removed to expose the second surface 109b, and the photoelectric conversion film and the transparent electrode are deposited. Good.

In the embodiment of the manufacturing method shown in FIGS. 27 to 30, in order to form the diffusion layer 2010 on the second surface 109b, the impurities contained in the conductor 2007 filled in the groove 2005 are removed from the groove 2005. The method of solid phase diffusion from the bottom is used. This method has the same advantages as the manufacturing method shown in FIGS.
That is, it has an advantage that the diffusion layer 2010 can be formed without exposing the second surface 109b.
Compared with the method shown in FIGS. 0 to 26, it is not necessary to implant high-energy impurity ions, the device cost can be further suppressed, and the alignment between the groove 2005 and the diffusion layer 2010 is performed in a self-aligned manner. It has an advantage that it can be easily miniaturized.

Finally, the manufacturing method shown in FIGS. 31 to 34 will be described. Starting from the bonded silicon substrate shown in FIG. 27, first, a groove 2005 which does not reach the second surface 109b is formed by, for example, dry etching of silicon (FIG. 31). Then, at the bottom of the groove 2005, the second
Ion implantation 2020 of conductivity type impurities is performed (Fig. 3
2). Further, heat treatment is applied to the impurities implanted in FIG. 32 to form a diffusion layer 2021, an in-groove insulating film 2006 is formed on the sidewall of the groove 2005, and a conductor 2007 is filled in the groove 2005 (FIG. 33). At this time, the diffusion layer 2021 and the conductor 2007
And are electrically connected. The ion implantation 2020 of the second conductivity type impurity shown in FIG. 32 may be performed after the in-groove insulating film 2006 of FIG. 33 is formed. By doing so, the impurity is implanted into the sidewall of the groove 2005. Can be prevented. Then, as in the case of FIG. 24, a MOS transistor element forming a signal processing circuit is formed (FIG. 34).
Here, the conductor 2007 and the source / drain diffusion layer 101a of the MOS transistor element are connected by solid-phase diffusion, but of course they may be connected by wiring. After this,
Similarly to FIGS. 25 and 26, the second silicon layer 803
The silicon oxide film 802 may be partially removed to expose the second surface 109b, and the photoelectric conversion film and the transparent electrode may be deposited.

In the embodiment of the manufacturing method shown in FIGS. 31 to 34, ion implantation of impurities into the bottom of the groove 2005 is used as a method of forming the diffusion layer 2021 on the second surface 109b. Compared with the method using solid phase diffusion shown in FIGS. 27 to 30, this method controls the concentration of the diffusion layer 2021 for extracting an electric signal from the photoelectric conversion film with high precision by adjusting the amount of impurity ion implantation. It has the advantage that it can.

As described above, by using the manufacturing method of this embodiment, the structure shown in FIG. 17 of the embodiment 7 can be realized with low equipment cost and with high accuracy while preventing cracking and bending of the wafer. it can.

In this embodiment, the case where each manufacturing method is applied independently has been described, but it is also possible to use these manufacturing methods in combination with each other. For example, a signal acquisition electrode formed by ion implantation from the second main surface using a combination of ion implantation from the second main surface and solid phase diffusion from the groove bottom or ion implantation to the groove bottom. The diffusion layer and the conductor inside the groove can be connected by a diffusion layer formed by solid phase diffusion from the groove bottom or ion implantation into the groove bottom. In this case, it is not necessary to extend the bottom of the groove into the inside of the diffusion layer that serves as the signal acquisition electrode, so that the depth of the groove can be reduced, and as a result, the process of forming the groove becomes easier. .

Further, in the present embodiment, the manufacturing method of the structure shown in FIG. 17 of the embodiment 7 is described starting from the bonded silicon substrate having the same structure as that of the embodiment 5 of FIG. It goes without saying that the manufacturing method of this embodiment can be applied to the bonded silicon substrate having the structure of FIG. 14 (in this case, this is an embodiment of the manufacturing method of the structure shown in FIG. 18 of the seventh embodiment). ).

Embodiment 10 Cross-sectional views of Embodiment 10 of the present invention are shown in FIGS. 35 to 40.
35 to 40 show a solid-state imaging device including a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed.
35 is another embodiment of the structure in which the photoelectric conversion film is formed on the other surface having the same flatness as the surface of the silicon substrate including the structure and the element for processing the electric signal is formed, and FIG. 36 to 40 show an example of a method for manufacturing the structure. The structure of this embodiment basically conforms to the structure of FIG. 8 of the fifth embodiment, except that the signal transmitting means does not include a groove and is constituted by a diffusion layer inside the silicon substrate. First, FIG. 35 will be described. A bonded silicon substrate comprising a first conductivity type first silicon layer 801, a first conductivity type or second conductivity type second silicon layer 803, and a silicon oxide film 802 provided therebetween, First surface 1 of first conductivity type silicon layer 801
An insulating film 102, source / drain diffusion layers 101 and 101a of the second conductivity type, and a gate electrode 103 are formed on 09a.
It constitutes a MOS transistor element. In the region 805 where the substrate thickness is small, the first conductive type first silicon layer 801 is formed.
The second surface 109b is exposed and the photoelectric conversion film 107 is deposited. Further, an electric signal from the photoelectric conversion film 107 is taken in through the diffusion layer 603 of the second conductivity type, and the conductor 3501 made of the diffusion layer of the second conductivity type causes the first surface 10 to pass.
It is transmitted to the MOS transistor element of 9a.

In the embodiment shown in FIG. 35, the second surface 10
The signal transmission means for transmitting an electric signal from 9b to the first surface 109a is composed of a diffusion layer and does not include the groove of the first silicon layer 801. As a result, the introduction of contamination due to the formation of the groove inside the silicon substrate can be suppressed, and the diffusion layer leak current that causes noise can be reduced. Therefore, by adopting the structure of the embodiment shown in FIG. 35, it is possible to construct a low noise two-dimensional solid-state imaging device without deteriorating the flatness of the base of the photoelectric conversion film.

Next, FIG. 3 showing a method of manufacturing the structure of FIG.
6 to 40 will be described. In FIG. 36, a diffusion layer 603 of the second conductivity type is formed on the bonded silicon substrate having the first silicon layer 801 of the first conductivity type by, for example, ion implantation. Next, an ion implantation mask 2001 is formed on the first surface 109a side by using, for example, a resist, a silicon oxide film, or a heavy metal film such as W. Using this as a mask, a planar position that at least partially overlaps the diffusion layer 603 is formed. For example, ion implantation 3503 of impurities for forming a second conductivity type diffusion layer is performed (FIG. 37). The number of times of implantation of impurities and the respective implantation energies are set according to the spread of the impurities 3502 by the heat treatment after implantation and the distance to be connected (FIG. 37 shows an example in which two implantations are performed). Further, FIG. 38 shows a state where the second conductivity type signal transmission diffusion layer 3501 is formed by heat treatment, and FIG. 39 shows that the MOS transistor element is formed on the first surface 109a and the signal transmission diffusion layer 3501 is formed. Second through
It shows a state in which the conductivity type diffusion layer 603 and the second conductivity type source / drain diffusion layer 101a are electrically connected. Thereafter, the second silicon layer 803 and the silicon oxide film 802 are partially removed to provide a region 805 having a small substrate thickness (FIG. 40), and the photoelectric conversion film 107 is formed on the finally exposed second surface 109b. And the transparent electrode 108 is formed thereon, thereby completing the structure of FIG.

In the embodiment of the manufacturing method shown in FIGS. 36 to 40, the signal transmission diffusion layer 35 constituting the signal transmission means.
The formation of 01 is performed using a plurality of ion implantations with different energies from the side of the first surface 109a. As a result, the signal transmission diffusion layer 3501 can be formed without exposing the second surface 109b. Therefore, a low noise two-dimensional solid-state imaging device can be easily constructed without deteriorating the flatness of the base of the photoelectric conversion film. It becomes possible to do.

Embodiment 11 Cross-sectional views of Embodiment 11 of the present invention are shown in FIGS. 41 and 42. 41 and 42 show a solid-state imaging device having a photoelectric conversion film, an element including a MOS structure and processing the electric signal, and a silicon substrate on which the element is formed, and including the MOS structure. This is another embodiment of the structure in which the photoelectric conversion film is formed on the surface of the silicon substrate on which the signal processing element is formed, and particularly shows the diffusion layer structure with a small dark current. 41 and 42 are cross-sectional views of the structure of FIG. 4 of the third embodiment as seen from a cut perpendicular to the long side of the patterned diffusion layer 301.

The sectional structure of this embodiment is basically the same as that of the third embodiment.
41 is similar to the structure of FIG. 4, but in FIG. 41, a diffusion layer 4100 having a conductivity type opposite to that of the diffusion layer 301 and having a high concentration is provided around the patterned diffusion layer 301. The difference is that a patterned diffusion layer 4101 for extracting an electric signal from the photoelectric conversion film 107 is embedded in the silicon substrate 100.

By adopting the structure of this embodiment, the diffusion layer
The extension of the depletion layer from 301 to the side is suppressed by the diffusion layer 4100, and it is possible to prevent the depletion layer from contacting the surface 109 (FIG. 41). Further, in the structure of FIG. 42, since the patterned diffusion layer 4101 for extracting an electric signal is embedded in the silicon substrate 100, the depletion layer extends not only to the side of the diffusion layer 4101 but also to the upper side, and thus the surface. The contact with 109 can also be suppressed. As a result, it is possible to reduce the diffusion layer leakage current, that is, the dark current due to the contact of the depletion layer with the surface 109.

Although the structure of the present embodiment has been described with reference to the third embodiment, the scope of application of the structure of the present embodiment is not limited to that of the third embodiment, and the fourth to eighth embodiments and further embodiments are applied. It may be applied to the structure of Example 10. Further, more generally, it is applicable as long as the diffusion layer for taking out an electric signal has a structure having a conductivity type opposite to that of the silicon substrate.

In Examples 1 to 11 described above,
Although the signal processing circuit has been described using the MOS transistor, the signal processing circuit may include a charge coupled device (CCD).

The parts related to the signal processing circuit are not limited to the silicon substrate and the diffusion layer structure in the silicon substrate described in these embodiments for realizing the effect.
For example, the MOS transistors forming the signal processing circuit may be arranged in a well having a higher concentration than that of the silicon substrate, or may have a more complicated diffusion layer structure. Further, the insulating film on the silicon substrate is not limited to the silicon oxide film, but may be a silicon nitride film or a composite film thereof, and they may be mixed in the same element.

The material forming the gate electrode is not limited to polycrystalline silicon, but may be amorphous silicon, doped silicon, refractory metal or silicide thereof, or a composite film thereof. .

[0072]

According to the present invention, in a solid-state imaging device using a photoelectric conversion film, the flatness of the base of the photoelectric conversion film can be greatly improved, and the uniformity of the electric field distribution inside the photoelectric conversion film can be improved. It is possible to suppress variations in sensitivity between pixels and an increase in dark current. As a result, it is possible to easily realize a high-sensitivity solid-state image sensor with less noise.

[Brief description of drawings]

FIG. 1 is a sectional view of a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of a conventional example of a solid-state imaging device in which a photoelectric conversion film is provided on a device including a MOS structure.

FIG. 3 is a sectional view of a second embodiment of the present invention.

FIG. 4 is a sectional view of a third embodiment of the present invention.

FIG. 5 is a plan view of a third embodiment of the present invention.

FIG. 6 is a sectional view of Embodiment 4 of the present invention.

FIG. 7 is a plan view of Embodiment 4 of the present invention.

FIG. 8 is a sectional view of a fifth embodiment of the present invention.

FIG. 9 is a sectional view of a fifth embodiment of the present invention.

FIG. 10 is a sectional view of a fifth embodiment of the present invention.

FIG. 11 is a sectional view of a fifth embodiment of the present invention.

FIG. 12 is a sectional view of Embodiment 5 of the present invention.

FIG. 13 is a sectional view of Embodiment 6 of the present invention.

FIG. 14 is a sectional view of Embodiment 6 of the present invention.

FIG. 15 is a sectional view of Embodiment 6 of the present invention.

FIG. 16 is a sectional view of Embodiment 6 of the present invention.

FIG. 17 is a sectional view of Embodiment 7 of the present invention.

FIG. 18 is a sectional view of Embodiment 7 of the present invention.

FIG. 19 is a sectional view of Embodiment 8 of the present invention.

FIG. 20 is a sectional view of Embodiment 9 of the present invention.

FIG. 21 is a sectional view of Embodiment 9 of the present invention.

FIG. 22 is a sectional view of Embodiment 9 of the present invention.

FIG. 23 is a sectional view of Embodiment 9 of the present invention.

FIG. 24 is a sectional view of Embodiment 9 of the present invention.

FIG. 25 is a sectional view of Embodiment 9 of the present invention.

FIG. 26 is a sectional view of Embodiment 9 of the present invention.

FIG. 27 is a sectional view of Embodiment 9 of the present invention.

FIG. 28 is a sectional view of Embodiment 9 of the present invention.

FIG. 29 is a sectional view of Embodiment 9 of the present invention.

FIG. 30 is a sectional view of Embodiment 9 of the present invention.

FIG. 31 is a sectional view of Embodiment 9 of the present invention.

FIG. 32 is a sectional view of Embodiment 9 of the present invention.

FIG. 33 is a sectional view of Embodiment 9 of the present invention.

FIG. 34 is a sectional view of Embodiment 9 of the present invention.

FIG. 35 is a sectional view of Embodiment 10 of the present invention.

FIG. 36 is a sectional view of Embodiment 10 of the present invention.

FIG. 37 is a cross-sectional view of Embodiment 10 of the present invention.

38 is a sectional view of Embodiment 10 of the present invention. FIG.

FIG. 39 is a sectional view of Embodiment 10 of the present invention.

FIG. 40 is a sectional view of Embodiment 10 of the present invention.

41 is a sectional view of Embodiment 11 of the present invention. FIG.

FIG. 42 is a sectional view of Embodiment 11 of the present invention.

[Explanation of symbols]

200; p-type silicon substrate, 201; p-type diffusion layer, 202; n
-Type diffusion layer, 203; silicon dioxide, 204; polysilicon, 205; n + type diffusion layer, 206; Mo polycide, 207;
BPSG, 208; pixel electrode, 209; amorphous silicon, 210; amorphous silicon carbide, 211; transparent electrode, 100, 600; first conductivity type silicon substrate, 101, 101
a; second conductivity type source / drain diffusion layer, 109; surface,
102; insulating film, 103; gate electrode, 104; interlayer insulating film, 10
5; wiring; 106; protective insulating film; 107; photoelectric conversion film; 108; transparent electrode, 300, 301; diffusion layer, 302; signal processing circuit, 303;
Output amplifier circuit, 109a; first surface, 109b; second surface,
109c; third surface, 603, 2004, 2010, 2021; second conductivity type diffusion layer, 602, 2007; conductor, 604; Y direction scanning signal processing circuit, 605; X direction scanning signal processing circuit, 801, 13
01; first conductivity type first silicon layer, 1302; first conductivity type second silicon layer, 803; first conductivity type or second conductivity type second silicon layer, 1303; first conductivity type Alternatively, a second conductivity type third silicon layer, 802; a silicon oxide film, 1
304; first silicon oxide film, 1305; second silicon oxide film, 805; region of small substrate thickness, 804; region of large substrate thickness, 1701, 1801, 2005; groove, 1901; metal film or silicide Wiring composed of film, 2001; ion implantation mask, 2002, 2020, 3503; ion implantation, 2003, 350
2; Impurity, 2006; Insulating film in trench, 3501; Signal transmission diffusion layer of second conductivity type, 4100; Diffusion layer of opposite conductivity type to diffusion layer 301 and high concentration, 4101; Diffusion layer embedded in silicon substrate .

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hisashi ▲ 禮 ▼ Tokio 1-280, Higashi Koikekubo, Kokubunji, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd.

Claims (20)

[Claims] 1. A photoelectric conversion film that photoelectrically converts incident light to generate an electric signal, an element that includes a MOS (Metal-Oxide-Silicon) structure and processes the electric signal, and an electric signal that includes the MOS structure. In a laminated solid-state imaging device having a silicon substrate on which a signal processing element is formed, the photoelectric conversion film is formed on the surface of the silicon substrate or another surface having the same flatness as the surface of the silicon substrate. The surface of the silicon substrate or another surface having the same flatness as the surface of the silicon substrate, which is in direct contact, constitutes a part of means for applying a voltage to the photoelectric conversion film. A stacked solid-state image sensor. 2. The laminated solid-state imaging device according to claim 1, wherein a diffusion layer is provided on the surface of the silicon substrate or another surface having the same flatness as the surface of the silicon substrate, and the photoelectric conversion film. 2. The laminated solid-state image pickup device, wherein the electric signal generated in 1) is taken out through the diffusion layer. 3. The laminated solid-state image pickup device according to claim 1, further comprising photoelectric conversion means inside the silicon substrate. 4. The stacked solid-state imaging device according to claim 1, wherein the photoelectric conversion is provided at a signal input end of the device including the MOS structure, to which the electric signal is first input. A stacked solid-state imaging device having a capacitance for accumulating the electric signal from the film. 5. The stacked solid-state imaging device according to claim 1, wherein the photoelectric conversion film has a function of multiplying an electric signal. 6. The stacked solid-state imaging device according to claim 1, wherein a surface (hereinafter, referred to as a second surface) with which the photoelectric conversion film is in direct contact and the MOS structure are provided. And a surface on which an element for processing the electric signal is formed (hereinafter referred to as a first surface) are respectively on different main surfaces of the silicon substrate, and from the second surface to the first surface. A laminated solid-state image sensor, comprising signal transmission means for transmitting an electric signal to a surface inside the silicon substrate. 7. The stacked solid-state imaging device according to claim 6, wherein an insulating film is present between the first and second surfaces. 8. The laminated solid-state imaging device according to claim 7, wherein the silicon substrate is a bonded silicon substrate. 9. The laminated solid-state imaging device according to claim 6, wherein the silicon substrate is a bonded silicon substrate having a silicon oxide film in contact with the second surface. Solid-state image sensor. 10. The stacked solid-state imaging device according to claim 6, wherein the silicon substrate has a thickness of the silicon substrate between the first surface and the second surface. A stacked solid-state imaging device characterized by having a thick region. 11. The stacked solid-state imaging device according to claim 10, wherein the electric signal is applied to the first surface in a region thicker than the thickness of the silicon substrate between the first surface and the second surface. At least a part of a circuit necessary for the processing of 1. is formed, and a laminated solid-state image sensor. 12. The laminated solid-state image pickup device according to claim 6, wherein the signal transmission means for transmitting an electric signal from the second surface to the first surface is inside the silicon substrate. 2. A stacked solid-state imaging device, comprising: a groove formed in the groove and a conductor formed inside the groove, and the groove does not reach the second surface. 13. The stacked solid-state imaging device according to claim 6, wherein the signal transmission means for transmitting an electric signal from the second surface to the first surface is inside the silicon substrate. And a p-type or n-type conductor formed inside the groove, and including the p-type or n-type conductor and the MOS structure and processing the electric signal. A stacked solid-state imaging device characterized in that the diffusion layer which constitutes an element and is connected to the p-type or n-type conductor is connected by a wiring made of a metal film or a silicide film of a refractory metal. element. 14. The stacked solid-state imaging device according to claim 6, wherein the signal transmission means for transmitting an electric signal from the second surface to the first surface is inside the silicon substrate. And a groove formed in
At least a part of a channel region of a MOS transistor having an S structure is provided along a side wall of the groove, and a stacked solid-state image pickup device. 15. The stacked type solid-state imaging device according to claim 6, wherein the signal transmission means for transmitting an electric signal from the second surface to the first surface is inside the silicon substrate. 2. A laminated solid-state image pickup device, characterized in that it does not include the groove formed in (1) and is composed of a diffusion layer formed inside the silicon substrate. 16. The method for manufacturing a stacked solid-state imaging device according to claim 9, further comprising the step of etching an insulating film in contact with the second surface such that the second surface serves as an etching stopper. A method for manufacturing a laminated solid-state imaging device, comprising: 17. The method for manufacturing a stacked solid-state imaging device according to claim 6, wherein the step of forming a diffusion layer on the second surface of the silicon substrate comprises: A method of manufacturing a stacked solid-state imaging device, comprising a step of implanting ions from the side of the first surface of a silicon substrate. 18. The method of manufacturing a laminated solid-state image pickup device according to claim 12, wherein the step of forming a diffusion layer for taking out an electric signal generated in the photoelectric conversion film comprises:
A method of manufacturing a stacked solid-state imaging device, comprising the step of performing solid-phase diffusion of impurities from a conductor formed inside a groove provided inside the silicon substrate into the silicon substrate. 19. The method for manufacturing a laminated solid-state imaging device according to claim 12, wherein the step of forming a diffusion layer for taking out an electric signal generated in the photoelectric conversion film comprises:
A method of manufacturing a stacked solid-state imaging device, comprising a step of implanting impurity ions into a bottom surface of a groove provided inside the silicon substrate. 20. A method of manufacturing a stacked solid-state image pickup device according to claim 15, wherein the diffusion layer forming a signal transmission means for transmitting an electric signal from the second surface to the first surface is formed. 2. The method of manufacturing a stacked solid-state imaging device, characterized in that the step (1) includes a step of performing impurity ion implantation a plurality of times with different implantation energies.