JPH08314869A - Information processor - Google Patents

Abstract

PURPOSE: To reduce the maximum wait time of lock waiting and to improve performance as the equipment of multi-processor constitution by deciding the order of lock acquisition by a lock buffer. CONSTITUTION: This information processor is provided with processors 1 to 3, a lock flag 10 for indicating that the lock acquisition is being performed, a lock request register 11 for holding the processor number of a lock request, the lock buffer 12 of FIFO buffer control for buffering the processor number which issues the lock request, a buffer read register 13 for reading oldest data from the lock buffer 12 and a lock flag control part 14 for controlling the lock flag. The lock buffer 12 for performing the lock control and holding the processor number for which the acquisition of the lock failed so as to perform the exclusive control of communication in the case of performing the communication among the processors 1 to 3 in such a manner is provided. Then, the order of the lock acquisition is decided by the lock buffer 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing device,
In particular, the present invention relates to an information processing device that acquires a lock for communication between processors.

[0002]

2. Description of the Related Art In inter-processor communication of a conventional information processing apparatus, when a lock is acquired, a new lock cannot be acquired. When the lock is released, the processor that issues the lock acquisition request earliest after the lock is released acquires the lock.

[0003]

When a lock acquisition request is issued in the order of processor A, processor B, and processor C, processor A acquires the lock, and subsequently processor B and processor C fail to acquire the lock. do. Until the processor B and processor C can acquire the lock,
Keep issuing lock requests. After the processor A releases the lock, if the lock acquisition request is issued earlier than the processor B by the processor C, the processor C acquires the lock. In this way, if the lock acquisition is performed in the order in which the lock request is issued in the state where the lock is released, not in the order in which the lock request is issued Therefore, there is a problem in that the performance of a specific processor is degraded and the performance of the entire device having a multiprocessor configuration is degraded.

[0004]

An information processing apparatus according to the present invention, in an information processing apparatus including a plurality of processors, performs lock control in order to perform exclusive control of communication when communication is performed between the processors. The present invention is characterized by comprising a lock buffer that holds the processor number that has performed this lock acquisition failure, and means for determining the order of lock acquisition by the lock buffer.

[0005]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an information processing apparatus according to the present invention.

This information processing apparatus includes processors 1, 2,
3, a lock flag 10 indicating that the lock is being acquired, and a lock request register 1 that holds the processor number of the lock request
1 and a lock buffer 12 for first-in first-out buffer control that buffers the processor number that issued the lock request,
A buffer read register 13 that reads the oldest data from the lock buffer 12 and a lock flag control unit 14 that controls the lock flag 10 are provided.

Next, the operation of the information processing apparatus shown in FIG. 1 will be described. First, when the processor 1 makes a lock request, the number “1” of the processor 1 is entered in the lock request register 11. At this time, if another processor is not acquiring the lock, the lock flag 10 is “0”, and if the buffer read register 13 is empty, the lock flag control unit 14 changes the lock flag 10 from the value “0” to the value “0”. Set to "1" and lock acquisition is successful. Next, when a lock acquisition request is issued from the processor 2, the lock flag 10 has the value "1".
Therefore, the processor number "2" is registered in the lock buffer 12, and the lock fails. When the processor 1 releases the lock, the lock flag 10 changes from the value “1” to the value “0”. Thereafter, when the processor 3 issues a lock acquisition request, the lock flag 10 is "0", so the value "3" is entered in the lock request register 11 and the buffer read register 1
Since the value “2” is stored in 3, the processor 2 knows that the lock acquisition request has failed first. Therefore, the processor 3 fails in the lock acquisition and the processor 3 number “3” is the lock buffer. Buffered to 12.
After that, when the processor 2 makes a lock acquisition request, the lock can be acquired, and the processor number “2” is acquired from the lock buffer.
Is deleted and the next waiting processor number enters the buffer read register 13.

[0009]

As described above, according to the present invention,
Since the locks can be acquired in the order in which the locks are requested, the maximum waiting time for the locks is reduced, and the processor scheduling is executed efficiently, so that the performance as a device having a multiprocessor configuration is improved.

[Brief description of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

[Explanation of symbols]

 1 processor 2 processor 3 processor 10 lock flag 11 lock request register 12 lock buffer 13 buffer read register 14 lock flag control unit

Claims (1)

[Claims] 1. An information processing apparatus comprising a plurality of processors, wherein lock control is performed in order to perform exclusive control of communication when communication is performed between the processors, and a processor number that fails in acquisition of this lock is set. An information processing apparatus, comprising: a lock buffer for holding; and means for determining a lock acquisition order by the lock buffer.