JPH08292915A - Integrated circuit device having built-in nonvolatile memory - Google Patents

Abstract

PURPOSE: To provide an integrated circuit device, having the nonvolatile memory incorporated, which can inhibit data to be read out of the nonvolatile memory from the outside. CONSTITUTION: This device is equipped with the nonvolatile memory 51 which stores data required to control a device main body, a nonvolatile memory register 12 which continues to hold read inhibition information until the data stored in the nonvolatile memory 51 are erased when a data read inhibition signal is inputted from the outside, and a read inhibition control circuit 11 which does not output an inputted data readout setting signal to the nonvolatile memory 51 while the nonvolatile memory register 12 holds the readout inhibition information even if the data readout setting signal to put the nonvolatile memory 51 into a read state is inputted from the outside.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit device containing a non-volatile memory, which has a non-volatile memory for storing data necessary for controlling the main body of the device.

[0002]

2. Description of the Related Art In recent years, integrated circuit devices having a non-volatile memory that does not require electrical holding means have come to be used in various devices. In this integrated circuit device, the device main body is controlled using the data stored in the non-volatile memory. In addition, many of such integrated circuit devices are
It is constructed on one chip.

A conventional integrated circuit device having a built-in nonvolatile memory will be described below.

FIG. 2 is a block diagram of a conventional integrated circuit device containing a nonvolatile memory. In FIG. 2, 51 is a non-volatile memory, 52 is a CPU, 53 is an address input terminal, 5
4 is a data input / output terminal, 55 is a read / write switching control terminal,
56 is an external address bus, 57 is an external data bus, 58
Is a read / write switching signal line, 59 is an internal address bus, and 60
Is an internal data bus.

The non-volatile memory 51 stores data used for controlling the apparatus body. The CPU 52 controls the apparatus body using the data stored in the non-volatile memory 51. An internal address bus 59 is used for exchanging data.
And the internal data bus 60 is used.

The address input terminal 53 is connected to the non-volatile memory 51 via an external address bus 56.
The data input terminal 54 is connected to the nonvolatile memory 51 via the external data bus 57. The address input terminal 53 and the data input / output terminal 54 can write data to the nonvolatile memory 51 from the outside and read data from the outside.

The read / write switching control terminal 55 has a signal for switching the nonvolatile memory 51 to a data reading state (referred to as a data reading setting signal) or a signal for switching the nonvolatile memory 51 to a data writing state (referred to as a data writing setting signal). Is input, and the input signal is input to the nonvolatile memory 5 via the read / write switching signal line 58.
1 is transmitted.

The operation of the integrated circuit device with a built-in non-volatile memory configured as described above will be described.

Now, assume that the nonvolatile memory 51 is in a state in which external data writing and external data reading are possible.

At this time, when a data write setting signal is input from the read / write switching control terminal 55, this signal is transmitted to the non-volatile memory 51 via the read / write switching signal line 58, and the non-volatile memory 51 enters the data writing state. Become. In this state, the data input from the data input / output terminal 54 can be written to the address of the nonvolatile memory 51 designated by the address data input from the address input terminal 53.

When a data read setting signal is input from the read / write switching control terminal 55, this signal is transmitted to the non-volatile memory 51 via the read / write switching signal line 58, and the non-volatile memory 51 enters the data read state. .
In this state, the data of the address of the non-volatile memory 51 designated by the address data input from the address input terminal 53 can be read from the data input / output terminal 54.

In a normal operation state, the CPU 52
Is stored in the nonvolatile memory 51 via the internal address bus 59.
The internal address is designated, the data of the designated address is read out through the internal data bus 60, and the operation is performed according to the data.

[0013]

However, the conventional integrated circuit device containing the non-volatile memory has the following problems.

The data stored in the non-volatile memory may be troublesome if read by an outsider. This data controls the integrated circuit device, and therefore the configuration and behavior of the integrated circuit device can be known in detail by decoding the read data.
The configuration and behavior of the integrated circuit device are often important confidential matters, and therefore it is preferable that the data stored in the non-volatile memory cannot be read by an outsider.

However, in the conventional integrated circuit device containing a non-volatile memory as shown in FIG. 2, the non-volatile memory 5 is used.
Anyone can easily read the data stored in the non-volatile memory 51 simply by setting 1 to a state in which data can be written and read. That is, there is a problem that confidentiality regarding the configuration and behavior of the integrated circuit device cannot be maintained.

In view of the above problems, it is an object of the present invention to provide an integrated circuit device with a built-in non-volatile memory, which can prohibit the reading of data in the non-volatile memory from the outside.

[0017]

In order to achieve the above object, the present invention can read data from a non-volatile memory once a signal for prohibiting reading of data stored in the non-volatile memory is input. Even if a signal for setting the state is input, the signal is not output to the nonvolatile memory.

Specifically, the solving means devised by the invention of claim 1 is directed to an integrated circuit device having a built-in non-volatile memory having a non-volatile memory for storing data necessary for controlling the main body of the device. When a signal for prohibiting the reading of the data stored in the non-volatile memory is input from the outside, the read prohibiting information is held and the read prohibiting information is stored until the data stored in the non-volatile memory is erased. When an information holding unit that keeps holding and a signal that makes the nonvolatile memory in a data readable state are input from the outside, it is determined whether or not the information holding unit holds the read prohibition information, and the information is held. If not, the input signal is not output to the nonvolatile memory, while if it is not held, the input signal is output to the nonvolatile memory. It is an arrangement and a read-inhibiting control circuit for force.

According to a second aspect of the present invention, in the structure of the first aspect, the information holding means comprises a non-volatile memory register that cannot be initialized until the data stored in the non-volatile memory is erased. To add configuration

[0020]

According to the first aspect of the invention, when the signal for prohibiting the reading of the data stored in the non-volatile memory is inputted from the outside, the information holding means holds the reading prohibition information. After that, even if a signal that makes the nonvolatile memory ready for data reading is input, the read prohibition control circuit outputs this signal to the nonvolatile memory because the information holding unit holds the read prohibition information. do not do. Therefore, the non-volatile memory does not enter the data readable state. Moreover, since the information holding means keeps holding the read prohibition information until the data stored in the non-volatile memory is erased, the confidentiality of the data stored in the non-volatile memory is held.

According to the second aspect of the present invention, the non-volatile memory register that cannot be initialized until the data stored in the non-volatile memory is erased is used as the information holding means.

[0022]

1 is a block diagram of an integrated circuit device having a built-in nonvolatile memory according to an embodiment of the present invention. In FIG.
11 is a read prohibition control circuit, 12 is a non-volatile memory register, 13 is a read / write switching control terminal, 14 is a read prohibition control terminal, 15 is a first read / write switching signal line, 16
Is a second read / write switching signal line, 17 is a first read inhibit signal line, 18 is a second read inhibit signal line, 51 is a non-volatile memory, 52 is a CPU, 53 is an address input terminal, and 54 is data input / output. Terminal, 56 is an external address bus, 57 is an external data bus, 59 is an internal address bus,
Reference numeral 60 is an internal data bus.

Nonvolatile memory 51, CPU 52, address input terminal 53, data input / output terminal 54, external address bus 56, external data bus 57, internal address bus 5
9 and the internal data bus 60 are the same as those in the conventional integrated circuit device with a built-in nonvolatile memory shown in FIG.

The nonvolatile memory register 12 holds the read prohibition information when the read prohibition signal is inputted from the read prohibition control terminal 14. Since the non-volatile memory register 12 is not initialized until the data in the non-volatile memory is erased, this read prohibition information is held until the data in the non-volatile memory 51 is erased. The read prohibition control circuit 11 includes a nonvolatile memory register 12
Determines whether or not to transmit the data read setting signal input from the read / write switching control terminal 13 to the non-volatile memory 51 depending on whether or not the read prohibition information is held.

The operation of the integrated circuit device with a built-in nonvolatile memory according to the embodiment of the present invention shown in FIG. 1 will be described.

Now, assume that the nonvolatile memory 51 is in a state in which external data writing and external data reading are possible.

The nonvolatile memory register 12 does not hold the read prohibition information while the read prohibition signal is not input from the read prohibition control terminal 14. Therefore, the data write setting signal and the data read setting signal input from the read / write switching control terminal 13 are read inhibit control circuit 11 via the first switching control signal line 15.
To the second switching control signal line 16 as it is.
Is transmitted to the non-volatile memory 51 via. That is,
Similar to the conventional example, the read state or the write state of the nonvolatile memory 51 can be switched. When the nonvolatile memory 51 is in the data writing state, the data input / output terminal 5 is added to the address of the nonvolatile memory 51 specified by the address data input from the address input terminal 53.
The data input from 4 can be written. When the non-volatile memory 51 is in the data read state, the data of the address of the non-volatile memory 51 designated by the address data input from the address input terminal 53 can be read from the data input / output terminal 54.

However, once the read inhibit signal is input from the read inhibit control terminal 14, the nonvolatile memory register 12 holds the read inhibit information and holds this information until the data in the nonvolatile memory 51 is erased. to continue. At this time, even if a data read setting signal is input from the read / write switching control terminal 13, the nonvolatile memory 51 does not enter the read state.

This is because the input data read setting signal is transmitted to the read prohibition control circuit 11 via the first switching control signal line 15, but the read prohibition control circuit 11 receives the second read prohibition signal. This is because the read prohibition information of the non-volatile memory register 12 is read via the signal line 18, and as a result, the transmitted data read setting signal is not output to the non-volatile memory 51. Therefore, although the data can be written in the nonvolatile memory 51, the data cannot be read. That is, the confidentiality of the data stored in the non-volatile memory 51 is maintained.

In a normal operation state, the CPU 52 designates an address in the non-volatile memory 51 via the internal address bus 59 and data of the designated address via the internal data bus 60 as in the conventional example. Read out and operate according to the data.

A register equivalent to the non-volatile memory register 12 may be set in the area of the non-volatile memory 51. In this case, the read prohibition control terminal 14 becomes unnecessary, and it is sufficient to input the data designating the address of the register from the address input terminal 53 and the read prohibition data from the data input / output terminal 54.

[0032]

According to the integrated circuit device having a built-in non-volatile memory according to the first aspect of the present invention, once the signal for prohibiting the reading of the data stored in the non-volatile memory is input, the information holding means reads the data. In order to continue to hold the prohibition information, the read prohibition control circuit does not output the signal to the nonvolatile memory even when the signal for making the data readable state is input. Therefore, reading of data from the non-volatile memory can be prohibited, and confidentiality of the data stored in the non-volatile memory can be realized.

According to the integrated circuit device with the built-in non-volatile memory according to the second aspect of the present invention, the confidentiality of the data stored in the non-volatile memory can be realized only by adding an extremely simple circuit configuration. .

[Brief description of drawings]

FIG. 1 is a configuration diagram of an integrated circuit device having a nonvolatile memory according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a conventional integrated circuit device containing a nonvolatile memory.

[Explanation of symbols]

 11 read inhibit control circuit 12 non-volatile memory register 13 read / write switching control terminal 14 read inhibit control terminal 15 first read / write switching signal line 16 second read / write switching signal line 17 first read inhibit signal line 18 second read inhibit Signal line 51 Non-volatile memory 52 CPU 53 Address input terminal 54 Data input / output terminal 55 Read / write switching control terminal 56 External address bus 57 External data bus 58 Read / write switching signal line 59 Internal address bus 60 Internal data bus

Claims (2)

[Claims] 1. An integrated circuit device with a built-in non-volatile memory, comprising a non-volatile memory for storing data required for controlling a device body, wherein reading of data stored in said non-volatile memory is prohibited. And a non-volatile memory, which holds the read prohibition information when the signal to be input from the outside is held, and holds the read prohibition information until the data stored in the non-volatile memory is erased. When a signal for making the data readable state is input from the outside, it is determined whether or not the information holding unit holds the read prohibition information, and if it holds, the input signal is stored in the nonvolatile A read inhibit control circuit that outputs the input signal to the non-volatile memory when not holding it while not outputting to the memory DOO nonvolatile memory integrated circuit device according to claim. 2. The non-volatile memory according to claim 1, wherein the information holding unit includes a non-volatile memory register that cannot be initialized until the data stored in the non-volatile memory is erased. Built-in integrated circuit device.