JPH08289301A - Image coding device - Google Patents

Abstract

PURPOSE: To prevent the increase of both calculation frequency and power consumption that are caused by the increase of a searching range by adaptively control the calculation frequency of evaluation value in accordance with the degee of inter-block movement. CONSTITUTION: The data to be coded are inputted to a block divider 11 via a coding frame memory 10. The divider 11 divides the image data equivalent to a single frame into pixels, and these pixels are inputted to a coding mode decider 100 and a motion vector detection part 200. If the decider 100 decides the validity of coding blocks, the block image data are inputted to a DCT 14 where the DCT coefficient is quantized by a quantizer 15. The quantized data undergo the adverse DCT as well as the adverse quantization via an adverse quantizer 16 and then written into a reference FM 30. At the part 200, a block matching unit 201 performs a differential operation between the coding blocks divided by the divider 11 and the reference block read out of the FM 30 in response to the instruction given from a sampling number indicator 203. Then a motion vector detector 202 detects the inter-block shift that has the least evaluation value within a searching range.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-efficiency coding method for image data, and reduces the number of evaluation value calculations of a motion vector detector to reduce the processing time required for motion vector detection and power consumption reduction. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal encoding system and device for the purpose of achieving the object.

[0002]

2. Description of the Related Art Generally, an image on a TV telephone device or a TV conference device has a small moving area. Therefore, various encoding methods for highly compressing data are proposed by utilizing characteristics such as redundancy of image data. Has been done. Typical coding methods include "frame dropping method", "interframe predictive coding", "orthogonal transform coding", "quantization", "variable length coding" and the like. Usually, high efficiency coding is realized by combining these coding methods. A combination of "interframe predictive coding" and "orthogonal transform coding" (Hybrid Cod
ing) is also adopted in the moving picture coding system (H.261) recommended by ITU-TS (formerly CCITT: International Telegraph and Telephone Consultative Committee).

In the inter-frame predictive coding method, difference information between a coded frame to be coded and a reference frame (previous frame coded / decoded immediately before) is calculated, and a decoded image is obtained from this difference information. It is a method. Further, in the inter-frame predictive coding method, the difference information between the coded frame and the reference frame is used as an evaluation value, and a motion vector (a vector indicating the moving direction of the image) is set so that this evaluation value is minimized.
By detecting, the decoded image can be obtained from the motion vector and the prediction error signal.

A general motion vector detecting device will be briefly described.

The coded frame and the reference frame are divided into small blocks (for example, 16 × 16 pixels), and when the block is a block to be coded, the motion vector detection apparatus uses the coded block and the time axis. At, the difference value between the coding block and the reference block is calculated using the reference block existing at the same position as the reference point of the motion vector search. When the difference calculation process for one point is completed, the reference block is shifted by a constant interval (for example, in units of one pixel), and the difference value between the coding block and the reference block is calculated again.
This series of processing is performed within a predetermined search range (or search count)
For all the points of, and the positional relationship between the coding block and the reference block having the smallest difference value within the range is detected as a motion vector. This is an evaluation method called block matching and is widely used.

In the motion vector search, the larger the search range is, the more accurately the motion vector between the coding block and the reference block can be detected. However, the calculation amount increases in proportion to the size of the search range. To do. Therefore, in general, the motion vector search is often performed within the range of ± 4 to ± 15 pixels of the reference point. By the way, the number of calculations when the search range is ± 4 pixels is 16 pixels × 16 pixels × 8.
1 point = 20736 times.

The purpose of reducing the number of calculations is disclosed in JP-A-5-336512.

[0008]

In the conventional evaluation value calculation of the motion vector search process, since the number of calculations per point is 16 pixels × 16 pixels = 256 times, a large calculation is required if the search range is set wide. There was a problem that the number of times was required.

An object of the present invention is to adaptively control the number of evaluation value calculations in accordance with the magnitude of movement between blocks, thereby preventing an increase in the number of calculations and an increase in power consumption associated with an increase in the search range. Especially.

[0010]

In order to solve the above-mentioned problems, the motion vector detecting apparatus of the present invention is capable of arbitrarily setting the number of calculations required for the evaluation value calculation per point.

In a particularly preferable aspect of the present invention, in the motion vector detecting device, when evaluating the image data of the coded block and the reference block, an arbitrary pixel is evaluated. That is, the image data of the coding block and the reference block are sub-sampled to perform an arbitrary number of operations.

[0012]

By the process of sub-sampling the image data between the blocks, the number of calculation of the evaluation value calculation can be reduced, so that the processing time required for the evaluation value calculation can be shortened at the same time.
Low power consumption can be achieved.

[0013]

FIG. 1 shows an image coding apparatus according to a first embodiment of the present invention. The image data 1 to be encoded is input to the encoding frame memory (FM) 10 and is temporarily retained. The block divider 11 divides the image data of one frame of the encoded FM 10 into M × N pixels (for example, M = N = 16), and the encoding mode determiner 100 and the motion vector detector 2
The image data divided into 00 is input. The coding mode determiner 100 determines valid / invalid blocks and interframe / intraframe coding. The motion vector detection unit 200 detects motion vectors of the coded block and the reference block. The encoding operation will be briefly described below.

The coding mode decision unit 100 accumulates and adds the differences between the pixels of the coding block and the reference block,
The result is compared with a predetermined threshold value to determine whether the block is valid or invalid.

If the block to be encoded is invalid, it is not encoded.

When the block to be coded is valid and the coding mode is intraframe coding, the selector 13 selects the terminal a, so that the block image data is DCT as it is.
14 is sent. The DCT 14 converts the block image data into DCT coefficients, and the DCT coefficients are quantized by the quantizer 15.
To enter. The quantizer 15 quantizes the DCT coefficient with a quantization step size of 7.

The quantized coefficient data is the variable length encoder 2
0 and is input to the inverse quantizer 16. Variable length encoder 20
Then, the quantized coefficient data is variable-length coded so as to be efficiently coded, and is output to the transmission interface as a code word. The inverse quantizer 16 inversely quantizes the quantized coefficient data and outputs it to the inverse DCT 17. Reverse DC
In T17, the inversely quantized coefficient data is inversely DCT'ed and returned to a decoded image. At this time, the selector 19 selects a,
The decoded image is written in the reference FM 30 and serves as a reference image when the next frame is encoded.

When the block to be coded is valid and inter-frame coding is performed, the selector 13 selects the b terminal, so that the reference image pointed to by the motion vector 3 detected by the motion vector detecting section 200 is read from the reference FM 30. Then, the in-loop filter 31 is further operated, the prediction error 4 is generated by the subtractor 12, and the prediction error 4 is sent to the orthogonal transformer (DCT) 14.
The DCT 14 converts the block image data into DCT coefficients and inputs the DCT coefficients to the quantizer 15. The quantizer 15 quantizes the DCT coefficient with a quantization step size of 7.

The quantized coefficient data is input to the variable length encoder 20 and the inverse quantizer 16. Variable length encoder 2
At 0, the quantized coefficient data is variable-length coded so as to be efficiently coded, and is output to the transmission interface as a code word. On the other hand, the output of the quantizer 15 is inversely quantized by the inverse quantizer 16 and further inversely DCT by the inverse DCT 17.

At this time, the selector 19 selects the b terminal,
The reference image read from the reference FM 30 is added to the prediction error signal output from the inverse DCT 17 and the adder 19 via the in-loop filter 31 and the delay device 32, and is added to the reference FM.
Written in 30.

The operation of the motion vector detecting section 200 of the present invention will be described. The block matching unit 201 performs a difference operation on a pixel-by-pixel basis between the encoded block divided by the block divider 11 and the reference block read from the reference FM 30, and the difference operation value is sequentially subjected to absolute value addition processing, and the addition result is an evaluation value. As a motion vector between blocks is detected. When the evaluation of one point is completed, the reference block shifted by several points is read from the reference FM 30, and the absolute difference addition processing between blocks is performed again. When the evaluation value calculated at this time is smaller than the evaluation values calculated so far, the shift between the coding block and the reference block is temporarily held as a motion vector. This series of processes is repeated for all pixels within a predetermined range. Then, the motion vector detector 202 detects the shift between the blocks having the smallest evaluation value within the search range.

The subsampling processing mode motion vector detection of the present invention will be described. The sub-sampling number indicator 203 selects and calculates an evaluation pixel with the set sub-sampling number in the pattern matching process of evaluating the block to be encoded and the reference block. The instruction of the sub-sampling number by the sub-sampling number indicator 203 inputs the calculation result of the valid / invalid evaluation value calculator 101 to the threshold memory 204, and the threshold memory 204
Is performed based on the comparison result with the threshold value stored in advance. The number of thresholds stored in the threshold memory 204 is one or more.
03 controls the block matching unit 201 so as to perform subsampling with the number and pattern of subsampling corresponding to the above-mentioned comparison result.

For example, when the sub-sampling number is set to 128 pixels, the block matching unit 201 performs the absolute difference addition processing only on the black circle pixels shown in FIG. 4 (c). In the sub-sampling processing mode motion vector detection, the absolute difference value addition processing can be performed at high speed, and the processing in the motion vector detection processing can be speeded up and power consumption can be reduced.

Next, a motion vector detector which is a second embodiment of the present invention will be described with reference to FIG. Coded FM
10 and the reference block data read from the reference FM 30 in block units (16 × 16 pixels) are input to the valid / invalid evaluation value calculator 101, and the sum of absolute differences between blocks is calculated as an evaluation value. To do. In general,
When the evaluation value in the valid / invalid judgment is large, the mobility between the coding block and the reference block is large, and the correlation between the blocks is low. On the contrary, when the evaluation value in the valid / invalid determination is small, the mobility between the coding block and the reference block is small, and the correlation between the blocks is high. Then, using this evaluation value, it is determined whether the coding block is valid or invalid.

If the determination result is invalid, the next block is processed without performing the motion vector detecting process.

If the determination result is valid, the valid / invalid determination evaluation value is output to the threshold memory 204. As in the threshold memory map shown in FIG.
4 stores the number of sub-samplings of pixel data in the block matching process, and the threshold memory address uses the upper 4 bits of the valid / invalid determination evaluation value. However, the number of sub-sampling data stored is not particularly limited, and since the number of sub-sampling data to be stored is 16 in FIG. 3, the threshold memory address is set to the upper 4 of the valid / invalid judgment evaluation values. Although it is set as a bit, it is not limited to this value.

Here, when the valid / invalid judgment evaluation value (memory address value) is large, in order to reduce the number of evaluation pixels in the block matching processing, a value with a small sub-sampling number is loaded and the block matching unit 2
Output to 01. Conversely, when the valid / invalid determination evaluation value is small, a value with a large sub-sampling number is loaded and output to the block matching unit 201 in order to increase the number of evaluation pixels in the block matching process. The sub-sampling number indicator 203 has a threshold memory 204.
The number of sub-sampling loaded from is input to the block matching unit 201. The block matching unit 201 takes out pixel data of each of the coded block data and the reference block data designated by the sub-sampling number designator 203, and sequentially performs difference absolute value addition processing.

FIG. 4 shows an example of the sub-sampling pixel pattern in the block matching process. In the block matching unit, black circle pixels in the figure are subjected to difference absolute value addition processing, and white circle pixels are not the target of the difference absolute value addition operation. Therefore, the smaller the number of sub-samplings, the smaller the number of calculations required for the search per point.

FIG. 4A shows a case where the matching is calculated for all 256 pixels, and FIG. 4B shows 192 pixels,
(C) is a figure which shows an example of a sub-sampling pixel pattern at the time of calculating a matching about 128 pixels and (d) 64 pixels.

In FIG. 4B, a pattern is constructed by arranging pixels for which matching is not calculated every three pixels in the horizontal direction and sequentially displacing pixels for which matching is not calculated. By arranging pixels (or pixels to be calculated) for which matching is not calculated every predetermined number in this way, and sequentially shifting them, it is possible to prevent pixels for which matching is not calculated from solidifying, and to set information in both the vertical and horizontal directions. Can be reduced.

In FIG. 4C, every other pixel in the horizontal direction and the vertical direction is arranged for matching. If the pixels are evenly arranged in this way, pixels for which matching is performed and pixels for which matching is not performed are arranged as targets, so that loss of information can be similarly reduced. When the calculation result in the block matching unit 201 is smaller than the calculation results calculated up to that point, the calculation result is held as the minimum error, and at the same time, the shift (coordinates) between the coding block and the reference block is moved. It is output to the motion vector detector 202 as a vector.

The processing up to this point is the motion vector search processing per point, and the processing is repeated for all points within the search range. If the processing within the predetermined search range is not completed, the point indicator 205 instructs to read the reference block data corresponding to the next search point. When the search process within the predetermined search range is completed, the block matching unit 201 encodes the minimum error data as a motion vector.

Next, a motion vector detector which is a third embodiment of the present invention will be described with reference to FIG. Coded FM
10 and the reference block data read from the reference FM 30 in block units (16 × 16 pixels) are input to the valid / invalid evaluation value calculator 101 to calculate the sum of absolute differences between blocks, Further, it is determined whether the coded block is valid or invalid.

If the determination result is invalid, the motion vector is not detected and the next block is processed.

When the determination result is valid, the subsampling mode switch 210 outputs a subsampling on / off control signal to the subsampling number indicator 203. When the subsampling mode signal is on, the subsampling number indicator 203 loads the subsampling number stored in the subsampling memory 211 and outputs it to the block matching unit 201. When the subsampling mode is off, subsampling is not performed. The block matching unit 201 extracts pixel data from the encoded block data and the reference block data with the subsampling number designated by the subsampling number designating unit 203, and sequentially performs the absolute difference adding process.
When the calculation result in the block matching unit 201 is smaller than the calculation results calculated up to that point, the calculation result is held as the minimum error, and at the same time, the shift (coordinates) between the coding block and the reference block is moved. It is output to the motion vector detector 202 as a vector.

The processing up to this point is the motion vector search processing per point, and the processing is repeated for all points within the search range. If the processing within the predetermined search range is not completed, the point indicator 205 instructs to read the reference block data corresponding to the next search point. When the search process within the predetermined search range is completed, the block matching unit 201 encodes the minimum error data as a motion vector.

[0037]

According to the above invention, it is possible to perform the optimum motion vector detection processing corresponding to the magnitude of the motion of the image between the blocks. Further, it is possible to reduce the power consumption required for the motion vector detection processing, and in particular, it is possible to improve the usage time in battery driving in a portable wireless TV terminal or the like that requires battery driving.

As described above, the present invention is extremely effective in realizing an image coding apparatus with high speed processing and low power consumption.

[0039]

[Brief description of drawings]

FIG. 1 shows a configuration of an image coding apparatus that is a first embodiment of the present invention.

FIG. 2 shows a configuration of a motion vector detector that is a second embodiment of the present invention.

FIG. 3 shows a configuration of a threshold memory which is a second embodiment of the present invention.

FIG. 4 shows a sub-sampling method of pixel data.

FIG. 5 shows a configuration of a motion vector detector that is a third embodiment of the present invention.

[Explanation of symbols]

1 ... Input image data, 2 ... Encoding mode, 3 ... Motion vector, 4 ... Prediction error, 10 ... Encoding FM memory, 11 ...
Block divider, 12 ... Subtractor, 13 ... Selector, 14 ...
DCT, 15 ... Quantizer, 16 ... Inverse quantizer, 17 ... Inverse DCT, 18 ... Adder, 19 ... Selector, 20 ... Variable length encoder, 30 ... Reference FM memory, 31 ... In-loop filter, 32 ... delay device, 100 ... coding mode determination device, 20
0 ... Motion vector detection unit 101 ... Valid / invalid evaluation value calculation unit, 201 ... Block matching unit, 202 ... Motion vector detector, 203 ... Subsampling number indicator, 204 ... Threshold memory, 2
05 ... Point indicator, 210 ... Subsampling mode switcher, 211 ... Subsampling memory

Claims (3)

[Claims] 1. A block dividing means for dividing image data to be encoded and image data decoded one frame before into M × N pixel units, and a difference evaluation value between blocks of the image data divided into blocks. If the calculated value is smaller than a certain threshold value, it is judged invalid and the next block is processed. Conversely, if it is larger than the threshold value, it is judged valid and the encoding process is performed. Valid / invalid The determination means, the motion vector detection means for detecting the motion vector between the blocks determined to be valid, the block matching means for performing pattern matching in pixel units between the blocks, and the number of pixels in the matching processing are arbitrarily set. An image coding apparatus having a sub-sampling number setting means capable of performing the above. 2. A block division means for dividing image data to be encoded and image data decoded one frame before into M × N pixel units, and a difference evaluation value between blocks of the image data divided into blocks. If the calculated value is smaller than a certain threshold value, it is judged invalid and the next block is processed. Conversely, if it is larger than the threshold value, it is judged valid and the encoding process is performed. Valid / invalid The determination means and the motion vector detection means for detecting the motion vector of the block determined to be valid store the number of sub-samplings required by the block matching means according to claim 1, and based on the result of the validity / invalidity determination means. Memory means for loading the stored sub-sampling number and evaluation in block matching by holding the sub-sampling number loaded from the memory means Image encoding device characterized by having a sub-sampling number indicator for indicating the number of pixels. 3. A block division means for dividing image data to be encoded and image data decoded one frame before into M × N pixel units, and a difference evaluation value between blocks of the image data divided into blocks. If the calculated value is smaller than a certain threshold value, it is judged invalid and the next block is processed. Conversely, if it is larger than the threshold value, it is judged valid and the encoding process is performed. Valid / invalid 2. The determining means and the motion vector detecting means for detecting the motion vector of the block which is determined to be valid have mode switching means capable of arbitrarily setting the operation mode of the motion vector detecting means. Image coding device.