JPH08279706A - Distributed constant line - Google Patents

Distributed constant line

Info

Publication number
JPH08279706A
JPH08279706A JP7082402A JP8240295A JPH08279706A JP H08279706 A JPH08279706 A JP H08279706A JP 7082402 A JP7082402 A JP 7082402A JP 8240295 A JP8240295 A JP 8240295A JP H08279706 A JPH08279706 A JP H08279706A
Authority
JP
Japan
Prior art keywords
layer
signal line
distributed constant
line
ground layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7082402A
Other languages
Japanese (ja)
Other versions
JP3213736B2 (en
Inventor
Kenji Hagiwara
健治 萩原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Aviation Electronics Industry Ltd
Original Assignee
Japan Aviation Electronics Industry Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Aviation Electronics Industry Ltd filed Critical Japan Aviation Electronics Industry Ltd
Priority to JP08240295A priority Critical patent/JP3213736B2/en
Publication of JPH08279706A publication Critical patent/JPH08279706A/en
Application granted granted Critical
Publication of JP3213736B2 publication Critical patent/JP3213736B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations

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  • Waveguides (AREA)

Abstract

PURPOSE: To provide a distributed constant circuit within the small volume having a long electric length as designed by folding zigzag a flexible printed circuit board composed of two layers of a signal line layer and a ground layer for each fixed length and convolving the signal layer and the ground layer while inverting the front side and the rear side. CONSTITUTION: Closely checking a section C, where an EPC is folded zigzag and dropped from a hill to a dale, and the section where it is moved upward from the dale to the hill, it is found that continuous signal lines 11 at both sections face each other. More closely checking the place where a front face cover coat layer 5 at the section and a front face ground layer 2a at a section D are interposed between these confronted signal lines 11, these signal lines 11 are shielded each other by the ground layer 2a and do not directly face each other. Therefore, electrostatic coupling between signal lines is eliminated. This is similarly established even concerning a section E dropped from the hill, where the continuous signal lines 11 face each other, to the dale and a section F raised from the dale to the hill as well. Therefore, the distributed constant circuit having the required electric length can be easily provided as designed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、分布定数線路に関
し、特に信号線層とグランド層の2層より成る可撓性プ
リント回路を一定の長さ毎にジグザグに折り返して信号
線層とグランド層を表裏逆転させて畳み込み構成した分
布定数線路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distributed constant line, and more particularly, to a signal line layer and a ground layer by folding a flexible printed circuit consisting of two layers of a signal line layer and a ground layer in a zigzag pattern at regular intervals. The present invention relates to a distributed constant line in which the front and back sides are reversed to convolve.

【0002】[0002]

【従来の技術】分布定数線路の従来例を図4を参照して
説明する。図4は、信号線層とグランド層の2層より成
る可撓性プリント回路(FPC)を使用した分布定数線
路を分布定数フィルタ線路として使用する従来例を説明
する図である。図4(a)は表面図、図4(b)は図4
(a)のA−A線に沿った断面を示す図、図4(c)は
裏面図である。
2. Description of the Related Art A conventional example of a distributed constant line will be described with reference to FIG. FIG. 4 is a diagram illustrating a conventional example in which a distributed constant line using a flexible printed circuit (FPC) including two layers of a signal line layer and a ground layer is used as a distributed constant filter line. 4 (a) is a front view and FIG. 4 (b) is FIG.
The figure which shows the cross section along the AA line of (a), and FIG.4 (c) is a back view.

【0003】図4において、1は信号線層であり、11
は信号線層1を構成する信号線である。2はグランド層
を示す。4は絶縁層であり、信号線層1とグランド層2
の間に介在して信号線11とグランド層2の間を絶縁し
ている。信号線11は極く薄い導電性薄膜より成り、絶
縁層4の表面にプリントにより形成される。グランド層
2は絶縁層4の裏面全面に形成された導電性薄膜より成
る。3は表面カバーコート、5は裏面カバーコートを示
す。説明の都合上、図4(a)においては表面カバーコ
ート3を省略し、図4(c)においては裏面カバーコー
ト5を省略して示している。
In FIG. 4, 1 is a signal line layer, and 11
Are signal lines constituting the signal line layer 1. 2 indicates a ground layer. 4 is an insulating layer, which is a signal line layer 1 and a ground layer 2
And the signal line 11 and the ground layer 2 are insulated from each other. The signal line 11 is made of an extremely thin conductive thin film, and is formed on the surface of the insulating layer 4 by printing. The ground layer 2 is made of a conductive thin film formed on the entire back surface of the insulating layer 4. Reference numeral 3 indicates a front surface cover coat, and 5 indicates a rear surface cover coat. For convenience of description, the front surface cover coat 3 is omitted in FIG. 4A, and the back surface cover coat 5 is omitted in FIG. 4C.

【0004】図4に示される信号線層1とグランド層2
の2層より成るFPCを使用して分布定数フィルタ線
路、或は一定の特性インピーダンスを有する分布定数遅
延線路その他の分布定数伝送線路を構成することができ
る。即ち、信号線層1を構成する信号線11とグランド
層2は絶縁層4を介して対向し、両者間に分布容量を形
成するキャパシタを構成している。この分布容量は導電
性薄膜より成る信号線11の幅、信号線11の長さ、絶
縁層4の厚さおよび材料を適宜に設計調整することによ
り決定される。この分布容量を形成するキャパシタを雑
音除去用の分布定数フィルタ線路として使用し、或は一
般に分布定数伝送線路として使用することができる。
The signal line layer 1 and the ground layer 2 shown in FIG.
It is possible to construct a distributed constant filter line, a distributed constant delay line having a constant characteristic impedance, or another distributed constant transmission line using the FPC consisting of two layers. That is, the signal line 11 forming the signal line layer 1 and the ground layer 2 face each other with the insulating layer 4 in between, and form a capacitor that forms a distributed capacitance therebetween. This distributed capacitance is determined by appropriately designing and adjusting the width of the signal line 11 made of a conductive thin film, the length of the signal line 11, the thickness of the insulating layer 4, and the material. The capacitor forming this distributed capacitance can be used as a distributed constant filter line for noise elimination, or can be generally used as a distributed constant transmission line.

【0005】FPC長を長くすること、即ち電気長を長
くすることにより遮断特性の良好な分布定数フィルタ線
路或は一定の特性インピーダンスを有する分布定数遅延
線路とすることができる。分布定数フィルタ線路或は分
布定数遅延線路は信号線11とグランド層2との間にそ
れぞれ信号線11の数だけ構成されている訳である。こ
こで、長いFPCを小容積に格納したい場合、これを図
4に示される信号線11とグランド層2の2層よりなる
FPCを一定の長さ毎にジグザグに折り返して畳み込む
ことが行なわれている。図5は図4に示されるFPCを
一定の長さ毎にジグザグに折り返して畳み込んで構成し
た分布定数フィルタ線路或は分布定数伝送線路の断面を
示す図である。
By increasing the FPC length, that is, by increasing the electrical length, a distributed constant filter line having a good cutoff characteristic or a distributed constant delay line having a constant characteristic impedance can be obtained. That is, the distributed constant filter line or the distributed constant delay line is formed between the signal line 11 and the ground layer 2 by the number of signal lines 11 respectively. Here, when it is desired to store a long FPC in a small volume, the FPC composed of two layers of the signal line 11 and the ground layer 2 shown in FIG. 4 is folded back in a zigzag at regular intervals and folded. There is. FIG. 5 is a diagram showing a cross section of a distributed constant filter line or a distributed constant transmission line configured by folding back the FPC shown in FIG. 4 in a zigzag at constant lengths and folding it.

【0006】[0006]

【発明が解決しようとする課題】ところで、信号線層1
とグランド層2の2層より成るFPCを単純に折り返し
畳み込むことに依っては、同一信号線層1同志が表面カ
バーコート層3を間に介して対向することとなり、対向
する連続した信号線11同志が静電的に結合して浮遊容
量を発生するに到る。これを図5を参照して説明する
に、FPCをジグザグに折り返して山から谷に降下する
Cにより示される部分と谷から山に上昇するDにより示
される部分に着目すると、両部分の連続する信号線11
同志は表面カバーコート層3の2層を間に介して対向し
ている。この様に連続する信号線11同志が対向するこ
とにより両者は静電的に結合し、ここに浮遊容量を発生
する。信号線11とグランド層2との間の分布容量は、
上述した通り導電性薄膜より成る信号線11の幅、信号
線11の長さ、絶縁層4の厚さおよび材料に着目して設
計調整することができるが、信号線11間に浮遊容量が
発生することになると、この浮遊容量は不定であるとこ
ろから、これに災いされて設計通りの分布容量が得られ
なくなり、必要とされる電気長或は特性インピーダンス
を得ることはできないことになる。
By the way, the signal line layer 1
By simply folding back the FPC consisting of two layers, the ground layer 2 and the ground layer 2, the same signal line layers 1 face each other with the surface cover coat layer 3 in between, and the continuous signal lines 11 that face each other. The comrades are electrostatically coupled to generate stray capacitance. This will be described with reference to FIG. 5. Focusing on a portion indicated by C where the FPC is folded back in a zigzag manner and descending from a mountain to a valley, and a portion indicated by D rising from a valley to a mountain, both portions are continuous. Signal line 11
The comrades face each other with the two layers of the surface cover coat layer 3 in between. In this way, the signal lines 11 that are continuous with each other oppose each other, so that they are electrostatically coupled to generate a stray capacitance. The distributed capacitance between the signal line 11 and the ground layer 2 is
As described above, the design adjustment can be made by paying attention to the width of the signal line 11 made of the conductive thin film, the length of the signal line 11, the thickness of the insulating layer 4, and the material, but stray capacitance occurs between the signal lines 11. In this case, since the stray capacitance is indefinite, the distributed capacitance cannot be obtained as designed due to the stray capacitance, and the required electrical length or characteristic impedance cannot be obtained.

【0007】この発明は、信号線層とグランド層の2層
より成る可撓性プリント回路を一定の長さ毎にジグザグ
に折り返して信号線層とグランド層を表裏逆転させて畳
み込んで上述の通りの問題を解消した分布定数線路を提
供するものである。
According to the present invention, a flexible printed circuit composed of two layers, a signal line layer and a ground layer, is folded back in a zigzag pattern at regular intervals, and the signal line layer and the ground layer are turned upside down and folded up. It is intended to provide a distributed constant line that solves the above problems.

【0008】[0008]

【課題を解決するための手段】信号線11を形成した信
号線層1とグランド層2の2層より成る可撓性プリント
回路を一定の長さ毎にジグザグに折り返して信号線層1
とグランド層2を表裏逆転させて畳み込み構成した分布
定数伝送線路を構成した。そして、可撓性プリント回路
は絶縁層6の表裏両面に信号線層1とグランド層2を形
成したものである分布定数伝送線路を構成した。
A flexible printed circuit composed of two layers, a signal line layer 1 having a signal line 11 formed thereon and a ground layer 2, is folded back in a zigzag pattern at regular intervals to form the signal line layer 1.
And the ground layer 2 are turned upside down to form a convolved distributed constant transmission line. The flexible printed circuit constitutes a distributed constant transmission line in which the signal line layer 1 and the ground layer 2 are formed on both front and back surfaces of the insulating layer 6.

【0009】また、信号線層1とグランド層2とを絶縁
層6の表裏両面に一定の長さ毎に交互に形成し、互に隣
接する表裏の信号線11同志を電気的に接続すると共に
互に隣接する表裏のグランド層2a、2b同志を電気的
に接続する分布定数伝送線路を構成した。ここで、信号
線11を形成した信号線層1とグランド層2の2層より
成る可撓性プリント回路を一定の長さ毎にジグザグに折
り返して信号線層1とグランド層2を表裏逆転させて畳
み込み構成したことを特徴とする分布定数フィルタ線路
を構成した。
Further, the signal line layers 1 and the ground layers 2 are alternately formed on both the front and back surfaces of the insulating layer 6 at regular intervals, and the signal lines 11 on the front and back sides adjacent to each other are electrically connected. A distributed constant transmission line electrically connecting the front and back ground layers 2a and 2b adjacent to each other was constructed. Here, the flexible printed circuit including two layers of the signal line layer 1 and the ground layer 2 on which the signal line 11 is formed is folded back in a zigzag at a constant length so that the signal line layer 1 and the ground layer 2 are turned upside down. We constructed a distributed constant filter line characterized by a convolutional configuration.

【0010】そして、可撓性プリント回路は絶縁層の表
裏両面に信号線層1とグランド層2を形成したものであ
る分布定数フィルタ線路を構成した。また、信号線層1
とグランド層2とを絶縁層6の表裏両面に一定の長さ毎
に交互に形成し、互に隣接する表裏の信号線11同志を
電気的に接続すると共に互に隣接する表裏のグランド層
2a、2b同志を電気的に接続する分布定数フィルタ線
路を構成した。
The flexible printed circuit has a distributed constant filter line in which the signal line layer 1 and the ground layer 2 are formed on both front and back surfaces of the insulating layer. Also, the signal line layer 1
And the ground layer 2 are alternately formed on the front and back surfaces of the insulating layer 6 at regular intervals, and the signal lines 11 on the front and back adjacent to each other are electrically connected to each other and the ground layers 2a on the front and back adjacent to each other. A distributed constant filter line for electrically connecting 2b to each other was constructed.

【0011】更に、信号線11を形成した信号線層1と
グランド層2の2層より成る可撓性プリント回路を一定
の長さ毎にジグザグに折り返して信号線層1とグランド
層2を表裏逆転させて畳み込み構成した分布定数遅延線
路を構成した。また、可撓性プリント回路は絶縁層の表
裏両面に信号線層1とグランド層2を形成したものであ
る分布定数遅延線路を構成した。
Further, a flexible printed circuit composed of two layers of the signal line layer 1 and the ground layer 2 on which the signal line 11 is formed is zigzag-folded at a constant length so that the signal line layer 1 and the ground layer 2 are arranged on the front and back sides. We constructed a distributed constant delay line that is inverted and convolved. Further, the flexible printed circuit constitutes a distributed constant delay line in which the signal line layer 1 and the ground layer 2 are formed on both front and back surfaces of the insulating layer.

【0012】そして、信号線層1とグランド層2とを絶
縁層の表裏両面に一定の長さ毎に交互に形成し、互に隣
接する表裏の信号線11同志を電気的に接続すると共に
互に隣接する表裏のグランド層2a、2b同志を電気的
に接続する分布定数遅延線路を構成した。
Then, the signal line layer 1 and the ground layer 2 are alternately formed on the front and back surfaces of the insulating layer at regular intervals, and the signal lines 11 on the front and back adjacent to each other are electrically connected to each other. A distributed constant delay line for electrically connecting the front and back ground layers 2a and 2b adjacent to each other was constructed.

【0013】[0013]

【実施例】この発明の実施例を図1ないし図3を参照し
て説明する。図1は信号線層とグランド層の2層より成
るFPCを使用した分布定数線路を分布定数フィルタ線
路として使用する実施例を説明する図であり、図1
(a)は表面図、図1(b)は図1(a)のA−A線に
沿った断面を示す図、図1(c)は裏面図である。図2
は図1に示されるFPCを折り返して畳み込んで構成し
た線路の断面を示す図である。図3は図2の線路を基板
に実装したところの斜視図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a diagram for explaining an embodiment in which a distributed constant line using an FPC composed of two layers of a signal line layer and a ground layer is used as a distributed constant filter line.
1A is a front view, FIG. 1B is a view showing a cross section taken along line AA of FIG. 1A, and FIG. 1C is a back view. Figure 2
FIG. 2 is a diagram showing a cross section of a line formed by folding and folding the FPC shown in FIG. 1. FIG. 3 is a perspective view of the line of FIG. 2 mounted on a substrate.

【0014】図1において、1aは表面信号線層を示
し、1bは裏面信号線層を示す。20は信号線層1を構
成する信号線11を貫通させるスルーホールである。2
aは表面グランド層を示し、2bは裏面グランド層を示
す。40は表面グランド層2aと裏面グランド層2bと
を電気的に接続する接続導線を貫通させるスルーホール
である。5は表面カバーコートを示し、7は裏面カバー
コートを示す。6は絶縁層である。なお、説明の都合
上、図1(a)は表面カバーコート5を省略し、図1
(c)は裏面カバーコート7を省略して示している。
In FIG. 1, 1a indicates a front surface signal line layer, and 1b indicates a rear surface signal line layer. Reference numeral 20 is a through hole that penetrates the signal line 11 forming the signal line layer 1. Two
Reference symbol a denotes a front surface ground layer, and reference symbol 2b denotes a back surface ground layer. Reference numeral 40 is a through hole for penetrating a connecting lead wire that electrically connects the front surface ground layer 2a and the back surface ground layer 2b. Reference numeral 5 represents a front surface cover coat, and 7 represents a back surface cover coat. Reference numeral 6 is an insulating layer. For convenience of explanation, the surface cover coat 5 is omitted in FIG.
In (c), the back cover coat 7 is omitted.

【0015】この実施例の場合も、従来例と同様に、信
号線層1を構成する信号線11とグランド層2は絶縁層
6を介して対向し、両者間に分布容量を形成するキャパ
シタを構成している。そして、この分布容量は導電性薄
膜より成る信号線11の幅、信号線11の長さ、絶縁層
6の厚さおよび材料を適宜に設計調整することにより決
定される。信号線層を形成する信号線11の幅の設計調
整は、これを周期的に変化させる設計調整も実施する。
この分布容量を形成するキャパシタを雑音除去用の分布
定数フィルタ線路として使用し、或は一般に分布定数伝
送線路として使用することができる。
Also in the case of this embodiment, similarly to the conventional example, the signal line 11 constituting the signal line layer 1 and the ground layer 2 are opposed to each other via the insulating layer 6, and a capacitor forming a distributed capacitance therebetween is formed. I am configuring. The distributed capacitance is determined by appropriately designing and adjusting the width of the signal line 11 made of a conductive thin film, the length of the signal line 11, the thickness of the insulating layer 6, and the material. The design adjustment of the width of the signal line 11 forming the signal line layer is also performed by changing the design periodically.
The capacitor forming this distributed capacitance can be used as a distributed constant filter line for noise elimination, or can be generally used as a distributed constant transmission line.

【0016】ここで、図1において、FPCの折り返さ
れる部分にAないしHなる符号を付すと、裏面の部分B
の信号線層1bはスルーホール20を介して表面の部分
Cの信号線層1aに連続しており、この表面の部分Cの
信号線層1aはスルーホール20を介して裏面の部分D
の信号線層1bに連続しており、そしてこの裏面の部分
Dの信号線層1bはスルーホール20を介して更に表面
の部分Eの信号線層1aに連続しており、以下同様であ
る。表面におけるグランド層2aおよび裏面におけるグ
ランド層2bは斜線により示されている。表面グランド
層2aと裏面グランド層2bはスルーホール40を貫通
する接続導線を介して電気的に接続されている。
Here, in FIG. 1, when the portions of the FPC that are folded back are designated by the symbols A to H, the portion B on the back surface is shown.
Of the signal line layer 1b is continuous with the signal line layer 1a of the front surface portion C via the through hole 20, and the signal line layer 1a of the front surface portion C is connected to the rear surface portion D via the through hole 20.
The signal line layer 1b of the rear surface portion D is continuous with the signal line layer 1a of the front surface portion E through the through hole 20, and so on. The ground layer 2a on the front surface and the ground layer 2b on the back surface are indicated by diagonal lines. The front surface ground layer 2a and the back surface ground layer 2b are electrically connected to each other via a connecting conductor penetrating the through hole 40.

【0017】図1には1点鎖線および2点鎖線が記載さ
れているが、1点鎖線は折り返し点が山折りされるとこ
ろを示し、2点鎖線は折り返し点が谷折りされるところ
を示している。図1に示されるFPCを鎖線の通りにジ
グザグに折り返して畳み込むと、図2に断面により示さ
れる通りの分布定数フィルタ線路或は分布定数遅延線路
が構成される。即ち、図1に示される部分Aないし部分
Hは、図2において図示される通りに対応する。
In FIG. 1, a one-dot chain line and a two-dot chain line are shown. The one-dot chain line shows where the turning point is mountain-folded, and the two-dot chain line shows where the turning point is valley-folded. ing. When the FPC shown in FIG. 1 is folded back in zigzag along the chain line and folded, a distributed constant filter line or distributed constant delay line as shown by the cross section in FIG. 2 is constructed. That is, the portions A to H shown in FIG. 1 correspond as shown in FIG.

【0018】図2を参照するに、FPCをジグザグに折
り返して山から谷に降下する部分Cと谷から山に上昇す
る部分Dに着目すると、両部分の連続する信号線11同
志は対向しているが、これら対向する信号線11同志の
間には部分Cの表面カバーコート層5、部分Dの表面カ
バーコート層5、部分Dの表面グランド層2a、および
絶縁層6が介在する。ここで、対向する両部分の連続す
る信号線11同志の間に、特に、部分Dの表面グランド
層2aが介在するところに着目すると、これら信号線1
1同志はグランド層2aにより互にシールドされて直接
に対向することはなくなり、信号線間の静電結合をなく
する。以上のことは連続する信号線11同志が対向する
山から谷に降下する部分Eと谷から山に上昇する部分F
についても同様に成り立っている。
Referring to FIG. 2, focusing on the portion C where the FPC is folded back in a zigzag manner and the portion C descending from the mountain to the valley and the portion D rising from the valley to the mountain, the continuous signal lines 11 of both portions face each other. However, the surface cover coat layer 5 of the portion C, the surface cover coat layer 5 of the portion D, the surface ground layer 2a of the portion D, and the insulating layer 6 are interposed between the signal lines 11 facing each other. Here, paying attention particularly to the fact that the surface ground layer 2a of the portion D is interposed between the continuous signal lines 11 of both facing portions, these signal lines 1
The ones are shielded from each other by the ground layer 2a and are not directly opposed to each other, thereby eliminating the electrostatic coupling between the signal lines. The above is the part E where the continuous signal lines 11 descend from the opposite mountain to the valley and the part F where the consecutive signal lines 11 rise from the valley to the mountain.
Similarly holds true for.

【0019】以上の通り、この発明の分布定数線路は、
信号線層とグランド層の2層より成る可撓性プリント回
路を一定の長さ毎にジグザグに折り返して信号線層とグ
ランド層を表裏逆転させて畳み込み構成するものであ
り、これにより、信号線層を形成する信号線はグランド
層によりシールドされて信号線同志が直接に対向するこ
とはなく、信号線間の静電的結合をなくして浮遊容量を
発生することはない。従って、この静電的結合の結果で
ある不定の浮遊容量に起因して、信号線とグランド層の
間の分布容量を設計通りにすることができず、電気長が
設計上の電気長と比較して短い方にずれるという不都合
は解消され、必要とされる設計上の電気長或は特性イン
ピーダンスを有する分布定数フィルタ線路、分布定数遅
延線路、一般に分布定数線路を容易に得ることができ
る。
As described above, the distributed constant line of the present invention is
A flexible printed circuit consisting of two layers, a signal line layer and a ground layer, is folded back in a zigzag at regular intervals, and the signal line layer and the ground layer are turned upside down to form a convolution structure. The signal lines forming the layers are shielded by the ground layer, the signal lines do not directly face each other, and the stray capacitance is not generated by eliminating the electrostatic coupling between the signal lines. Therefore, due to the indefinite stray capacitance that is the result of this electrostatic coupling, the distributed capacitance between the signal line and the ground layer cannot be made as designed, and the electrical length is compared with the designed electrical length. Then, the inconvenience of being shifted to the shorter side is solved, and a distributed constant filter line, a distributed constant delay line, and generally a distributed constant line having a required designed electrical length or characteristic impedance can be easily obtained.

【0020】[0020]

【発明の効果】以上の通りであって、この発明に依れ
ば、信号線層とグランド層の2層より成る可撓性プリン
ト回路を一定の長さ毎にジグザグに折り返して信号線層
とグランド層を表裏逆転させて畳み込み構成して対向す
る信号線間をグランド層によりシールドすることによ
り、電気長の長い小容積内に収容することができる分布
定数線路を設計通りに構成することができる。
As described above, according to the present invention, a flexible printed circuit including two layers of a signal line layer and a ground layer is zigzag-folded at regular intervals to form a signal line layer. It is possible to construct a distributed constant line that can be accommodated in a small volume with a long electrical length as designed by inverting the ground layer so that it is convoluted so that the opposing signal lines are shielded by the ground layer. .

【図面の簡単な説明】[Brief description of drawings]

【図1】 分布定数線路の実施例を説明する図であり、
図1(a)は表面図、図1(b)は図1(a)のA−A
線に沿った断面を示す図、図1(c)は裏面図である。
FIG. 1 is a diagram illustrating an example of a distributed constant line,
1 (a) is a front view, and FIG. 1 (b) is A-A in FIG. 1 (a).
The figure which shows the cross section along a line, FIG.1 (c) is a back view.

【図2】 図1に示される線路の断面を示す図である。FIG. 2 is a diagram showing a cross section of the line shown in FIG.

【図3】 図2の線路の斜視図である。FIG. 3 is a perspective view of the line of FIG.

【図4】 分布定数線路の従来例を説明する図であり、
図4(a)は表面図、図4(b)は図4(a)のA−A
線に沿った断面を示す図、図4(c)は裏面図である。
FIG. 4 is a diagram illustrating a conventional example of a distributed constant line,
4 (a) is a front view, and FIG. 4 (b) is A-A in FIG. 4 (a).
The figure which shows the cross section along a line, FIG.4 (c) is a back view.

【図5】 図4に示される分布定数線路の断面を示す図
である。
5 is a diagram showing a cross section of the distributed constant line shown in FIG.

【符号の説明】[Explanation of symbols]

1 信号線層 11 信号線 2 グランド層 2a 表のグランド層 2b 裏のグランド層 6 絶縁層 1 signal line layer 11 signal line 2 ground layer 2a front ground layer 2b back ground layer 6 insulating layer

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 信号線を形成した信号線層とグランド層
の2層より成る可撓性プリント回路を一定の長さ毎にジ
グザグに折り返して信号線層とグランド層を表裏逆転さ
せて畳み込み構成したことを特徴とする分布定数伝送線
路。
1. A flexible printed circuit comprising two layers of a signal line layer having a signal line and a ground layer is folded back in a zigzag at a constant length so that the signal line layer and the ground layer are turned upside down. A distributed constant transmission line characterized by the above.
【請求項2】 請求項1に記載される分布定数伝送線路
において、 可撓性プリント回路は絶縁層の表裏両面に信号線層とグ
ランド層を形成したものである、 ことを特徴とする分布定数伝送線路。
2. The distributed constant transmission line according to claim 1, wherein the flexible printed circuit has a signal line layer and a ground layer formed on both front and back surfaces of an insulating layer. Transmission line.
【請求項3】 請求項2に記載される分布定数伝送線路
において、 信号線層とグランド層とを絶縁層の表裏両面に一定の長
さ毎に交互に形成し、互に隣接する表裏の信号線同志を
電気的に接続すると共に互に隣接する表裏のグランド層
同志を電気的に接続する、 ことを特徴とする分布定数伝送線路。
3. The distributed constant transmission line according to claim 2, wherein the signal line layer and the ground layer are alternately formed on both front and back surfaces of the insulating layer at regular intervals, and signals on the front and back surfaces adjacent to each other are formed. A distributed constant transmission line characterized in that the lines are electrically connected to each other and the ground layers on the front and back sides adjacent to each other are electrically connected to each other.
【請求項4】 信号線を形成した信号線層とグランド層
の2層より成る可撓性プリント回路を一定の長さ毎にジ
グザグに折り返して信号線層とグランド層を表裏逆転さ
せて畳み込み構成したことを特徴とする分布定数フィル
タ線路。
4. A convoluted structure in which a flexible printed circuit including two layers of a signal line formed with a signal line and a ground layer is folded back in a zigzag at regular intervals so that the signal line layer and the ground layer are turned upside down. A distributed constant filter line characterized by the above.
【請求項5】 請求項4に記載される分布定数フィルタ
線路において、 可撓性プリント回路は絶縁層の表裏両面に信号線層とグ
ランド層を形成したものである、 ことを特徴とする分布定数フィルタ線路。
5. The distributed constant filter line according to claim 4, wherein the flexible printed circuit has a signal line layer and a ground layer formed on both front and back surfaces of an insulating layer. Filter track.
【請求項6】 請求項5に記載される分布定数フィルタ
線路において、 信号線層とグランド層とを絶縁層の表裏両面に一定の長
さ毎に交互に形成し、互に隣接する表裏の信号線同志を
電気的に接続すると共に互に隣接する表裏のグランド層
同志を電気的に接続する、 ことを特徴とする分布定数フィルタ線路。
6. The distributed constant filter line according to claim 5, wherein the signal line layer and the ground layer are alternately formed on both the front and back surfaces of the insulating layer at regular intervals, and signals on the front and back surfaces adjacent to each other are formed. A distributed constant filter line, characterized in that the lines are electrically connected to each other and the ground layers adjacent to each other are electrically connected to each other.
【請求項7】 信号線を形成した信号線層とグランド層
の2層より成る可撓性プリント回路を一定の長さ毎にジ
グザグに折り返して信号線層とグランド層を表裏逆転さ
せて畳み込み構成したことを特徴とする分布定数遅延線
路。
7. A convoluted structure in which a flexible printed circuit including two layers of a signal line formed with a signal line and a ground layer is folded back in a zigzag at a constant length so that the signal line layer and the ground layer are turned upside down. A distributed constant delay line characterized by the above.
【請求項8】 請求項7に記載される分布定数フィルタ
線路において、 可撓性プリント回路は絶縁層の表裏両面に信号線層とグ
ランド層を形成したものである、 ことを特徴とする分布定数遅延線路。
8. The distributed constant filter line according to claim 7, wherein the flexible printed circuit has a signal line layer and a ground layer formed on both front and back surfaces of an insulating layer. Delay line.
【請求項9】 請求項8に記載される分布定数フィルタ
線路において、 信号線層とグランド層とを絶縁層の表裏両面に一定の長
さ毎に交互に形成し、互に隣接する表裏の信号線同志を
電気的に接続すると共に互に隣接する表裏のグランド層
同志を電気的に接続する、 ことを特徴とする分布定数遅延線路。
9. The distributed constant filter line according to claim 8, wherein a signal line layer and a ground layer are alternately formed on both front and back surfaces of the insulating layer at regular intervals, and signals on the front and back surfaces adjacent to each other are formed. A distributed constant delay line, characterized in that the lines are electrically connected to each other and the ground layers on the front and back sides adjacent to each other are electrically connected to each other.
JP08240295A 1995-04-07 1995-04-07 Distributed parameter line Expired - Fee Related JP3213736B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP08240295A JP3213736B2 (en) 1995-04-07 1995-04-07 Distributed parameter line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP08240295A JP3213736B2 (en) 1995-04-07 1995-04-07 Distributed parameter line

Publications (2)

Publication Number Publication Date
JPH08279706A true JPH08279706A (en) 1996-10-22
JP3213736B2 JP3213736B2 (en) 2001-10-02

Family

ID=13773609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP08240295A Expired - Fee Related JP3213736B2 (en) 1995-04-07 1995-04-07 Distributed parameter line

Country Status (1)

Country Link
JP (1) JP3213736B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100521260B1 (en) * 1998-06-22 2005-12-29 삼성전자주식회사 Circuit connection device and flexible printed circuit board comprising the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102133452B1 (en) 2013-12-11 2020-07-14 삼성디스플레이 주식회사 Display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100521260B1 (en) * 1998-06-22 2005-12-29 삼성전자주식회사 Circuit connection device and flexible printed circuit board comprising the same

Also Published As

Publication number Publication date
JP3213736B2 (en) 2001-10-02

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