JPH08279539A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE: To detect easily whether all probes for power supply (GND) come into contact with a power pad part or not. CONSTITUTION: A power pad part 37 has a first part 31 and a second part 33, which are insulated from each other, the part 31 is connected with a power wiring 26 and the part 33 is connected with a detection circuit 36 in such a way that it does not come into contact with the part 31 and the wiring 26. A power supply probe comes into contact with the pad part 37 in a region 71. By pressing the power supply probe on the pad part 37, the probe comes into contact with either of the parts 31 and 33. Accordingly, whether a power supply is supplied from a power unit to the wiring 26 via the probe or not can be detected by investigating whether the power supply is supplied from the power unit to the part 33 by the circuit 36.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit having a built-in circuit for detecting whether or not a power source from a test device is applied to the semiconductor integrated circuit when testing the semiconductor integrated circuit in a wafer state. .

[0002]

2. Description of the Related Art FIG. 10 is a conceptual diagram showing an outline of a test of a conventional semiconductor integrated circuit. The semiconductor integrated circuit 18 is tested in a wafer state.

The semiconductor test apparatus 1 includes a power supply unit 2 and a GN.
The D unit 3 and the signal unit 4 are provided. Further, the interface board 5 includes a power supply layer 6, a GND layer 7, and signal layers 8, 9, 10. The power supply layer 6 is the power supply unit 2
In addition, the GND layer 7 is connected to the GND unit 3 and the signal layers 8, 9,
10 are connected to the signal unit 4, respectively.

The power supply probe needles 11 and 12 are connected in common by a power supply layer 6, and the GND probe needles 13 and 14 are connected in common by a GND layer 7. This is to reduce the output low impedance of the power supply unit 2 and the GND unit 3. In addition, the signal probe needles 15 and 1
Reference numerals 6 and 17 are connected to the signal layers 8, 9 and 10, respectively. The probe needles 11 to 17 are usually fixed to the interface board 5 with resin, and in general, both are referred to as a probe card.

The semiconductor integrated circuit 18 in the wafer state is
Power supply pads 19 and 20, GND pads 21 and 22,
Signal pads 23, 24, 25, power supply wiring 26, GND
The wiring 27 and the signal wirings 28, 29 and 30 are provided. A plurality of pads for the power supply (GND) of the semiconductor integrated circuit (in particular, the semiconductor integrated circuit for logic) are usually provided in this way. The power supply pads 19 and 20 are connected to the power supply wiring 26 by GND.
The pads 21 and 22 are commonly connected to the GND wiring 27, respectively. In addition, the signal pads 23, 24,
25 is connected to the signal wirings 28, 29 and 30, respectively.

In the test, a probe needle is brought into contact with each pad of the semiconductor integrated circuit 18 to supply power (GND) and a signal. Power supply probe needles 11 and 12 are pressed against the power supply pads 19 and 20, respectively,
GND probe needles 1 are attached to the pads 21 and 22, respectively.
3, 14 are pressed, and the signal pads 23, 24, 2
Signal probe needles 15, 16 and 17 are respectively pressed against 5.

All power source (GND) probe needles 11
To 14 are not in contact with the power supply (GND) pads 19 to 22 of the semiconductor integrated circuit 18, respectively, between the power supply wiring 26 and the power supply unit 2, and between the GND wiring 27 and the GND.
The current path between the units 3 is reduced. Therefore, the resistance generated in the probe needles 11 to 14 for the power supply (GND) becomes large, and the phenomenon in which the voltage drop (so-called “lifting”) here becomes large occurs. When this phenomenon occurs, the potential set by the power supply (GND) unit 2 (3) is not correctly transmitted to the power supply (GND) pads 19 to 22.

[0008]

If only the power supply probe needle 11 is connected to the power supply unit 2, the contact / non-contact between the power supply probe needle 11 and the power supply pad 19 can be easily detected. . It can be detected because the current flows when the current is drawn from the power supply unit 2 if it is in contact, and the current does not flow if it is not in contact. Similarly, when only the GND probe needle 13 is connected to the GND unit 3, the GND probe needle 13 and the GND probe needle 13 are connected to the GND unit 3.
The contact / non-contact with the pad 21 can be easily detected.

However, the ordinary semiconductor integrated circuit 18 is provided with a plurality of power source (GND) pads, and accordingly, a plurality of probe needles corresponding thereto are also provided. As described above, the probe needles are connected in common by the power supply layer 6 and the GND layer 7 in order to reduce the impedance of the power supply and GND, so that at least one of them is in contact with the pad. , Power supply (GND) unit 2
The current flows when the current is drawn from (3). Therefore, according to the conventional technique, it is impossible for the semiconductor test apparatus 1 to detect whether or not all the power supply (GND) probe needles 11 to 14 are in contact with the power supply (GND) pads 19 to 22, respectively. There was a point.

The present invention has been made to solve the above problems, and in a semiconductor integrated circuit having a plurality of power supply (GND) pads, all the power supply (GND) probes corresponding thereto are provided. It is an object of the present invention to provide a technique capable of easily detecting whether or not it is in contact with a power supply pad section.

[0011]

[Means for Solving the Problems] Claim 1 of the present invention
According to the present invention, a plurality of power supply pad portions for receiving a predetermined power source are provided, and power supply probes extending in predetermined directions respectively corresponding to the power supply pad portions are provided in predetermined areas of the power supply pad portions. This is a semiconductor integrated circuit in which the predetermined power source is supplied to the power source wiring to be tested by being pressed simultaneously. Further, a conduction detecting circuit having an output end and an input end provided corresponding to the power supply pad portion is further provided, and each power supply pad portion has a first portion and a second portion which are insulated from each other. , The first portion and the second portion each include a first overlapping region and a second overlapping region overlapping the predetermined region, the first portion being commonly connected to the power supply wiring, The second part is connected to the corresponding input end, and the output end outputs a signal for detecting whether or not the second part is in contact with the power supply probe.

According to claim 2 of the present invention,
The semiconductor integrated circuit according to claim 1, wherein the first portion and the second portion have saw-tooth shapes that mesh with each other.

According to claim 3 of the present invention,
2. The semiconductor integrated circuit according to claim 1, wherein the first portion has a concave shape, the second portion includes a punch-shaped portion that is inserted into the first portion, and a direction in which the punch-shaped portion extends. Corresponds to the predetermined direction corresponding to each of the power supply pad portions.

According to claim 4 of the present invention,
The semiconductor integrated circuit according to claim 1, wherein the first portion has a hole having a diameter smaller than that of the predetermined region,
The part is surrounded by the hole.

According to claim 5 of the present invention,
2. The semiconductor integrated circuit according to claim 1, wherein the conduction detection circuit further includes a logic element that operates in binary logic, the logic element receiving the voltage applied to the input terminal as a logic signal, A logical product of logical signals is output to the output terminal.

According to claim 6 of the present invention,
6. The semiconductor integrated circuit according to claim 5, wherein the conduction detection circuit further has a resistor connected between the input terminal and another power supply that provides a logic complementary to the predetermined power supply.

According to claim 7 of the present invention,
The semiconductor integrated circuit according to claim 6, wherein the conduction detection circuit further includes a switch provided between the resistor and the other power supply.

According to claim 8 of the present invention,
The semiconductor integrated circuit according to claim 1, wherein the conduction detection circuit further includes a flip-flop provided in series corresponding to the input end, and each of the flip-flops is connected to the corresponding input end. The connected Q input terminal, a T input terminal to which a clock is applied, and a Q output terminal that outputs a value applied to the D input terminal of itself according to the clock; The output end is connected to the output end.

In each claim, "power supply" is a concept including "GND" as well as "power supply" in the embodiments.

[0020]

In the semiconductor integrated circuit according to claim 1 of the present invention, since the power supply probe is pressed against a predetermined region of the power supply pad portion, it is determined whether the power supply probe is in contact with the first overlap region. It can be detected by the presence or absence of contact between the two overlapping areas. The second overlapping region is included in the second portion, and the second portion is connected to the input end of the continuity detection circuit. Therefore, the signal supplied from the output end of the continuity detection circuit causes the power supply probe to move to the power supply pad. It is possible to determine whether or not the part is in contact.

In the semiconductor integrated circuit according to claim 2 of the present invention, the length at which the first portion and the second portion face each other becomes large.

In the semiconductor integrated circuit according to claim 3 of the present invention, the predetermined region is likely to be displaced in the direction in which the power supply probe is extended, but since the punch portion is extended in that direction. It is easy to secure the first overlapping area and the second overlapping area even with respect to the shift.

In the semiconductor integrated circuit according to claim 4 of the present invention, the size of the first overlapping region is ensured.

In the semiconductor integrated circuit according to claim 5 of the present invention, a case where a predetermined power source is applied to all the second parts and a second case where even one of the second parts is not supplied with the predetermined power source
The value of the signal given by the output terminal is different from when the portion exists.

In the semiconductor integrated circuit according to claim 6 of the present invention, the input end to which the second portion of the power supply pad portion, to which the power supply probe is not pressed, is connected, is connected to another input via a resistor. Power is supplied.

In the semiconductor integrated circuit according to the seventh aspect of the present invention, the switch is turned on only when the presence / absence of contact between the power supply probe and the power supply pad portion is detected.

In the semiconductor integrated circuit according to the eighth aspect of the present invention, first, the power supply probe is pressed against the power supply pad portion, and the presence or absence of contact is stored in the flip-flop. After that, the signals of the flip-flops are sequentially propagated by the clock.

[0028]

【Example】

Example 1 FIG. 1 is a schematic diagram showing Example 1. Power supply pad portions 37 and 38 are provided instead of the power supply pads 19 and 20 in the prior art. The power pad portion 37 has a first portion 31 and a second portion 33 which are insulated from each other, and the power pad portion 38 has a first portion 32 which is insulated from each other.
And a second portion 34. And the first part 31,
32 is commonly connected to the power supply wiring 26. on the other hand,
The second portions 33 and 34 are connected to the detection circuit 36 so as not to contact the first portions 31 and 32 and the power supply wiring 26.

For example, the power supply pad portions 37, 38 and the power supply wiring 26 are formed by aluminum wiring in the upper layer. The lower aluminum wiring is connected to the detection circuit 36,
The portions 33 and 34 are through holes 35a and 35b, respectively.
Is connected to the aluminum wiring in the lower layer via. In FIG. 1, the lower aluminum wiring is hatched.

In FIG. 1, regions 71 and 72 indicate portions where the power source probe needles 11 and 12 are in contact. That is, when the power supply probe needle 11 is pressed against the power supply pad portion 37, it makes contact with both the first portion 31 and the second portion 33. That is, the area 71 includes the first portion 31 and the second portion 33, and the first overlapping area 71a and the second portion 33, respectively.
The overlapping area 71b is shared. Similarly, when the power supply probe needle 12 is pressed against the power supply pad portion 38, the power supply probe needle 12 comes into contact with both the first portion 32 and the second portion 34, and the area 72 is in the first portion 32 and the second portion 34.
And the first overlapping area 72a and the second overlapping area 7 respectively.
2b will be shared.

The power supply probe needle 11 is connected to the power supply pad portion 37.
If it is pressed against the first portion 31 and is in contact with the first portion 31, it is also in contact with the second portion 33. Therefore, whether or not the power is being supplied from the power supply unit 2 to the power supply wiring 26 via the power supply probe needle 11 is the second.
This can be detected by checking whether or not the power is supplied from the power supply unit 2 to the portion 33. Similarly, the power supply unit 2 is passed through the power supply probe needle 12.
Whether or not the power is being supplied to the power supply wiring 26 from can be detected by checking whether or not the power is supplied from the power supply unit 2 to the second portion 34. Then, the detection circuit 36 can check whether or not power is supplied to the second portions 33 and 34.

FIG. 2 is a circuit diagram showing the configuration of the detection circuit 36 and the connection relation of the periphery thereof. The detection circuit 36 includes a 2-input AND circuit and resistors R1 and R2. AN
The D circuit inputs the potentials given to the second portions 33 and 34, treats them as logic signals, and outputs the logical product to the detection circuit output pad 39.

When both the power source probe needles 11 and 12 are pressed against the regions 71 and 72, respectively, the potential corresponding to the logic "1" is applied to both the second portions 33 and 34. Therefore, a logic "1" is given to the detection circuit output pad 39.

However, if any one of the power source probe needles 11 and 12 is not in contact, for example, the power source probe needle 11 is in contact with the power source pad portion 37, and the power source probe needle 12 is in the power source. When the pad portion 38 is not in contact, the detection circuit output pad 39 is given a logic "0". This is because power is supplied to the second portion 33, but power is not supplied to the second portion 34.

Here, the resistors R1 and R2 have a function of avoiding floating and giving a logic "0" when power is not supplied to the second portions 33 and 34, respectively.
Therefore, the resistor R1 is provided between the second portion 33 and GND,
The resistor R2 is connected between the second portion 34 and GND.

Thus, the plurality of power source probe needles 1
If even one of the power supply pads 1 and 12 is not in contact with the power supply pad portions 37 and 38, a logic "0" is given to the detection circuit output pad 39. In other words, the logic "1" is given to the detection circuit output pad 39 only when all of the power supply probe needles are in contact with the power supply pad portion, and this case and the other case can be easily detected.

In the above description, the power supply probe needle 1
Although only 1 and 12 have been described, contact / non-contact of the GND probe needles 13 and 14 can be detected in the same manner. However, in this case, the detection circuit 36 needs to include an OR circuit in place of the AND circuit, and to commonly supply the potential corresponding to the logic "1" to one end of each of the resistors R1 and R2.

The problem in the prior art is the supply of the power supply (GND), and the supply from the signal unit 4 is not a problem. Therefore, it is not necessary to divide the signal pads 23, 24, 25 into the first portion and the second portion. These are signal wiring 28,
29 and 30, and the signal line 28 is connected to an internal logic as shown in FIG. 1, for example. At this time, in order to avoid contact with the power supply wiring 26, the signal wiring 28 can be made of aluminum wiring in the lower layer. Signal probe 1
When 5 is pressed against the signal pad 23, the two come into contact with each other in the area 73.

Example 2 Example 2 provides a modification of the power pad section 37. In the configuration of the power supply pad portion 37 shown in FIG. 1, the region 71 is displaced due to the positional accuracy of the power supply probe needle 11 and the needle pressure at the time of contact, and the region 71 comes into contact with the second portion 33. There is a possibility that they will not touch. That is, there remains a problem that the first overlapping area 71a exists but the second overlapping area 71b does not exist. The second embodiment also solves this problem.

FIG. 3 is a plan view showing the structure of the second embodiment. The first portion 31 and the second portion 33 that form the power supply pad portion 37 each have a comb shape (sawtooth shape) and are arranged so as to mesh with each other. With this structure, the first portion 31
And the opposing length of the second portion 33 is increased.

Therefore, even if the power supply probe needle 11 contacts the power supply pad portion 37 in any of the regions 71 ₁ , 71 ₂ and 71 ₃ , it contacts both the first portion 31 and the second portion 33. Therefore, the same effect as that of the first embodiment can be obtained even if the position accuracy of the region 71 in contact with the power supply probe needle 11 is not high.

Of course, the second embodiment can be applied to the power supply pad portion 38 and also to the GND pad portion with which the GND probe needle comes into contact.

Third Embodiment: The third embodiment also provides a modification of the power supply pad portion 37. Although the structure of the power supply pad portion 37 shown in FIG. 3 increases the degree of freedom of the region 71, even if the power supply pad portion 37 is located near the center of the power supply pad portion 37, as in the region 71 ₃ , the first portion 31 is not formed. The second portion 33 may be overlapped more than the second portion 33.

In such a case, the effective current path becomes narrow when the power is supplied to the power supply wiring 26. Therefore, the resistance component between the power supply probe needle 11 and the power supply wiring 26 becomes larger than in the conventional case, and the voltage drop becomes large. With this, the potential set in the power supply unit 2 is not correctly transmitted to the power supply wiring 26. The third embodiment solves this problem.

FIG. 4 is a plan view showing the structure of the third embodiment. The first portion 31 forming the power supply pad portion 37 has a hole 31.
c, and the second portion 33 is provided surrounded by the hole 31. The diameter of the hole 31c is designed to be smaller than the area 71. Therefore, if the power supply probe 11 need only contact in the vicinity of the holes 31c, even if the center as regions 71 ₄ coincides with the center of the second portion 33, even if they do not match as area 71 ₅ The power supply probe needle 11 is in contact with the first portion 31 a lot. Therefore, by making the size of the second portion 33 sufficiently smaller than that of the region 71, the current path from the power supply probe needle 11 to the power supply wiring 26 is comparable to the conventional technique. Therefore, the potential set by the power supply unit 2 can be correctly transmitted to the power supply wiring 26.

Fourth Embodiment: The fourth embodiment also provides a modification of the power supply pad portion 37. FIG. 5 is a plan view showing the outline of the background of the fourth embodiment. Power supply probe needle, GND probe needle,
The signal probe needles are collectively referred to as probe needles 42. The power supply pad, the GND pad, and the signal pad are collectively referred to as a pad 44.

Generally, since the interface board 5 is fixed with resin, the diameter of the root of the probe needle 42 is larger than the size of the pad 44. Therefore, it is impossible to arrange all the probe needles 42 corresponding to the plurality of pads 44 that are continuously arranged in parallel with each other in the vertical direction of FIG.

Therefore, when a plurality of pads 44 are continuously arranged as shown in FIG. 5, the probe needle 42 with respect to the pad 44 near the center is generally arranged substantially parallel to the vertical direction of FIG. It is fixed to the interface board 5 with resin. Then, the probe needle 42 is fixed while being inclined with respect to the vertical direction of FIG. 5 as it goes away from the center. For example, the probe needle for the leftmost pad 44 is shown in FIG.
Is fixed to the interface board with resin along the direction from the upper left to the lower right (the probe needle 42 with respect to the pad at the right end is inclined in the opposite direction).

When the probe needle 42 arranged as described above is brought into contact with the pad 44, the probe needle 42 arranged substantially parallel to the vertical direction in FIG. Then, the contact portion moves downward from the area 78 to the area 79. Further, the probe needle 42 arranged along the direction from the upper left to the lower right in FIG.
The contact portion moves to 7 in the lower right direction. That is, depending on the direction in which the probe needle 42 is arranged, the pad 44
The moving direction of the area in contact with is different. These states are shown enlarged in FIG. The thick arrow indicates the moving direction of the region where the probe needle 42 contacts the pad 44.

6 and 7 are plan views showing the structure of the fourth embodiment. In each of FIG. 6 and FIG. 7, the first portion 31 forming the power supply pad portion 37 has concave molds 31d and 31e. The concave molds 31d and 31e are along the direction from the area 76 to the area 77 and the direction from the area 78 to the area 79, respectively. And these concave molds 31d, 3
The second part 33 having a pestle shape is inserted into 1e.

The power supply pad portion 37 having the structure shown in FIGS. 6 and 7 is applied to the leftmost and central pads 44 in FIG. 5, respectively. As a result, the second portion 33 can be arranged so as to overlap in parallel with the movement of the region where the probe needle 42 contacts.

Therefore, as shown in FIGS. 6 and 7, even if the probe needle 42 moves in the direction from the area 76 to the area 77 or from the area 78 to the area 79, the power source probe needle 42 is always present. Contact / non-contact of the second part 33
Can be detected by. Further, by making the size of the second portion 33 sufficiently smaller than the area of the regions 76 to 79 in contact with the probe needle 42, the current path from the contact portion of the probe needle 42 to the power supply wiring 26 is made to be a conventional pad. Even if they are compared, they can be comparable.

Embodiment 5: Embodiment 5 provides a modification of the detection circuit 36. In the configuration shown in FIG. 2, the detection circuit 36
, The second portions 33 and 34 are connected to the resistors R1 and R, respectively.
It was grounded through 2. Therefore, the second part 33,3
When the logic state of 4 becomes "1", these resistors R
A current flows through 1 and R2. Power supply probe needles 11, 12
If the power supply pads 37 and 38 are correctly contacted with, the current will continue to flow from the power supply unit 2 to the ground via the resistors R1 and R2.

Such a current has a problem that it hinders the measurement of a minute standby current which is an original function of the semiconductor integrated circuit, or unnecessarily increases the power consumption of the semiconductor integrated circuit. The fifth embodiment can solve such a problem.

FIG. 8 is a circuit diagram showing the structure of the detection circuit 36 according to the fifth embodiment. The configuration shown in FIG.
Switches 40a and 40b are added to the configuration shown in FIG. The switches 40a and 40b are provided between the resistors R1 and R2 and the ground, respectively.

These switches 40a and 40b are turned on only when detecting the contact of the probe needle, and the resistors R1 and R2 are grounded to obtain the same effect as that of the first embodiment. In other tests or in actual use, the switches 40a and 40b are turned off and the resistors R1 and
It is possible to separate R2 from ground and prevent the standby current from being measured, and avoid unnecessary power consumption.

Embodiment 6 Embodiment 6 also provides a modification of the detection circuit 36. In the configuration shown in FIG. 2, the second portion 33,
The detection circuit output pad 39 outputs "0" regardless of which of the 34 is in the logical state "0". Therefore, it is not possible to determine which of the power supply probe needles 11 and 12 is non-contact. The sixth embodiment can solve such a problem as well.

FIG. 9 is a circuit diagram showing the structure of the detection circuit 36 according to the sixth embodiment. The second portions 33 and 34 are grounded via the resistors R1 and R2, respectively. Furthermore, the second
The parts 33 and 34 are flip-flops 41 and 42, respectively.
It is connected to the D input terminal of. Flip-flop 41,
42 are sequentially connected in series. That is, the Q output terminal of the flip-flop 41 is connected to the D input terminal of the flip-flop 42. The Q output terminal of the flip-flop 42 is connected to the detection circuit output pad 39. The trigger clock CLK is commonly applied to the T input terminals of the flip-flops 41 and 42.

First, the power supply probes 11 and 12 are pressed against the power supply pad portions 37 and 38, and the presence or absence of contact is checked by the second portion 3.
Flip-flops 41 and 42, respectively
To memorize. After that, the signals of the flip-flops 41 and 42 are sequentially propagated to the detection circuit output pad 39 by the trigger clock CLK. During this propagation, the resistance R
Since switches 1 and R2 are unnecessary, the switch 4 is used as in the fifth embodiment.
0a and 40b may be provided.

Since the contact / non-contact of the power supply probes 12 and 11 can be sequentially detected on the detection circuit output pad 39, the contact / non-contact can be detected separately.

[0061]

According to the semiconductor integrated circuit of the first aspect of the present invention, it is possible to easily determine whether or not the plurality of power supply probes are pressed against the corresponding power supply pad portions.

According to the semiconductor integrated circuit of the second and third aspects of the present invention, the degree of freedom of the predetermined region is increased, and the effect of the first aspect can be obtained even if the positioning of the power supply probe is not accurate. Obtainable.

According to the semiconductor integrated circuit of the fourth aspect of the present invention, the effect of the first aspect can be obtained by increasing the degree of freedom of a predetermined region without narrowing the current path to the power supply wiring. .

According to the semiconductor integrated circuit of the fifth aspect of the present invention, even if there is at least one power supply pad portion to which the power supply probe is not pressed, it can be detected.

According to the semiconductor integrated circuit of the sixth aspect of the present invention, the floating of the input terminal is prevented,
It is possible to correctly detect the presence / absence of contact between the power supply probe and the power supply pad section by using the signal provided by the output terminal.

According to the semiconductor integrated circuit of the seventh aspect of the present invention, the standby current can be measured by turning off the switch when the actual use condition or other tests are performed, and unnecessary power consumption is reduced. Can be suppressed.

According to the semiconductor integrated circuit of the eighth aspect of the present invention, the presence / absence of contact between the power supply probe and the power supply pad section is detected for each power supply pad section.

[Brief description of drawings]

FIG. 1 is a schematic diagram showing a first embodiment.

FIG. 2 is a circuit diagram showing a first embodiment.

FIG. 3 is a plan view showing the structure of the second embodiment.

FIG. 4 is a plan view showing the structure of the third embodiment.

FIG. 5 is a plan view showing the outline of the background of Example 4;

6 is a plan view showing the structure of Example 4. FIG.

FIG. 7 is a plan view showing the structure of the fourth embodiment.

FIG. 8 is a circuit diagram showing a configuration of a fifth embodiment.

FIG. 9 is a circuit diagram showing a configuration of a sixth embodiment.

FIG. 10 is a conceptual diagram showing an outline of a conventional semiconductor integrated circuit test.

[Explanation of symbols]

26 power wiring, 31, 32 first part, 31c hole,
31d, 31e concave type, 33, 34 second portion, 37,
38 power supply pad section, 40a, 40b switch, 4
1,42 flip-flops, 71 to 79 areas, 71
a, 72a First overlapping area, 71b, 72b Second overlapping area, R1, R2 resistors, CLK Trigger clock.

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] April 24, 1995

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 1

[Correction method] Change

[Correction content]

FIG.

Claims (8)

[Claims] 1. A plurality of power supply pad portions for receiving a predetermined power supply, each of which has a power supply probe extending in a predetermined direction corresponding to the power supply pad portion in a predetermined region of the power supply pad portion. A semiconductor integrated circuit in which a predetermined power source is supplied to a power source wiring to be tested by being pressed simultaneously, and a conduction having an output terminal and an input terminal provided corresponding to the power source pad section. A detection circuit is further provided, each of the power supply pad portions has a first portion and a second portion which are insulated from each other, and each of the first portion and the second portion overlaps with the predetermined region. A first overlapping region and a second overlapping region, the first portion is commonly connected to the power supply line, each second portion is connected to the corresponding input end, and the output end is the second portion. And the power supply probe A semiconductor integrated circuit that outputs a signal that detects the presence or absence of contact with a substrate. 2. The semiconductor integrated circuit according to claim 1, wherein the first portion and the second portion have a saw-tooth shape which meshes with each other. 3. The first portion has a concave shape, the second portion includes a punch-shaped portion inserted into the first portion, and a direction in which the punch-shaped portion extends extends in each of the power pads. The semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit corresponds to the predetermined direction corresponding to a part. 4. The semiconductor integrated circuit according to claim 1, wherein the first portion has a hole having a diameter smaller than that of the predetermined region, and the second portion is surrounded by the hole. 5. The conduction detection circuit further includes a logic element that operates in binary logic, the logic element receiving a voltage applied to the input terminal as a logic signal, and performing a logical product of the logic signals. The semiconductor integrated circuit according to claim 1, which outputs to an output terminal. 6. The semiconductor integrated circuit according to claim 5, wherein the continuity detecting circuit further includes a resistor connected between the input terminal and another power supply that provides a logic complementary to the predetermined power supply. 7. The semiconductor integrated circuit according to claim 6, wherein the conduction detection circuit further includes a switch provided between the resistor and the other power supply. 8. The conduction detection circuit further includes a flip-flop provided in series corresponding to the input end, each of the flip-flops having a D input end connected to the corresponding input end. A T input terminal to which a clock is applied, and a Q output terminal that outputs a value given to the D input terminal of itself according to the clock, wherein the Q output terminal of the final stage of the flip-flop is connected to the output terminal. The semiconductor integrated circuit according to claim 1, which is connected.