JPH08274543A - Piezoelectric oscillator - Google Patents

Piezoelectric oscillator

Info

Publication number
JPH08274543A
JPH08274543A JP9800495A JP9800495A JPH08274543A JP H08274543 A JPH08274543 A JP H08274543A JP 9800495 A JP9800495 A JP 9800495A JP 9800495 A JP9800495 A JP 9800495A JP H08274543 A JPH08274543 A JP H08274543A
Authority
JP
Japan
Prior art keywords
circuit
buffer
piezoelectric oscillator
oscillator
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9800495A
Other languages
Japanese (ja)
Inventor
Yasuo Koyaizu
泰夫 小柳津
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Crystal Device Corp
Original Assignee
Kyocera Crystal Device Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Crystal Device Corp filed Critical Kyocera Crystal Device Corp
Priority to JP9800495A priority Critical patent/JPH08274543A/en
Publication of JPH08274543A publication Critical patent/JPH08274543A/en
Pending legal-status Critical Current

Links

Landscapes

  • Oscillators With Electromechanical Resonators (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

PURPOSE: To make a piezoelectric oscillator compact and inexpensive by providing an output corresponding to the current consumption reduction of a circuit, onto which the piezoelectric oscillator is mounted, by connecting an oscillation circuit and a buffer circuit equipped with an input protection circuit through a coupling capacitor. CONSTITUTION: An oscillation circuit 1 and a buffer circuit 2 are connected while inserting a coupling capacitor 9 between those circuits and inserting an input protection circuit 3 due to an input protection diode 10 inside the circuit 2. A feedback resistor 11 is parallelly connected to a buffer 5 inside the circuit 2, and the input operating point of the circuit 2 is biased near the intermediate point of a power source voltage. The output of the oscillation circuit 1 is inputted through the capacitor 9 to the circuit 3 inside the circuit 2, and a power supply voltage VDD2 of the buffer circuit is converted into the signal of a p-p value and inputted to buffers 5 and 6. The waveform of the signal inputted to the buffers 5 and 6 is shaped and that signal is outputted from the buffer 6. Thus, it is not necessary to use any level shifter circuit and the oscillator can be made compact and inexpensive.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、圧電振動子を用いた圧
電発振器に関するものであり、特に発振器内の発振回路
とバッファ回路との電源電圧が異なる発振器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a piezoelectric oscillator using a piezoelectric vibrator, and more particularly to an oscillator in which an oscillator circuit and a buffer circuit in the oscillator have different power supply voltages.

【0002】[0002]

【従来の技術】従来の圧電発振器においては、同一の電
源から供給される同一電圧により発振回路とバッファ回
路を動作させる回路、発振回路とバッファ回路とをレベ
ルシフター回路を介して接続し動作させる回路、圧電発
振器の消費電流の低減化のために電源−発振回路間に定
電圧回路を設けて発振回路に供給電圧より低い電圧を供
給し、発振回路とバッファ回路間を結合コンデンサを介
して結合し両回路を動作させる等の回路が用いられてい
る。
2. Description of the Related Art In a conventional piezoelectric oscillator, a circuit for operating an oscillation circuit and a buffer circuit by the same voltage supplied from the same power source, and a circuit for operating the oscillation circuit and the buffer circuit by connecting them through a level shifter circuit. In order to reduce the current consumption of the piezoelectric oscillator, a constant voltage circuit is provided between the power supply and the oscillator circuit to supply a voltage lower than the supply voltage to the oscillator circuit, and the oscillator circuit and the buffer circuit are coupled via a coupling capacitor. A circuit for operating both circuits is used.

【0003】[0003]

【発明が解決しようとする課題】しかし、圧電発振器の
小型化や、圧電発振器及び圧電発振器が実装される回路
基板の消費電流の低減化が更に進むにつれ、前記記載の
回路だけではなく、全く別の電源からの供給される電圧
により動作する圧電発振回路とバッファ回路を有する圧
電発振器が必要になった。特に圧電発振回路の電源電圧
がバッファ回路の電源電圧より高い場合の圧電発振器が
必要となり、このような場合の発振回路とバッファ回路
の接続では、発振回路の出力信号レベルがバッファ回路
の入力信号レベルより大きくなるため、結合コンデンサ
のみ挿入による発振回路とバッファ回路との接続はでき
ないという課題がある。
However, as miniaturization of the piezoelectric oscillator and reduction of the current consumption of the piezoelectric oscillator and the circuit board on which the piezoelectric oscillator is mounted are further advanced, not only the circuit described above but also a completely different circuit is realized. There is a need for a piezoelectric oscillator having a piezoelectric oscillation circuit and a buffer circuit that operate by a voltage supplied from the power supply of the. In particular, a piezoelectric oscillator is required when the power supply voltage of the piezoelectric oscillator circuit is higher than the power supply voltage of the buffer circuit.In such a case, when connecting the oscillator circuit and the buffer circuit, the output signal level of the oscillator circuit is the input signal level of the buffer circuit. Since the size becomes larger, there is a problem that the oscillation circuit and the buffer circuit cannot be connected by inserting only the coupling capacitor.

【0004】本発明は、前述した従来の課題を鑑みなさ
れたもので、その目的は、別個の電源より供給される発
振回路電源電圧VDD1 と、バッファ回路電源電圧VDD2
の関係がVDD1 >VDD2 の電圧値で動作する、発振回路
とバッファ回路からなる圧電発振器を得ることである。
The present invention has been made in view of the above-mentioned conventional problems, and its purpose is to provide an oscillation circuit power supply voltage V DD1 and a buffer circuit power supply voltage V DD2 which are supplied from separate power supplies.
Is to obtain a piezoelectric oscillator consisting of an oscillation circuit and a buffer circuit, which operates at a voltage value of V DD1 > V DD2 .

【0005】[0005]

【課題を解決するための手段】本発明では、別々の電源
電圧で動作する、発振回路と入力保護ダイオードによる
入力保護回路を備えたバッファ回路とを設けて、発振回
路の出力と入力保護回路との間に結合用コンデンサを入
れて接続する。バッファ回路には帰還抵抗を入れ、入力
電圧の安定化を図る。このバッファ回路に発振回路から
の出力を結合コンデンサ及び入力保護回路を通して入力
するために、直流分及び発振回路出力レベルとバッファ
回路入力レベルのレベル差分が遮断されることから、発
振回路とバッファ回路の電源電圧の違いは問題にならな
くなる。
According to the present invention, an oscillation circuit and a buffer circuit having an input protection circuit with an input protection diode, which operate at different power supply voltages, are provided, and an output of the oscillation circuit and an input protection circuit are provided. Insert a coupling capacitor between and connect. A feedback resistor is inserted in the buffer circuit to stabilize the input voltage. Since the output from the oscillation circuit is input to this buffer circuit through the coupling capacitor and the input protection circuit, the direct current component and the level difference between the oscillation circuit output level and the buffer circuit input level are cut off. The difference in power supply voltage does not matter.

【0006】これにより、圧電発振器の出力はバッファ
回路の出力となり、バッファ回路の電源電圧の値によっ
て振幅レベルを任意に可変できる。
As a result, the output of the piezoelectric oscillator becomes the output of the buffer circuit, and the amplitude level can be arbitrarily changed according to the value of the power supply voltage of the buffer circuit.

【0007】[0007]

【実施例】図1は本発明の具体的な実施例を示した回路
図である。図1の発振回路1において、インバータ4の
電源電圧VDD1 として+5[V]が印加されている。イ
ンバータ4の入力端子と出力端子間に帰還抵抗8と圧電
振動子7を並列に接続すると共に、圧電振動子7の両端
と接地間にコンデンサを挿入してある。又、インバータ
4の出力端子と帰還抵抗8との間にドレイン抵抗が接続
されているが、発振回路としては必須ではない。
1 is a circuit diagram showing a specific embodiment of the present invention. In the oscillator circuit 1 of FIG. 1, +5 [V] is applied as the power supply voltage V DD1 of the inverter 4. The feedback resistor 8 and the piezoelectric vibrator 7 are connected in parallel between the input terminal and the output terminal of the inverter 4, and a capacitor is inserted between both ends of the piezoelectric vibrator 7 and the ground. Further, although the drain resistance is connected between the output terminal of the inverter 4 and the feedback resistance 8, it is not essential for the oscillation circuit.

【0008】この電源電圧VDD1 が+5[V]で動作す
る発振回路1で発振させた出力信号は、そのままでは電
源電圧VDD2 が+2.7[V]以上+4.5[V]未満
であるバッファ回路2に直接接続することは出来ない。
そこで発振回路1とバッファ回路2との間に結合コンデ
ンサ9を挿入し、又バッファ回路内に入力保護ダイオー
ド10による入力保護回路3を挿入して接続する。バッ
ファ回路2の中のバッファ5には帰還抵抗11が並列に
接続されている。これによりバッファ回路2の入力動作
点は、電源電圧の中間点付近でバイアスされる。
The output signal oscillated by the oscillating circuit 1 operating at the power supply voltage V DD1 of +5 [V] has the power supply voltage V DD2 of not less than +2.7 [V] and less than +4.5 [V] as it is. It cannot be directly connected to the buffer circuit 2.
Therefore, the coupling capacitor 9 is inserted between the oscillation circuit 1 and the buffer circuit 2, and the input protection circuit 3 by the input protection diode 10 is inserted and connected in the buffer circuit. A feedback resistor 11 is connected in parallel to the buffer 5 in the buffer circuit 2. As a result, the input operating point of the buffer circuit 2 is biased near the midpoint of the power supply voltage.

【0009】発振回路1の出力は、結合コンデンサ9を
介してバッファ回路2内の入力保護回路3に入力され
る。入力保護回路3に入力した信号は、バッファ回路の
電源電圧VDD2 をp−p値とする信号に変換され、バッ
ファ5及びバッファ6に入力される。バッファ5及びバ
ッファ6に入力された信号は波形成形され、バッファ6
より電源電圧VDD2 をp−p値とする波形成形後の信号
が出力され、その出力信号が圧電発振器の出力となる。
尚、本発明のインバータ及びバッファは、CMOSやT
TL等のICで構成される。
The output of the oscillation circuit 1 is input to the input protection circuit 3 in the buffer circuit 2 via the coupling capacitor 9. The signal input to the input protection circuit 3 is converted into a signal having the power supply voltage V DD2 of the buffer circuit as the pp value, and input to the buffer 5 and the buffer 6. The signals input to the buffer 5 and the buffer 6 are waveform-shaped and
A signal after waveform shaping with the power supply voltage V DD2 as the pp value is output, and the output signal becomes the output of the piezoelectric oscillator.
The inverter and buffer of the present invention are CMOS and T
It is composed of an IC such as TL.

【0010】[0010]

【発明の効果】本発明は以上説明したように、別々の電
源で動作する、発振回路と入力保護回路を具備したバッ
ファ回路とを結合コンデンサを介して接続することによ
り、圧電発振器が装着される回路の消費電流の低減化に
合わせた出力を得ることができ、又従来のレベルシフタ
ー回路を用いなくてすむことから、発振器の小型化及び
低価格化が図れる等の効果が得られる。
As described above, according to the present invention, a piezoelectric oscillator is mounted by connecting an oscillation circuit and a buffer circuit having an input protection circuit, which are operated by different power supplies, through a coupling capacitor. It is possible to obtain an output in accordance with the reduction of the current consumption of the circuit, and it is not necessary to use the conventional level shifter circuit, so that it is possible to obtain effects such as miniaturization and cost reduction of the oscillator.

【図面の簡単な説明】[Brief description of drawings]

【図1】 図1は本発明の実施例を示す圧電発振器の回
路図である。
FIG. 1 is a circuit diagram of a piezoelectric oscillator showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 発振回路 2 バッファ回路 3 入力保護回路 4 インバータ 5,6 バッファ 7 圧電振動子 8 帰還抵抗 9 結合コンデンサ 10 入力保護ダイオード 11 帰還抵抗 1 Oscillation circuit 2 Buffer circuit 3 Input protection circuit 4 Inverter 5,6 Buffer 7 Piezoelectric vibrator 8 Feedback resistor 9 Coupling capacitor 10 Input protection diode 11 Feedback resistance

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 インバータの入出力端子間に圧電振動子
と抵抗を接続して発振させる圧電発振回路と、該圧電発
振回路とバッファ回路の電源がそれぞれ別々に供給され
る圧電発振器において、該圧電発振回路の電源電圧V
DD1 と該バッファ回路の電源電圧VDD2 の関係が、V
DD1>VDD2の時の該圧電発振回路の出力と該バッファ回
路の入力との間に結合コンデンサと、該バッファ回路前
に入力保護ダイオードによる入力保護回路とを具備する
ことを特徴とする圧電発振器。
1. A piezoelectric oscillator circuit in which a piezoelectric vibrator and a resistor are connected between the input and output terminals of an inverter to oscillate, and a piezoelectric oscillator in which the power sources of the piezoelectric oscillator circuit and the buffer circuit are separately supplied. Power supply voltage V of oscillation circuit
The relationship between DD1 and the power supply voltage V DD2 of the buffer circuit is V
A piezoelectric oscillator comprising a coupling capacitor between the output of the piezoelectric oscillation circuit and the input of the buffer circuit when DD1 > V DD2 , and an input protection circuit using an input protection diode in front of the buffer circuit. .
JP9800495A 1995-03-30 1995-03-30 Piezoelectric oscillator Pending JPH08274543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9800495A JPH08274543A (en) 1995-03-30 1995-03-30 Piezoelectric oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9800495A JPH08274543A (en) 1995-03-30 1995-03-30 Piezoelectric oscillator

Publications (1)

Publication Number Publication Date
JPH08274543A true JPH08274543A (en) 1996-10-18

Family

ID=14207573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9800495A Pending JPH08274543A (en) 1995-03-30 1995-03-30 Piezoelectric oscillator

Country Status (1)

Country Link
JP (1) JPH08274543A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9419601B2 (en) 2013-08-08 2016-08-16 Seiko Epson Corporation Input protection circuit, electronic device, electronic apparatus, and moving object

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9419601B2 (en) 2013-08-08 2016-08-16 Seiko Epson Corporation Input protection circuit, electronic device, electronic apparatus, and moving object
US10256625B2 (en) 2013-08-08 2019-04-09 Seiko Epson Corporation Input protection circuit, electronic device, electronic apparatus, and moving object

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