JPH08265657A - Multiplex transmitter for video audio signal, receiver and transmission device - Google Patents

Abstract

PURPOSE: To allow a relation of phase of an audio signal with respect to a phase of a video signal to be kept in a transmitter side and a receiver side and to reproduce an audio signal with less jitter and high quality and a small circuit scale by multiplexing audio clock information onto the audio signal based on a horizontal phase signal and a vertical phase signal and transmitting the video signal and the audio signal while being multiplexed with each other. CONSTITUTION: A horizontal counter 105 and a vertical counter 106 use a video clock to count a horizontal phase signal and a vertical phase signal of a received video signal respectively and provides the count to an audio clock signal multiplexer circuit 107. The audio clock signal multiplexer circuit 107 generates audio clock information based on the audio clock, the horizontal phase signal and the vertical phase signal outputted from an audio clock oscillator 104 and multiplexes the audio clock information onto the audio signal. The audio signal multiplexed with the audio clock information is stored once in a buffer memory 108 and multiplexed onto the video signal for a blanking period by a signal multiplexer 109 and the resulting signal is outputted from a multiplex signal output terminal 110.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video / audio signal multiplex transmission apparatus, a reception apparatus and a combination thereof for transmitting and receiving a video / audio multiplex signal for multiplexing an audio signal during a blanking period of the video signal. It relates to the device.

[0002]

2. Description of the Related Art In recent years, in transmission and recording of a video signal or an audio signal, a digital type device with little deterioration in image quality or sound quality is beginning to prevail in place of the conventional analog type device. Especially in the studio equipment, as a method of transmitting the video signal and the audio signal through one transmission path,
The SMPTE259M standard has been established (for example, Journal of Television Engineering Vol. 46, pp409 to 413 (1992) "2-1-3 Digitization of in-station transmission (1) 10B scramble system"). this is,
This is a standard for serial digital interface. In this SMPTE259M system, audio signals are multiplexed and transmitted during the blanking period of video signals.

A conventional SMPTE259M video / audio signal multiplex transmission apparatus will be described below with reference to the accompanying drawings.

FIG. 6 is a block diagram showing the configuration of a conventional video / audio signal multiplex transmission apparatus. This transmitter includes a buffer memory 5 for temporarily storing an audio signal, an audio clock oscillator 3 for outputting an audio clock, a video clock oscillator 4 for outputting a video clock, and a signal multiplexer 6 for multiplexing a video signal and an audio signal. It is configured.

In FIG. 6, the digital video signal input from the video signal input terminal 1 is input to the signal multiplexer 6. On the other hand, the digital audio signal input from the audio signal input terminal 2 is temporarily stored in the buffer memory 5 by the audio clock output from the audio clock oscillator 3, and then buffered by the video clock output from the video clock oscillator 4. The audio signal read out from the memory 5 is input to the signal multiplexer 6. At this time, since the frequency of the video clock is higher than the frequency of the audio clock, the reading of the audio signal will overtake the writing, so the reading of the audio signal is suspended,
During the blanking period, data other than the audio signal is multiplexed.

The signal multiplexer 6 multiplexes the audio signal read from the buffer memory 5 in the blanking period of the video signal input from the video signal input terminal 1 and then outputs the multiplexed signal to the multiplexed signal output terminal 7 Output to. Here, the video clock output from the video clock oscillator 4 is a clock synchronized with the frequency of the input video signal, and the audio clock output from the audio clock oscillator 5 is a clock synchronized with the frequency of the input audio signal. Is.

The reason why the buffer memory 5 is used between the audio signal input terminal 2 and the signal multiplexer 6 is that the audio signal is converted into the frequency of the video signal because the video signal and the audio signal are digitized at different frequencies. This is necessary, and this is realized by accumulating an audio signal in the buffer memory 5 by the audio clock and reading from the buffer memory 5 by the video clock.

FIG. 7 is a block diagram showing the structure of a conventional video / audio signal multiplex receiver. This receiving device includes a signal separator 12 for separating a multiplexed signal into a video signal and an audio signal, a buffer memory 14 for temporarily storing the separated audio signal, a video clock oscillator 15 for outputting a video clock, and a write address by the video clock. A write address generator 16 for generating, a voice clock oscillator 17 for outputting a voice clock, a read address generator 18 for generating a read address by the voice clock, a phase comparator 19 for comparing a write address and a read address, and the like. There is.

In FIG. 7, the multiplex signal input from the multiplex signal input terminal 11 (for example, the multiplex signal output from the video / audio signal multiplex transmitter of FIG. 6) is a signal separator 12.
Is separated into a video signal and an audio signal, and the video signal is output to the video signal output terminal 13. Since the other audio signal is converted to the frequency of the video signal on the transmitting side, it is necessary to convert it to the frequency of the original audio signal. Therefore,
The separated audio signal is temporarily stored in the buffer memory 14 by the write address generated by the write address generator 16 using the video clock output from the video clock oscillator 15. At this time, contrary to the transmitting side, by temporarily suspending writing, only the audio signal is selected and writing is performed. The audio signal stored in the buffer memory 14 is read by the read address output from the read address generator 18 using the audio clock output from the audio clock oscillator 17. In order to reproduce the audio clock having the same frequency as the transmission, the phase of the write address and the read address are compared by the phase comparator 19, and the oscillation clock of the audio clock oscillator 17 is controlled based on the comparison result. Here, the circuit constituted by the audio clock oscillator 17 and the phase comparator 19 is a phase locked loop (hereinafter,
It is abbreviated as PLL). The audio signal read from the buffer memory 14 is output to the audio signal output terminal 20.

[0010]

However, in the above-mentioned multiplex transmission method, since the clock reproduction is affected by the amount of accumulation in the buffer memory, the circuit scale becomes large in order to control it, and the PLL is also used. Since the control voltage level can be adjusted only by the phase difference unit of the R and W addresses of the buffer memory, fine adjustment cannot be performed, and the residual phase change occurs in the clock smoothed by the PLL circuit, and the phase of the audio signal with respect to the video signal is changed. There is a problem that the relationship cannot be saved on the sending side and the receiving side.

In consideration of such a problem in the conventional video / audio signal multiplex transmission, the present invention can reduce the circuit scale and save the phase relationship of the audio signal with respect to the video signal on the transmitting side and the receiving side. Also, a video / audio signal multiplex transmission device capable of reproducing a high-quality audio signal with little jitter,
It is an object to provide a receiving device and a transmitting device.

[0012]

According to a first aspect of the present invention, there is provided a horizontal counter for outputting a horizontal phase signal of a video signal, a vertical counter for outputting a vertical phase signal of the video signal, and a horizontal phase signal output therefrom. And based on the vertical phase signal,
Video / audio signal multiplexing including an audio clock signal multiplexing circuit for multiplexing audio clock information on an audio signal, and a signal multiplexing means for multiplexing the audio signal and the video signal with the audio clock information multiplexed and sending the multiplexed signal It is a transmitter.

According to a second aspect of the present invention, from the video / audio signal multiplex transmitting apparatus according to the first aspect, a multiplex signal of a digital signal having a fixed length data format in which an audio signal is multiplexed in a blanking period of the video signal is provided. A signal separating means for receiving and separating the received multiplexed signal into an audio signal in which a video signal and audio clock information are multiplexed, and a horizontal counter for outputting a horizontal phase signal of the separated video signal,
A vertical counter that outputs a vertical phase signal of a video signal, an audio clock reproduction circuit that reproduces an audio clock from audio clock information multiplexed in an audio signal based on the output horizontal phase signal and vertical phase signal, and a separation A buffer memory for temporarily storing the read audio signal and reading the stored audio signal using the reproduced audio clock; and an audio signal processing circuit for processing the read audio signal based on the audio clock. The video / audio signal multiplex receiver is provided.

According to a fourth aspect of the present invention, from the video / audio signal multiplex transmitting apparatus according to the first aspect, a multiplex signal of a digital signal having a fixed length data format in which an audio signal is multiplexed in a blanking period of the video signal is provided. A signal separating means for receiving and separating the received multiplexed signal into an audio signal in which a video signal and audio clock information are multiplexed, and a horizontal counter for outputting a horizontal phase signal of the separated video signal,
A vertical counter that outputs a vertical phase signal of a video signal, an audio clock reproduction circuit that reproduces an audio clock from audio clock information multiplexed in an audio signal based on the output horizontal phase signal and vertical phase signal, and control A clock oscillator that oscillates a clock controlled by voltage,
In order to obtain the control voltage of the clock oscillator, a phase comparator that compares the output of the clock oscillator and the output from the audio clock regeneration circuit and the separated audio signal are temporarily stored, and the accumulated audio signal is clocked. A video / audio signal multiplex reception device comprising a buffer memory for reading using an output of an oscillator, and an audio signal processing circuit for processing the read audio signal based on an output of a clock oscillator.

According to a fifth aspect of the present invention, from the video / audio signal multiplex transmitting apparatus according to the first aspect, a multiplex signal of a digital signal having a fixed length data format in which an audio signal is multiplexed in a blanking period of the video signal is provided. A signal separating means for receiving and separating the received multiplexed signal into an audio signal in which a video signal and audio clock information are multiplexed, and a horizontal counter for outputting a horizontal phase signal of the separated video signal,
A buffer memory that temporarily stores the separated audio signals,
A digital phase comparator for comparing the output from the buffer memory with the output horizontal phase signal and a clock oscillator for oscillating a clock based on the output of the digital phase comparator are provided, and the output of the clock oscillator is used. The audio / video signal multiplex receiver outputs the audio signal stored in the buffer memory.

According to a sixth aspect of the present invention, a multiplexed signal obtained by multiplexing the audio signal from the video / audio signal multiplex transmission device according to the first aspect in a blanking period of the video signal is a digital signal having a fixed length data format. Signal separating means for separating the received multiplexed signal into an audio signal in which a video signal and audio clock information are multiplexed, a buffer memory for temporarily storing the separated audio signal, and an output from the buffer memory And a voice signal processing circuit for processing the voice signal output from the buffer memory based on the output of the voice clock reproducing circuit. The audio signal is a video / audio signal multiplex receiving device which outputs the audio signal by using the output of the audio clock reproducing circuit.

[0017]

In the video / audio signal multiplex transmission device of the present invention, the horizontal counter outputs the horizontal phase signal of the video signal, the vertical counter outputs the vertical phase signal of the video signal, and the horizontal phase signal and the output horizontal phase signal are output. The audio clock signal multiplexing circuit multiplexes the audio clock information with the audio signal based on the vertical phase signal, and the signal multiplexing means multiplexes the audio signal and the video signal and sends them.

According to the present invention, in the video / audio signal multiplex receiver, the signal separating means receives the multiplex signal in which the audio signals are multiplexed in the blanking period of the video signal sent from the video / audio signal multiplex transmitter. Separates the multiplexed signal into an audio signal in which the video signal and audio clock information are multiplexed, the horizontal counter outputs the horizontal phase signal of the separated video signal, and the vertical counter outputs the vertical phase signal of the video signal. The audio clock reproduction circuit reproduces the audio clock from the audio clock information multiplexed on the audio signal based on the horizontal phase signal and the vertical phase signal, and the buffer memory temporarily stores the separated audio signal. The stored audio signal is read using the audio clock, and the audio signal processing circuit reads the audio signal read from the buffer memory into the audio clock. On the basis of the process.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings showing its embodiments.

FIG. 1 is a block diagram showing the configuration of a video / audio signal multiplex transmission apparatus according to the first embodiment of the present invention. That is, the video / audio signal multiplex transmission apparatus of this embodiment is provided with a video signal input terminal 101 for inputting a digital video signal and an audio signal input terminal 102 for inputting a digital audio signal, and one of them is provided. The video signal input terminal 101 is connected with a signal multiplexer 109 that multiplexes a video signal and an audio signal, a horizontal counter 105 that outputs a horizontal phase signal of the video signal, and a vertical counter 106 that outputs a vertical phase signal of the video signal. Has been done. Further, the other audio signal input terminal 102 is connected to an audio clock signal multiplexing circuit 107 for multiplexing audio clock information with the input audio signal, and the audio signal is output to the output of the audio clock signal multiplexing circuit 107. A buffer memory (or audio signal register) 108 for temporarily storing is connected. The output of the buffer memory 108 is connected to the above-mentioned signal multiplexer 109, and the output of the signal multiplexer 109 is connected to the multiple signal output terminal 110 for outputting the multiplexed signal. Here, the signal multiplexer 109 and the multiplexed signal output terminal 110 constitute a signal multiplexing means.

A video clock oscillator 103 that oscillates a clock that synchronizes with a video signal and an audio clock oscillator 104 that oscillates a clock that synchronizes with an audio signal are provided. The output of the video clock oscillator 103 is a horizontal counter 105 and a vertical counter. It is connected to the counter 106, and the output of the audio clock oscillator 104 is connected to the audio clock signal multiplexing circuit 107.

Here, the relationship between the video signal and the audio signal will be described. The voice digital signal is subdivided into voice packets for each predetermined voice group unit. The audio packet is transmitted during the blanking period (horizontal auxiliary signal area) of the video signal which is the main signal. That is, one audio packet is transmitted for each transmission of the video digital signal of one line. Here, regarding the transmission order, the blanking period is followed by a digital active line to which data regarding the video digital signal is assigned. Therefore, the audio digital signal is transmitted one line behind the video digital signal. However, when this line is the switching point of the video digital signal, the audio packet cannot be multiplexed on the next line by definition, and is therefore transmitted with a delay of two lines. The above-mentioned audio packet is fixed length data, and audio clock information for synchronizing with a video signal which is independent of the audio packet is provided therein. The audio clock information is clock information set based on the video signal, and is multiplexed by the audio clock signal multiplexing circuit 107 in FIG.

Next, the operation of the video / audio signal multiplex transmission apparatus of the first embodiment will be described with reference to the drawings.

First, the digitized video signal is input from the video signal input terminal 101, and the horizontal counter 10
5, the vertical counter 106, and the signal multiplexer 109 are branched and input. Further, the digitized audio signal is input from the audio signal input terminal 102 and input to the audio clock signal multiplexing circuit 107.

The video clock output from the video clock oscillator 103 is input to the horizontal counter 105 and the vertical counter 106, and the horizontal counter 105 counts the horizontal phase signal of the input video signal using this video clock. And outputs it to the audio clock signal multiplex circuit 107, and the vertical counter 106 counts the vertical phase signal of the input video signal to obtain the audio clock signal multiplex circuit 1
It outputs to 07. Then, the audio clock signal multiplexing circuit 107 generates audio clock information based on the audio clock, the horizontal phase signal and the vertical phase signal output from the audio clock oscillator 104, and multiplexes the audio clock information with the audio signal.

The audio signal in which the audio clock information is multiplexed is temporarily stored in the buffer memory 108, then output to the signal multiplexer 109, and further multiplexed by the signal multiplexer 109 in the blanking period of the video signal. It is output from the signal output terminal 110.

As described above, in this embodiment, the audio clock used on the receiving side is multiplexed with the audio signal as audio clock information and transmitted. Further, by determining the position where the audio clock information is multiplexed by using the horizontal phase signal and the vertical phase signal of the video signal, it is possible to synchronize with the video signal.

FIG. 2 is a block diagram showing the configuration of a video / audio signal multiplex receiver according to the second embodiment of the present invention. That is, the video / audio signal multiplex receiver of this embodiment corresponds to the transmitter of the first embodiment, and the same applies to receivers of the following embodiments.

This receiving device is provided with a multiplex signal input terminal 201 for receiving and inputting a multiplex signal in which a video signal and an audio signal are multiplexed, and the multiplex signal input terminal 2 is provided.
A signal separator 202 that separates the received multiplexed signal into a video signal and an audio signal is connected to 01. Also, a video clock oscillator 2 that oscillates a clock synchronized with the video signal
03 is provided, and the output thereof is a video signal processing circuit 204 for processing the separated video signal, an audio clock reproduction circuit 207 for reproducing an audio clock from the audio clock information included in the separated audio signal, and an audio signal. It is connected to a buffer memory 208 for temporarily storing.

The video signal output of the signal separator 202 is connected to the video signal processing circuit 204, and the audio signal output of the signal separator 202 is branched and connected to the audio clock reproduction circuit 207 and the buffer memory 208. One of the outputs of the video signal processing circuit 204 is the video signal output terminal 210.
The other output is connected to a video signal horizontal counter 205 for counting the horizontal phase signal of the video signal and a video signal vertical counter 206 for counting the vertical phase signal of the video signal. The output of the audio clock reproduction circuit 207 is connected to a buffer memory 208, an audio signal processing circuit 209 for processing an audio signal, and a phase comparator 211 described later, and the output of the buffer memory 208 is output to the audio signal processing circuit 209. It is connected.

A low-pass filter (hereinafter abbreviated as LPF) 212 is connected to the output of the above-mentioned phase comparator 211, and a clock oscillator 213 of a voltage controlled oscillator is connected to the LPF 212, and the clock oscillator 2 thereof is connected.
The output of 13 is connected to the other input of the phase comparator 211 and a flip-flop 214 for holding the audio signal output from the audio signal processing circuit 209. Further, the output of the flip-flop 214 is connected to the audio signal output terminal 215. Here, the phase comparator 211, the LPF 212, and the clock oscillator 213
Form a so-called phase locked loop (PLL). In addition, the multiplex signal input terminal 201 and the signal separator 202
Constitutes the signal separation means.

Next, the operation of the video / audio signal multiplex receiver of the second embodiment will be described with reference to the drawings.

First, the multiplexed signal received from the multiplexed signal input terminal 201 is separated by the signal separator 202 into a video signal and an audio signal. Here, the multiplexed signal is, for example, a digital multiplexed signal transmitted from the video / audio signal multiplex transmission device of the first embodiment, has a fixed-length data format, and the audio signal is multiplexed in the blanking period of the video signal. Further, voice clock information is multiplexed on the voice signal.

On the other hand, a video clock that is synchronized with the video signal is output from the video clock oscillator 203, and the video signal processing circuit 204 processes the video signal from the signal separator 202 using the video clock and outputs the video signal. The signal is output to the signal horizontal counter 205, the video signal vertical counter 206, and the video signal output terminal 210. Video signal horizontal counter 2
05 counts the horizontal phase signal of the video signal and outputs it to the audio clock reproduction circuit 207, and the video signal vertical counter 2
Reference numeral 06 counts the vertical phase signal of the video signal and outputs it to the audio clock reproduction circuit 207.

Then, the audio clock reproducing circuit 207
Uses the output from the video signal horizontal counter 205, the output from the video signal vertical counter 206, and the video clock to reproduce the audio clock from the audio clock information multiplexed in the audio signal separated by the signal separator 202. That is, the audio clock is reproduced from the horizontal phase signal, the vertical phase signal, and the audio clock information, and the buffer memory 208, the audio signal processing circuit 209, and the phase comparator 2 are reproduced.
Output to 11. However, the audio clock reproduction circuit 207
The phase relationship between the video signal and the audio signal on the transmitting side can be reproduced on the receiving side by matching the phase of the audio clock signal output from the buffer memory 208 for signal processing with the audio clock signal output from the receiving side. . Therefore, in order to maintain the phase relationship between the video signal and the audio signal on the transmission side, the audio clock reproduction circuit 207 must have a buffer memory having the same delay amount as the delay amount generated in the buffer memory 208. However, if only the frequency of the audio clock needs to be accurately reproduced regardless of the phase, the buffer memory in the audio clock reproduction circuit 207 as described above is not necessary. Even in that case, the audio signal is reproduced without any problem. The buffer memory 208 temporarily stores the separated audio signal using a video clock, and thereafter,
The audio clock reproduction circuit 207 reads the audio clock. The audio signal read from the buffer memory 208 is processed by the audio signal processing circuit 209 using the audio clock from the audio clock reproduction circuit 207 and input to the flip-flop 214.

Further, the phase comparator 211 compares the output of the audio clock reproduction circuit 207 and the output of the clock oscillator 213 and outputs the control voltage to the clock oscillator 213 via the LPF 212. The output of the clock oscillator 213 is branched and output to the flip-flop 214, which holds the audio signal from the audio signal processing circuit 209, removes the phase shift from the video clock, and outputs the audio signal output terminal 215. Output to.

In the second embodiment, the PLL circuit and the flip-flop 214 are provided. However, instead of this, only the block 200 and the video clock oscillator 203 indicated by the broken line may be provided. Here, since the circuit in the block 200 basically operates with one system clock of the video clock, it can be implemented as an LSI, which is advantageous for downsizing the receiving device.

FIG. 3 is a block diagram showing the configuration of a video / audio signal multiplex receiver according to the third embodiment of the present invention. The receiving apparatus of this embodiment is different from the second embodiment of FIG. 2 in that in the second embodiment, audio signals are read from the buffer memory 208 and audio signals are processed by the audio signal processing circuit 209. While the output of the clock recovery circuit 207 is used, the output of the clock oscillator 213 is used as shown in FIG. 3, and by using the audio clock smoothed by the PLL circuit,
The flip-flop 214 can be eliminated.

In the receiving apparatus of this embodiment, after the multiplexed signal is input from the multiplexed signal input terminal 201, the signal separator 202 separates the multiplexed signal into a video signal and an audio signal, and the separated video signal is separated. Video signal processing circuit 204
After the processing, the horizontal phase signal and the vertical phase signal of the video signal are counted, the audio clock is reproduced using these phase signals, and the audio signal is temporarily stored in the buffer memory 301 by the video clock. Is the same as in the second embodiment.

Next, the audio clock reproduced by the audio clock reproducing circuit 207 is supplied to the phase comparator 2 of the PLL circuit.
11 and is compared with the output of the clock oscillator 213. The comparison result of the phase comparator 211 is the LPF 212.
Is output to the clock oscillator 213 as a control voltage via. The output of the clock oscillator 213 is branched and used for reading the audio signal from the buffer memory 301 and for processing the audio signal in the audio signal processing circuit 302. Therefore, the audio signal is read from the buffer memory 301 by the output from the clock oscillator 213, that is, the smoothed audio clock, further processed by the audio signal processing circuit 302, and output to the audio signal output terminal 215. .

FIG. 4 is a block diagram showing the configuration of a video / audio signal multiplex receiver according to the fourth embodiment of the present invention. In FIG. 4, the same reference numerals as those in FIG. 2 or 3 are the same as those described in the second or third embodiment. That is, the video / audio signal multiplex reception apparatus of this embodiment includes the signal separator 202, the video clock oscillator 203, the video signal processing circuit 204, and the buffer memory 30.
1, video signal horizontal counter 205, video signal vertical counter 206, audio signal processing circuit 401, LPF 212, clock oscillator 213, and video signal horizontal counter 205
From the video signal vertical counter 206, and the audio signal read from the buffer memory 301 with a digital value, which is composed of a digital phase comparator 402 and the like. .

In this embodiment, the multiplexed signal input from the multiplexed signal input terminal 201 is separated into a video signal and an audio signal by the signal separator 202, and the separated video signal is output from the video clock oscillator 203. The video signal is processed by the video signal processing circuit 204 using the video clock and output to the video signal output terminal 210, the video signal horizontal counter 205, and the video signal vertical counter 206. The audio signal is temporarily stored in the buffer memory 301 using the video clock.

The audio signal stored in the buffer memory 301 is read by the audio clock output from the clock oscillator 213 and output to the audio signal processing circuit 401 and also to the digital phase comparator 402. In the digital phase comparator 402, the audio signal read from the buffer memory 301, the horizontal phase signal counted by the video signal horizontal counter 205 and the vertical phase signal counted by the video signal vertical counter 206 are converted into digital values. Phase comparison, LPF21
A control voltage is supplied to the clock oscillator 213 via 2. As a result, the clock whose phase change is smoothed can be used for reading from the buffer memory 301. Then, the audio signal processing circuit 401 processes the audio signal read from the buffer memory 301 and then outputs the processed audio signal to the audio signal output terminal 215.

In this embodiment, the phase comparator can be incorporated in the digital LSI by performing the phase comparison with the digital value, and the circuit configuration becomes very simple.

In the fourth embodiment, the vertical phase signal of the video signal vertical counter 206 is input to the digital phase comparator 402, but the phases of the video signal and the audio signal are deviated by one line unit. If you don't mind,
It is possible to adopt a configuration that does not use the vertical phase signal.

FIG. 5 is a block diagram showing the configuration of a video / audio signal multiplex receiver according to the fifth embodiment of the present invention. The video / audio signal multiplex receiver of this embodiment includes a signal separator 202, a video clock oscillator 203, a video signal processing circuit 204, a video signal horizontal counter 205, a video signal vertical counter 206, a buffer memory 208, an audio signal processing circuit 209, and The phase comparator 211, the LPF 212, the clock oscillator 213, the flip-flop 214, the audio clock reproduction circuit 501 for reproducing an audio clock from the audio signal read from the buffer memory 208, and the like.

In this embodiment, the multiplexed signal input from the multiplexed signal input terminal 201 is separated into a video signal and an audio signal by the signal separator 202, and the separated video signal is output from the video clock oscillator 203. The video signal is processed by the video signal processing circuit 204 using the video clock and output to the video signal output terminal 210, the video signal horizontal counter 205, and the video signal vertical counter 206. Further, the audio signal is temporarily stored in the buffer memory 208 using the video clock.

The audio signal accumulated in the buffer memory 208 is read by the audio clock reproduced by the audio clock reproducing circuit 501 and is reproduced by the audio signal processing circuit 209.
Is output to. Here, the audio clock reproduction circuit 501
Is different from the case of the second or third embodiment, the audio signal read from the buffer memory 208 is input and the audio clock is reproduced from the audio clock information included in the audio signal.

The audio clock output from the audio clock reproduction circuit 501 is output to the buffer memory 208, and at the same time, the audio signal processing circuit 209 and the phase comparator 211.
Also, the audio signal processing circuit 209 processes the audio signal read from the buffer memory 208 by using the audio clock, and then the flip-flop 2
It is output to 14. On the other hand, in the phase comparator 211, the output of the clock oscillator 213 is compared with the audio clock and L
A control voltage is supplied to the clock oscillator 213 via the PF 212.

Further, the output of the clock oscillator 213 is input to the flip-flop 214, and the audio signal processing circuit 2
By holding the audio signal output from 09, the audio signal from which the deviation of the phase change from the video signal is removed is output to the audio signal output terminal 215.

In this embodiment, since the audio clock is reproduced by using the output of the buffer memory 208, the buffer for accumulating the clock information signal in the audio clock reproducing circuit 501 can be eliminated.

In the above embodiment, the transmitting device is taken as the first embodiment and the receiving device is taken as the second to fifth embodiments, but the transmitting device of the first embodiment and the second to fifth embodiments are taken. By combining the receiving device of any of the embodiments of
A video / audio signal multiplex transmission device can be configured.

Further, the audio clock information in the above embodiment may have any format configuration unless it goes against the gist of the present invention.

In the fifth embodiment, the PLL circuit and the flip-flop 214 are provided. However, substantially the same effect can be obtained without this circuit.

[0055]

As is apparent from the above description, according to the present invention, the circuit scale is reduced, the phase relationship between the audio signal and the video signal can be preserved on the transmitting side and the receiving side, and the jitter is small. It has an advantage that a high quality audio signal can be reproduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a video / audio signal multiplex transmission apparatus according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a video / audio signal multiplex receiver according to a second embodiment of the present invention.

FIG. 3 is a block diagram showing the configuration of a video / audio signal multiplex receiver according to a third embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a video / audio signal multiplex receiver according to a fourth embodiment of the present invention.

FIG. 5 is a block diagram showing the configuration of a video / audio signal multiplex receiver according to a fifth embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a conventional video / audio signal multiplex transmission device.

FIG. 7 is a block diagram showing a configuration of a conventional video and audio signal multiplex receiver.

[Explanation of symbols]

 1, 101 Video signal input terminal 2, 102 Audio signal input terminal 3, 17, 103 Audio clock oscillator 4, 15, 104 Video clock oscillator 5, 14, 108, 208, 301 Buffer memory 6, 109 Signal multiplexer 12, 202 Signal separator 19, 211 Phase comparator 105 Horizontal counter 106 Vertical counter 107 Audio clock signal multiplexing circuit 205 Video signal horizontal counter 206 Video signal vertical counter 207, 501 Audio clock reproduction circuit 213 Clock oscillator 214 Flip-flop 402 Digital phase comparator

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H04N 7/087 7/088 7/30

Claims (8)

[Claims] 1. A horizontal counter that outputs a horizontal phase signal of a video signal, a vertical counter that outputs a vertical phase signal of the video signal, and an audio signal based on the horizontal phase signal and the vertical phase signal output from the horizontal counter. An audio clock signal multiplexing circuit for multiplexing audio clock information, an audio signal in which the audio clock information is multiplexed, and the video signal are multiplexed,
A video / audio signal multiplex transmission device comprising: a signal multiplex means for transmitting the multiplex signal. 2. A multiplex signal of a digital signal having a fixed-length data format, in which an audio signal is multiplexed in a blanking period of the video signal, is received from the video / audio signal multiplex transmission device of claim 1, and the reception thereof is performed. Signal separation means for separating the multiplexed signal into an audio signal in which the video signal and audio clock information are multiplexed, a horizontal counter for outputting the horizontal phase signal of the separated video signal, and a vertical phase signal of the video signal. A vertical counter for outputting, an audio clock reproducing circuit for reproducing an audio clock from audio clock information multiplexed on the audio signal based on the output horizontal phase signal and vertical phase signal, and the separated audio signal. A buffer memory that temporarily stores and reads the stored audio signal using the reproduced audio clock, and And an audio signal processing circuit for processing the audio signal based on the audio clock. 3. A clock oscillator that oscillates a clock controlled by a control voltage, and the output of the clock oscillator and the output from the audio clock reproduction circuit are compared to obtain the control voltage of the clock oscillator. 3. The video / audio signal multiplex receiving apparatus according to claim 2, further comprising a phase comparator and a flip-flop for holding the output of the audio signal processing circuit by the output of the clock oscillator. 4. A multiplex signal of a digital signal having a fixed-length data format, in which an audio signal is multiplexed in a blanking period of the video signal, is received from the video / audio signal multiplex transmitter of claim 1, and the reception thereof is performed. Signal separation means for separating the multiplexed signal into an audio signal in which the video signal and audio clock information are multiplexed, a horizontal counter for outputting the horizontal phase signal of the separated video signal, and a vertical phase signal of the video signal. A vertical counter for outputting, an audio clock reproducing circuit for reproducing an audio clock from audio clock information multiplexed in the audio signal based on the output horizontal phase signal and vertical phase signal, and a clock controlled by a control voltage And a clock oscillator for oscillating the clock oscillator, and to obtain the control voltage of the clock oscillator, the output of the clock oscillator and the sound A phase comparator for comparing the output from the voice clock reproduction circuit, a buffer memory for temporarily storing the separated voice signal and reading the stored voice signal using the output of the clock oscillator, and its reading And an audio signal processing circuit for processing the generated audio signal based on the output of the clock oscillator. 5. A multiplex signal of a digital signal having a fixed-length data format, in which an audio signal is multiplexed in a blanking period of the video signal, is received from the video / audio signal multiplex transmission device of claim 1, and reception thereof. Signal separation means for separating the multiplexed signal into an audio signal in which the video signal and audio clock information are multiplexed, a horizontal counter for outputting a horizontal phase signal of the separated video signal, and the separated audio signal temporarily. A buffer memory for accumulating, a digital phase comparator for comparing the output from the buffer memory with the output horizontal phase signal, and a clock oscillator for oscillating a clock based on the output of the digital phase comparator , Using the output of the clock oscillator,
A video / audio signal multiplex reception device, which outputs an audio signal stored in the buffer memory. 6. The video / audio signal multiplex transmitting apparatus according to claim 1, receives a multiplex signal of a digital signal having a fixed-length data format in which an audio signal is multiplexed during a blanking period of the video signal, and receives the same. Signal separation means for separating the multiplexed signal into an audio signal in which the video signal and audio clock information are multiplexed, a buffer memory for temporarily storing the separated audio signal, and an audio signal output from the buffer memory. An audio clock reproduction circuit that reproduces a clock and an audio signal processing circuit that processes an audio signal output from the buffer memory based on the output of the audio clock reproduction circuit, and the audio signal stored in the buffer memory is And a video / audio signal multiplex reception, which is output using the output of the audio clock reproduction circuit. apparatus. 7. A clock oscillator that oscillates a clock controlled by a control voltage, and compares the output of the clock oscillator with the output of the audio clock reproduction circuit to obtain the control voltage of the clock oscillator. 7. The video / audio signal multiplex receiving apparatus according to claim 6, further comprising a phase comparator and a flip-flop that holds the output of the audio signal processing circuit by the output of the clock oscillator. 8. A video / audio signal multiplex transmission apparatus comprising: the video / audio signal multiplex transmission apparatus according to claim 1; and the video / audio signal multiplex reception apparatus according to claim 2.