JPH08263268A - Function expansion device for cpu and electronic apparatus - Google Patents

Abstract

PURPOSE: To realize the expansion functions of plural CPU, which control different processings, by one type of device with a small number of pins and to suppress the increase of cost. CONSTITUTION: The first and second function expanding circuits 203 and 204 which individually execute function expansion against various CPU are provided. Data and signals from CPU are received and they are selectively outputted to one of the function expansion circuits 203 and 204. Furthermore, data and signals from the function expansion circuits 203 and 204 are selectively received and outputted in accordance with a switch signal from CPU.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a function expanding device for a CPU having a function expanding function for a CPU and an electronic device having the function expanding device for the CPU.

[0002]

2. Description of the Related Art Conventionally, the function expansion of a CPU is performed by creating a circuit around the CPU by using a general-purpose logic or a general-purpose port, or by using a special-purpose IC (ASI
It was done by creating C). Also, multiple CPUs
In the case of using the ASIC, it was realized by connecting the data / address buses from different CPUs at the same time and creating circuits inside separately.

With the above method, the circuit area occupied by the peripheral circuits becomes large. The ASIC can be used only for one dedicated CPU, that is, when a plurality of CPUs are used, there are as many ASIC types as there are CPUs. When a plurality of CPUs are simultaneously connected to one ASIC, the type of ASIC has an abnormally large number of pins for the number of gates of the internal circuit.

However, there is a problem that the cost becomes high regardless of which method is used. That is, when considering the expanded function means of a plurality of (for example, two) CPUs, the following three points have been considered.

The first is a method of forming a circuit by using a general-purpose logic IC or a general-purpose port around each CPU. This method is a useful means for small-scale function expansion, but when there are many functions that need to be expanded, such as a digital copying machine, disadvantages occur in the number of parts, and in the circuit area.

Second, an ASIC for expansion for each CPU
Is a method of constructing a circuit. in this way,
It can be said that it is useful in terms of the number of parts and the circuit area, and in addition, each ASIC can be produced with an appropriate number of gates. However, on the other hand, it can be connected only to a specific CPU, and an ASIC must be created for each CPU, which causes disadvantages in the number of used CPUs and the ASIC development cost.

The third is a method of forming an expansion ASIC capable of simultaneously connecting two CPUs and forming a circuit. In this method, the number of parts is of course
It can be said that the development cost is advantageous because the intended function can be performed by creating the SIC. On the other hand, however, in the case of an ASIC for the purpose of expanding the functions of the CPU, it is inevitable that addresses and data are connected by a bus, so that the number of pins becomes very large.

ASIC to be used due to increase in the number of pins
Is a type with a large number of packages and internal gates. This is useful when there is a circuit amount that requires the number of gates, but the cost increase due to the increase in the number of pins is extremely large.

[0009]

SUMMARY OF THE INVENTION In order to solve the above-mentioned drawbacks, the present invention can realize an extended function of a plurality of CPUs for controlling different processes with one type of device having a small number of pins, C that can suppress the increase in cost
An object is to provide a function expansion device and electronic equipment for PU.

[0010]

A function expanding device for a CPU according to the present invention comprises a plurality of function expanding means for individually performing function expansion for various CPUs, and a CPU for outputting a function from the CPU in response to a switching signal from the CPU. First output means for receiving data and signals and selectively outputting them to one of the function expanding means, and selectively receiving data and signals from the function expanding circuit in response to a switching signal from the CPU. It is composed of a second output means for outputting.

A function expanding device for a CPU according to the present invention is a C
A first function expansion circuit for performing a first function expansion for a PU, a second function expansion circuit for performing a second function expansion for a CPU different from the CPU, and from the CPU in response to a switching signal from the CPU. Buffer for receiving the data and signals of the above and selectively outputting them to the first function expansion circuit or the second function expansion circuit, and the CPU
The output buffer selectively receives and outputs the data and signal from the first function expanding circuit or the data and signal from the second function expanding circuit in accordance with the switching signal from.

The electronic apparatus according to the present invention controls the first CPU for controlling various processes, the second CPU for controlling various processes different from the first CPU, and the control for the first CPU. A plurality of first processing means for executing processing, a plurality of second processing means for executing processing for the control of the second CPU, and a first function expansion for performing a first function expansion for the first CPU Means, a second function expanding means for performing a second function expansion to the second CPU, and a data or signal from the first CPU in response to a switching signal from the first CPU. An input buffer for outputting to the first function expanding means or for receiving data or a signal from the second CPU and outputting to the second function expanding means in response to a switching signal from the second CPU. And the first In response to the switching signal from the PU, the data or signal from the first function expanding means is received and output to the first processing means, or the data or signal from the second function expanding means is received. It is composed of a function expansion device for CPU having an output buffer for outputting to the second processing means.

The electronic apparatus according to the present invention controls the first CPU for controlling various processes, the second CPU for controlling various processes different from the first CPU, and the control for the first CPU. A plurality of first processing circuits for executing processing, a plurality of second processing circuits for executing processing for the control of the second CPU, and a first function for performing a first function expansion for the first CPU. Expansion circuit and the second CP
A second function expansion circuit for performing a second function expansion for U, and the first function expansion circuit for receiving data and signals from the first CPU in response to a switching signal from the first CPU. An input buffer for receiving data and signals from the second CPU and outputting them to the second function expansion circuit in response to a switching signal from the second CPU, and the first CPU. Depending on the switching signal from
It receives data and signals from the first function expansion circuit and outputs them to the first processing circuit, or receives data and signals from the second function expansion circuit and outputs them to the second processing circuit. It is composed of a function expansion device for a CPU having an output buffer.

[0014]

The present invention has a plurality of function expanding means for individually expanding the functions of various CPUs, and receives the data and signals from the CPU in response to the switching signal from the CPU to perform the function expanding means. One of them is selectively output, and further, data and signals from the function expanding means are selectively received and output in accordance with the switching signal from the CPU.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a CPU used in an electronic device.
2 shows a function expansion device 200 for a computer. That is,
The function expansion device 200 is an ASIC (application-specific I
It is a device configured by C) and capable of function expansion to various CPUs. In this embodiment, function expansion to two types of CPUs can be selectively performed. The function expansion device 200 is composed of an input buffer 201, an output buffer 202, a first function expansion circuit 203, and a second function expansion circuit 204.

The input buffer 201 receives data and signals from the CPU in response to a switching signal from the CPU and selectively selects the first function expansion circuit 203 or the second function expansion circuit 204. It is what is output. For example, when the switching signal from the CPU is at a high level, the output terminals 1A to 40A are valid, and the data and signals from the CPU supplied to the input terminals 1 to 40 are output from the output terminals 1A to 40A to the first terminal. Function expansion circuit 20
When the switching signal from the CPU is at a low level, the output terminals 1B to 40B are valid, and the data and signals from the CPU supplied to the input terminals 1 to 40 are output from the output terminals 1B to 40B. It is output to the second function expansion circuit 204.

The output buffer 202 is responsive to a switching signal from the CPU to output the first function expansion circuit 203.
Alternatively, it receives the output from the second function expansion circuit 204 and outputs it to an external processing circuit or the CPU. For example, when the switching signal from the CPU is at a high level, the input terminals 41A to 90A become valid, and the data and signals from the second function expansion circuit 203 supplied to the input terminals 41A to 90A are output from the output terminals 41 to 41. 90 to the external processing circuit and the CPU, and the C
When the switching signal from PU is low level, input terminal 41
B to 90B become valid, and the data and signals from the first function expansion circuit 204 supplied to the input terminals 41B to 90B are output from the output terminals 41 to 90 to the external processing circuit and the CPU.

A CPU is connected to the input terminals 1 to 40 of the input buffer 201, and the output buffer 202 is connected to the CPU.
The external processing circuits and the CPU are connected to the output terminals 41 to 90 of the above, and the CPU is connected to the switching terminals CH of the input buffer 201 and the output buffer 202.

The first function expansion circuit 203 and the second function expansion circuit 203.
The function expansion circuit 204 of FIG. 1 performs function expansion for each CPU, and performs different function expansion for different CPUs. For example, the first function expansion circuit 203 is the main CPU in the digital copying machine.
To the printer CPU in the digital copying machine by the second function expansion circuit 204.

Next, the operation of the above arrangement will be described with reference to the flow chart shown in FIG. That is, when the switching signal from the CPU is at high level, the CPU
Is supplied to the first function expansion circuit 203 via the input buffer 201. After the function expansion is performed here, the data and signals after the function expansion are output via the output buffer 202. It is supplied to an external processing circuit or CPU.

When the switching signal from the CPU is at low level, the data and signals from the CPU are transferred to the input buffer 2
01 is supplied to the second function expansion circuit 204, and after the function expansion is performed here, the data and the signal after the function expansion are supplied to the external processing circuit and the CPU via the output buffer 202. It

Therefore, when viewed from the surface of the circuit board, it is possible to realize beneficial results with respect to the number of parts and the circuit area.
From the viewpoint of creating an ASIC as a function expansion device for U, it is possible to realize beneficial results with the number of internal gates, the number of pins and packages, the number used (two for one machine), and the development cost.

Further, depending on the margin of the internal gate,
In addition to the second function expansion circuit, it is also possible to add another function expansion circuit for CPU. In this case, this can be realized by increasing the number of input terminals for the switching signal according to the number of additions.

Next, an embodiment in which the function expanding device 200 is used in a digital copying machine will be described with reference to FIGS. In this case, the same function expansion device 200 is used for the two CPUs, the main CPU of the digital copying machine and the printer CPU, and the first function expansion circuit 2 is used.
Reference numeral 03 denotes a circuit configuration for expanding the functions of the main CPU, and the second function expansion circuit 204 includes a printer CP.
It is a circuit configuration for implementing the function expansion for U.

As shown in FIG. 3, the digital copying machine 2 has an image reading section 4 functioning as a reading means and an image forming section 6 functioning as an image forming means.
In addition, an upper portion of the image reading unit 4 is formed so as to be openable and closable with respect to a document table of the image reading unit 4 which will be described later, and an object to be read, that is, a document D is fed toward the document table one by one, and An automatic document feeder (hereinafter referred to as an AD) that functions as a document retainer for closely contacting a document D placed on the document table with the document table.
(Denoted as F) 8 is set.

The image reading unit 4 has an upper portion facing the ADF 8 in a closed state, and a manuscript table 11 made of transparent glass on which a manuscript D is set; 11 has a reference display device 12 indicating the position where the document D is to be set. A control panel is arranged near the document table 11 surrounding the document table 11.

Below the document table 11, the image reading unit 4 is provided with an exposure lamp 13 for illuminating the document D placed on the document table 11, and for converging light from the exposure lamp 13 on the document D. The auxiliary reflection plate 14 and the first mirror 15 that bends the reflected light from the document D to the left in the drawing are arranged. Exposure lamp 13, auxiliary reflector 14 and first
The mirror 15 is fixed to the first carriage 16,
The first carriage 16 is arranged so as to be movable in parallel with the document table 11 with the movement of the first carriage 16. The driving force of a pulse motor (not shown) is transmitted to the first carriage 16 via a toothed belt (not shown), and the first carriage 16 is moved in parallel along the document table 11.

In the left side of the document table 11 in the direction in which the reflected light reflected by the first mirror 15 is guided, it is parallel to the document table 11 via a drive mechanism (not shown) such as a toothed belt and a DC motor. A second carriage 20 is arranged so as to be movable.

The first carriage 15 is attached to the second carriage 20.
The second mirror 21 that bends the reflected light from the document D guided by and downward and the third mirror 22 that bends the reflected light to the right in the drawing are arranged at right angles to each other. Second carriage 2
0 is driven by the first carriage 16 by a toothed belt (not shown) for driving the first carriage 16 and is moved in parallel along the document table 11 at a speed of ½ with respect to the first carriage 16. It

The reflected light from the second carriage 20 is imaged at a predetermined magnification within the plane below the first carriage 16 and including the optical axis of the light reflected by the second carriage 20. An image forming lens 23 and a CCD image sensor 24 that converts the reflected light, which is focused by the image forming lens 23, into an electric signal, that is, image data are arranged.

The image forming section 6 is a photosensitive drum 3 as an image bearing member rotatably positioned in the center of the copying apparatus 2.
Has 0. The photoconductor drum 30 is rotated at a predetermined rotation speed by a motor (not shown).

At a predetermined position around the photosensitive drum 30, a charger 31 for charging the surface of the drum to a predetermined charge, and image data supplied from an image processing unit described later, that is, image information to be image-formed, are provided. A laser beam generated from a laser diode (not shown) is deflected in the axial direction of the photosensitive drum 30 by a polygon mirror 32a as a deflecting device, and at the same time, the first and second folding mirrors 32b and 32c and the fθ lens 3 are provided.
A laser exposure device 32 that forms an electrostatic latent image on the surface of the photoconductor drum 30 by exposing the surface of the photoconductor drum 30 through 2d, and the surface of the photoconductor drum 30 is exposed by the laser exposure device 32. A developing device 33 having a developing roller 33a for supplying a toner as a developer to the formed electrostatic latent image to develop the electrostatic latent image at a desired image density, and a transfer material, that is, a copy sheet P fed from a sheet cassette described later.
The toner image formed on the photosensitive drum 30 is transferred onto the photosensitive drum 30 and the paper P on which the toner image is transferred is transferred onto the photosensitive drum 30.
From the surface of the photoconductor drum 30, a peeling claw 35 for peeling the copy sheet P from the surface of the photoconductor drum 30, a cleaning device 36 for cleaning the toner remaining on the surface of the photoconductor drum 30, and the photoconductor drum. A static eliminator 37 for eliminating static potentials remaining on the surface of 30 is arranged in order.

At the bottom of the copying machine 2 located below the photosensitive drum 30, a multi-stage paper feeding device (hereinafter referred to as a paper feeding means) is detachably mounted in a plurality of upper and lower stages from the front side of the copying machine 2. 40 is designated as PFP and is integrated with the copying apparatus 2.

The PFP 40 includes an upper cassette 41, a middle cassette 42 and a lower cassette 43 for accommodating a plurality of types of copy sheets P of various sizes. Each of the cassettes 41, 42 and 43 is, for example, in the longitudinal direction. The A4 size copy sheet, the B4 size copy sheet and the A3 size copy sheet placed so as to be conveyed along are each formed to be able to store about 500 sheets.

Pickup rollers 44a, 44b and 44c are provided at predetermined positions of the upper cassette 41, the middle cassette 42 and the lower cassette 43 to take out the sheets P one by one from the respective cassettes 41, 42 and 43.

Each pickup roller 44a, 4
4b and 44c for each cassette 41, 42 and 4
A conveyance roller 45 for separating the sheets P one by one is provided at a position where the leading edge of the sheet P taken out from the sheet 3 is passed.
a, 45b and 45c, and separating rollers 46a, 46b and 46 integrally arranged with the respective conveying rollers.
c is arranged. The separation rollers 46a, 46b, and 46c are arranged such that their axes are parallel to each other and contact with each other at a predetermined pressure, and rotate in a direction opposite to the rotation direction of the transfer rollers. By doing so, only the uppermost one sheet of the paper P taken out from each cassette is delivered to the transport path described later.

On the right side of the PFP 40 in the figure, there are three sheets of paper P that are frequently used, for example, A4 size paper P.
A large-capacity feeder (hereinafter referred to as LCF) 47 that can store about 000 sheets is provided. LCF47
The paper P accommodated in the LDF 47 is
A pickup roller 48 is arranged to take out the sheets one by one. A separating mechanism 49 including a pair of upper and lower conveying rollers 49a and a separating roller 49b is arranged between the pickup roller 48 and the photosensitive drum 30. The separating mechanism 49 rotates the separating roller 49b in a direction opposite to the direction in which the conveying roller 49a is rotated, so that only the uppermost one sheet of the paper P taken out from the LDF 47 by the pickup roller 48 is conveyed as described later. Send to the road.

Above the LCF 47, each cassette 41,
Copy paper P independently of 42, 43 and LCF 47
A manual feed feeder 50 capable of feeding paper is formed. Between the manual feed feeder 50 and the photoconductor drum 30, a manual feed pickup roller 51 for taking in the paper P inserted in the manual feed feeder 50, a manual feed guide 52 for guiding the paper P taken in by the pickup roller 51,
Further, a conveyance roller 53 that conveys the sheet P guided toward the photosensitive drum 30 via the manual feed guide 52 is provided.

Respective cassettes 41, 42 and 43
In addition, between the LCF 47 and the photoconductor drum 30, a transport path 5 for guiding the paper P from the cassettes 41, 42 and 43 and the LCF 47 toward the photoconductor drum 30.
4 are formed. The conveyance path 54 further extends to the outside of the copying apparatus 2 via a transfer area defined between the photosensitive drum 30 and the transfer / separation charger 33. Further, in the transport path 54, the paper P fed from any of the cassettes, the LCF, or the manual feed guide is used.
A plurality of transport rollers 55 for transporting the sheet toward the photoconductor drum 30 are provided.

In the vicinity of the photosensitive drum 30 of the transport path 54 and on the upstream side, the copy sheet P guided in the transport path 54 is provided.
Of the toner image on the photoconductor drum 30 and the tip of the copy paper P are aligned, and the copy paper P is transferred to the transfer area at the same speed as the moving speed of the outer peripheral surface of the photoconductor drum 30. An aligning roller 56 for feeding paper is arranged. Further, in front of the aligning roller 56, that is, on the side of the transport roller 55, the aligning roller 56
An aligning sensor 56a is provided for detecting the arrival of the copy sheet P to the sheet.

A conveyor belt 57 for conveying the paper P is incorporated in the direction in which the paper P passing through the transfer area advances. At the position where the paper P is conveyed by the conveyor belt 57 and the heat is less likely to be applied to the photoconductor drum 30, a pair of heat rollers whose roller surfaces are in pressure contact with each other is included and the toner image is transferred to the paper. A fixing device 58 for fixing the toner image on the paper P by heating the toner image and melting the toner image to press the toner image and the paper P is provided.

On the side wall of the copying machine 2 facing the fixing device 58, the paper P on which the toner image is fixed by the fixing device 58.
A discharge tray 59 for discharging is disposed. A discharge switching unit 60 is disposed between the fixing device 58 and the discharge tray 59 to guide the copy paper P, on which the toner image is fixed by the fixing device 58, to either the paper reversing unit or the discharge tray 59 described later. There is.

The discharge switching unit 60 is arranged between the first and second discharge rollers 61 and 62 for propelling the sheet P that has passed through the fixing device 58, and between the first and second discharge rollers 61 and 62. A distribution gate 63 is provided for selectively distributing the copy paper P, which has passed through the fixing device 58, to either the discharge tray 59 or a paper reversing unit described later.

The reversing mechanism 64 includes a temporary stacking unit 65 for temporarily stacking the copy sheets P that have already passed through the transfer area and the fixing device 58, and the copy sheets P having passed through the fixing device 58.
A reversing path 66 for reversing the front and back of the sheet to the temporary stacking section 65, a pickup roller 67 for taking out the copy sheets P stacked in the temporary stacking section one by one, and the aligning rollers for the sheets P stored in the temporary stacking section 65 again. It has a reversing conveyance path 68 that guides the sheet 56, and a paper feed roller 69 that feeds the sheet P guided by the reversal conveyance path 68 toward the aligning roller 56.

The ADF 8 has a cover 71 and a cover 7
The rear edge of the copying machine 1 is attached to the rear edge of the upper surface of the copying apparatus 2 via a hinge device (not shown).
By rotating and displacing the entire DF 8, as described above, it is formed so as to be openable and closable with respect to the document table 11 of the image reading section 4.

A document feeding table 72 for holding a plurality of documents D is provided on the upper surface of the cover 71 slightly to the left. The documents D set on the document feed table 72 are sequentially taken out one by one on the left side of the document feed table 72 in the figure, that is, one end side of the ADF 8, and the document table 11 of the image reading unit 4 is read from the left end side in the figure. A pickup roller 73 for supplying to one end side of is arranged. An empty sensor 7 as a document detection sensor for detecting whether or not the document D is set on the document feed table 72 at a predetermined position of the document feed table 72.
3 are provided.

In the original pick-up direction of the pickup roller 73, the paper feed roller 74 for sending the original D taken out by the pickup roller 73 toward the original table 11 and the leading end of the original D fed by the paper feed roller 74 are arranged. An aligning roller 75 for aligning is arranged. The document D is placed between the aligning roller 75 and the paper feeding roller 74.
An aligning sensor 75a for detecting the arrival of the aligning roller 75 on the aligning roller 75 is arranged.

Inside the cover 71, at a position facing the platen 11 of the image reading section 4 in a state where the ADF 8 is closed, a size that covers almost the entire platen 11 is given, and a pickup roller is provided. A conveyance belt 76 is arranged to convey the document D conveyed from the document feed table 72 via the document feed roller 74 and the aligning roller 73 to a predetermined position on the document table 11. The conveyor belt 76 is stretched around belt rollers 77 arranged in a pair in the left and right in the figure, and is rotated by a belt drive mechanism (not shown) toward both the right side in the figure and the left side in the figure.

A conveyor belt 76 is provided on the right side of the ADF 8.
Thus, the reversing roller 78 that sends the document D moved from the left side to the right side in the drawing toward the outside of the cover 71, the pinch roller 79 that presses the document D against the reversing roller 78, and the reversing roller 78 and the pinch roller 79 convey the document D. Document D
Flapper 8 which switches between returning to the transport belt 76 again or discharging to a predetermined discharge position, that is, the cover 71.
0, when the flapper 80 is switched to the discharge side, a discharge roller 81 that discharges the document D conveyed by the reversing roller 78, and a jam sensor 82 that detects a jam of the document near the reversing roller 78. Are arranged.

FIG. 4 is a block diagram of the digital copying machine 2 shown in FIG.
3 is a block diagram schematically showing the control mechanism of FIG. The control mechanism of the digital copying machine 2 includes a control panel unit 110 that controls the control panel 114, a scanner unit 120 that reads image information of the document D, a printer unit 130 that forms an image on the paper P based on the input image information, A memory editing unit 140 that processes image data supplied from the scanner unit 120 and an external device described later, for example,
A system unit 15 that manages input of image data from a facsimile machine, a hard disk drive, or a computer and a word processor connected to a known local area network (hereinafter referred to as LAN).
0, control panel unit 110, scanner unit 1
20, the printer unit 130, the memory editing unit 140, and the system unit 150. The main control unit 160 controls transmission and reception of signals.

The control panel section 110 includes a control panel CPU 111 and a control panel CPU
Read-only memory (hereinafter referred to as R
It is composed of an OM 112 and a random access memory (hereinafter, RAM) 113.

The control panel CPU 111 uses the RO
Based on the data stored in the M112 and the RAM 113, detection of input by various switches and a touch panel arranged on the control panel 114, display on the touch panel, and turning on / off of LEDs are controlled.

The scanner unit 120 includes the scanner CPU 12
1 and a ROM 122 connected to the scanner CPU 121
And RAM 123, ROM 122 and RAM
By the control of the scanner CPU 121 based on the control data stored in 123, the CCD of the image reading unit 4
A mechanism for operating the image sensor 24 to capture the image of the document D as light and dark information of light and energizing a DC motor or the like (not shown) for moving the first carriage 16 and the second carriage 20 at a predetermined speed. A predetermined drive signal is output to the control unit 124.

Further, the scanner section 120 passes through the A / D conversion circuit 125 and the A / D conversion circuit 125 which convert the analog image data output from the CCD image sensor 24 into a digital signal by a known A / D conversion. The shading correction circuit 126 that removes the influence of the individual error of the output of the CCD image sensor 24 and the nonuniformity of the light amount from the illumination lamp 13 from the image signal converted into the digital signal, and the CCD image sensor 24 read the shading correction circuit 126. It has a line memory 127 for supplying the image information of the document D to the memory editing unit 140 connected at the subsequent stage at a predetermined timing, and has the ROM 122 and RA.
Under the control of the scanner CPU 121 based on the data of M123, the image information of the document D read by the CCD image sensor 24 is converted into an electric signal, which is then binarized at a predetermined threshold level and connected to the memory editing unit 140 at the subsequent stage. To the page memory described later.

The scanner CPU 121 has an ADF
8 is also connected. The ADF 8 is the scanner CPU 1 based on the control by the main control unit 160 described later.
The document D is fed under the control of 21. Also, the scanner C
When editing data is input to the PU 121 from a coordinate input device (not shown), predetermined control data is output to the page memory of the memory editing unit 140, which will be described later, and image data used for image formation is held. An editor 128 for controlling the size of the memory area is also connected.

The printer unit 130 includes the printer CPU 13
1 and a ROM 132 connected to the printer CPU 131
An image is formed on the paper P based on the image information read via the image reading unit 4 and the image data supplied from an external device described later, including the RAM 133.

In the printer CPU 131, the photosensitive drum 30, the developing roller 33a of the developing device 33, the aligning roller, the conveying belt, the fixing device, the reversing mechanism, and the cassettes 41, 42 and 43 of the multi-stage paper feeding device 40, and A motor control circuit 134 for driving a motor (not shown) that rotates such as a pickup roller and a conveyance roller and a separation roller arranged in each LDF 47, each cassette 41, 42 and 43, and a paper empty switch (not shown) arranged in each LDF 47, The lever switch is provided at a predetermined position of the transport path 54 and the reversing mechanism 64, and is used for inputting a signal output from a lever switch (not shown) that detects jamming of the paper P, and switches and sensors such as the aligning sensor 56a. Input circuit 135 And, for example, the mechanism control unit 136 for energizing the solenoid or the like (not shown) included in the distribution gate 63 or the cleaning device 35 of the discharge switching unit 60 is connected.

The printer CPU 131 also includes a temperature control circuit 137 for controlling the temperature of the fixing device 58, a voltage supply circuit 138 for applying a predetermined voltage to a charging charger, a developing device, a transfer / peel charger, and the like, and a laser exposure device. A laser drive circuit 139 for intensity-modulating the light intensity of a laser beam emitted from a laser diode (not shown) 32 corresponding to image data supplied from a page memory, which will be described later, is connected to the ROM 132 and the RAM.
An image is formed on the paper P under the control of the printer CPU 131 based on the data 133.

The memory editing unit 140 is a memory control CPU.
141 including a main CPU described later of the main control unit 160 and a system C described later of the system unit 150.
Image data supplied from the scanner unit 120 or an external device according to an instruction from both the PU and the printer unit 1
After being converted into bitmap data used for intensity modulation of the laser beam emitted from the laser diode of the laser exposure device 32 of 30, the page memory shown in the subsequent stage is temporarily stored.

In the memory control CPU 141, image data supplied from an external device via the system unit 150 and predetermined by an image processing unit described later in the main control unit 160 after being read by the scanner unit 120. An image editing unit 142 that edits the image data of the document D converted to the format, a compression / decompression unit 143 that compresses or decompresses the input image data, and an enlargement / reduction or rotation of the input image data. Reduction / rotation unit 14
4, a page memory 145 that stores image data processed through the image editing unit 142, the compression / expansion unit 143, and the enlargement / reduction / rotation unit 144 page by page, an address control unit 146 that manages memory addresses, and a memory A memory management control unit 147 for managing the data of the above, and an interrupt control unit 148 for giving instructions for processing such as compression / expansion and enlargement / reduction / rotation to the image data taken in by the image editing unit 142. Are connected.

The system section 150 includes a system CPU 151 for controlling the capture of image data supplied from other than the scanner section 120, and a facsimile apparatus 152 as an external apparatus connected to the system CPU 151, a hard disk apparatus 153, a computer not shown and A LAN 154 to which a word processor or the like is connected, and a printer controller 155 for converting image data supplied via the facsimile 152, the hard disk device 153, and the LAN 154 from code data into image data in a format processable by the copying apparatus 2, respectively. By controlling, the image editing unit 142 of the memory editing unit 140 is made to input the image data.

The main control section 160 operates in the copying apparatus 2, that is, the CPUs 121 and 13 of the control panel section 110, the scanner section 120, the printer section 130, the memory editing section 140 and the system section 150, respectively.
Main CPU 161 controlling 1, 141 and 151
have.

The main CPU 161 has a ROM 162 in which initial data and the like for operating the copying apparatus 2 are stored, and the control panel section 110, the scanner section 120, and the printer section 130 under the control of the CPUs 121, 131, 141, and 151. , Memory editing unit 14
0 and the RAM 163 holding various data input from the system unit 150, respectively.

The main CPU 161 also holds a printer font R that holds a printer font used to store the code data input via the system section 150 in the page memory 145 of the memory editing section 140.
OM 164, for displaying an image corresponding to the code data input via the system section 150 on an editing display device (not shown), and for displaying a predetermined image on the liquid crystal display / input panel of the control panel section Display font ROM 165 for holding display fonts of the printer unit 120, designation of destination of image data read by the scanner unit 120, switching of image data to be supplied to the printer unit 130, and the like, and line memory 127 of the scanner unit 120 and memory editing. Part 1
Between 40 page memories 145 and page memory 1
A data switching / buffer memory 166 that functions as a buffer memory for image data transferred between the laser exposure device 32 and the laser exposure device 32, and an image processing unit 16 that masks or trims input image data.
7 is connected.

Further, the printer CPU 131, the ROM 132, the RAM 133, the motor control circuit 134,
Input circuit 135, mechanism control unit 136, temperature control circuit 13
7, the function expansion device 200 is provided between the voltage supply circuit 138, the laser drive circuit 139, the laser exposure device 32, and the large-capacity feeder 47.
A high-level selection signal from U131 is input to the input buffer 20.
1 and the output buffer 202, and the first function expansion circuit 203 is selected.

The main CPU 161 and the ROM 16
2, RAM 163, printer font ROM 164, display font ROM 165, data switching / buffer memory 166, image processing unit 167, control panel CPU 111, ROM 112, RAM
The function expansion device 200 is provided between the control panel 114 and the control panel 114.
A low-level selection signal is supplied from 61 to the input buffer 201 and the output buffer 202, and the second function expansion circuit 2
04 is selected.

In this case, the first function expansion circuit 203 in the function expansion device 200 is the printer CPU 131.
Function expansion processing for the internal decoder 211, the external decoder 212, and the external decoder 212, as shown in FIG.
D / A WR generator 213, serial data synchronization clock generator 214, D / A register selector 215, D / A
A data WR circuit 216, D / A data RD circuit 21
7, data bus input / output selector 218, internal data input unit 219, OUT port 220, IN port 221,
It is composed of an FG pulse counter 222, an I / O port 223, and a D / A serial control unit 224. The I / O port and the motor are controlled by the input signal address bus, data bus, read / write, and clock signal. It operates as an FG pulse counter, serial control for D / A, and inner / outer decoder.

That is, the address signal from the printer CPU 131 is input to the first function expansion circuit 203 via the input buffer 201. The input address signal is supplied to the internal decoder 211 and the external decoder 212. As a result, the chip select signal from the internal decoder 211 is input / output to / from the serial data synchronization clock generation unit 214, the D / A register selector 215, the D / A data WR circuit 216, the D / A data RD circuit 217, and the data bus. Selector 218, internal data input unit 2
19, the OUT port 220, the IN port 221, the FG pulse counter 222, and the I / O port 223. The chip select signal from the external decoder 212 is sent to the ROM 13 via the output buffer 202.
2, the RAM 133, the mechanism controller 136, and the laser drive circuit 139.

The data signal from the printer CPU 131 is sent to the first function expansion circuit 2 via the input buffer 201.
After being supplied to the input / output selector 218 of the data bus in 03, the motor control circuit 134, the input circuit 135, the mechanism control unit 136, the voltage supply circuit 138, the laser drive circuit 13 from the OUT port 220 via the output buffer 202.
9. It is output to the large-capacity feeder 47 as a drive on / off signal.

The signals from the sensors of the circuits in the printer unit 130 supplied via the output buffer 202 are input to the IN port 221 and the data bus input / output selector 21.
8, output to the printer CPU 131 via the OUT port 220 and the output buffer 202.

The I / O port 223 is connected to the mechanism controller 136.
This is a port for communicating with another CPU in the above, and the communication method is 8-bit parallel. The FG pulse counter 222 inputs a pulse wave for grasping the rotation state sent from the motor control circuit 134, which is supplied via the output buffer 202, divides the frequency of the pulse wave, and divides the frequency by the printer via the output buffer 202. It is output to the CPU 131.

The first function expansion circuit 203 has a D / A serial controller 224 in addition to the above ports. 8-bit serial data is generated from the data sent from the D / A register selector 215, and the reference voltage data and the serial data latch that determine the magnitude of the voltage output to the voltage supply circuit 138 via the output buffer 202 are latched. A signal (serial data divided into 8 bits) is output. Further, a signal that divides the signal divided by the latch signal into 1-bit units is output from the serial data synchronization clock generation unit 214 to the voltage supply circuit 138 via the output buffer 202.

Serial data synchronization clock generation unit 214
The input buffer 20 receives a reference clock from an oscillator (not shown) and a reset signal from a reset circuit (not shown).
It is supplied via 1.

The write signal from the printer CPU 131 is sent to the D / A WR via the input buffer 201.
Generator 213, OUT port 220, I / O port 22
3 is being supplied.

As a result, the OUT port 220, I / O
The port 223 outputs a signal in synchronization with the write signal. Further, the read signal from the printer CPU 131 is supplied to the input / output selector 218 of the data bus via the input buffer 201.

The second function expansion circuit 204 in the function expansion device 200 performs a function expansion process for the main CPU 161 (including the control panel CPU 111), and as shown in FIG. Decoder 231, external decoder 232, DSP-LEDW
R generation unit 233, DSP-LEDWR circuit 234, serial data synchronization clock generation unit 235, data bus input / output selector 236, OUT port 237, DSP-L
It is composed of an ED selector 238 and a DSP-LED serial controller 239, and operates as an OUT port, a display LED serial control, and an internal / external decoder according to an address bus, a data bus, a read / write and a clock signal of an input signal. It is supposed to do.

That is, the address signal from the main CPU 161 is input to the second function expansion circuit 204 via the input buffer 201. The input address signal is supplied to the internal decoder 231 and the external decoder 232. As a result, the chip select signal from the internal decoder 231 is sent to the DSP-LEDWR generation unit 23.
3, supplied to the input / output selector 236 of the data bus.
The chip select signal from the external decoder 232 is sent to the ROM 112, R via the output buffer 202.
AM113, control panel 114, ROM16
2, ROM 163, printer font ROM 164, display font ROM 165, data switching / buffer memory 166, and image processing unit 167.

The OUT port 237 is connected to the output buffer 20.
It is connected to an error status check device (not shown) via 2 and the error content is indicated by 8-bit data. Also, the data bus input / output selector 236 and the DSP-LED
The data bus that has passed through the selector 238 is connected to the DSP-L.
It is converted into an 8-bit serial signal by the ED serial control unit 239 and output to the control panel 114 via the output buffer 202. At the same time, a latch signal that divides the serial signal into 8-bit units and a clock signal that further divides the serial signal into 1-bit units are generated by the signal from the serial data synchronization clock generation unit 235 and output to the control panel 114 via the output buffer 202. are doing.

Serial data synchronization clock generator 234
The input buffer 20 receives a reference clock from an oscillator (not shown) and a reset signal from a reset circuit (not shown).
It is supplied via 1.

The write signal from the main CPU 161 is sent to the DSP-LED via the input buffer 201.
It is supplied to the WR generation unit 233 and the OUT port 237. As a result, the OUT port 237 outputs a signal in synchronization with the write signal.

Further, in this embodiment, the LED lighting of the control panel 114 adopts the dynamic lighting method. In this case, since there are two lines, two lighting switching signals for 0 line and 1 line are also used for the DSP-L.
The output buffer 2 is generated by the ED serial control unit 239.
02 to the control panel 114.

[0082]

As described above, it is possible to realize the expansion function of a plurality of CPUs for controlling different processes with one type of device having a small number of pins and to suppress the increase in cost. A device and an electronic device can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a function expansion device for explaining an embodiment of the present invention.

FIG. 2 is a flowchart for explaining the overall operation.

FIG. 3 is a sectional view showing the configuration of a digital copying machine according to the present invention.

FIG. 4 is a block diagram showing an internal configuration of a digital copying machine.

FIG. 5 is a block diagram illustrating a specific example of a first function expansion circuit.

FIG. 6 is a block diagram illustrating a specific example of a second function expansion circuit.

[Explanation of symbols]

 200 ... Function expansion device 201 ... Input buffer 202 ... Output buffer 203 ... First function expansion circuit 204 ... Second function expansion circuit

Claims (4)

[Claims] 1. A plurality of function expanding means for individually performing function expansion for various CPUs, and one of the function expanding means for receiving data and signals from the CPU according to a switching signal from the CPU. A first output means for selectively outputting, and a second output means for selectively receiving and outputting data and signals from the function expansion circuit according to a switching signal from the CPU. A function expansion device for a CPU. 2. A first function expansion circuit for performing a first function expansion for a CPU, a second function expansion circuit for performing a second function expansion for a CPU different from the CPU, and a switching signal from the CPU. In response to an input buffer that receives data or a signal from the CPU and selectively outputs the data or signal to the first function expansion circuit or the second function expansion circuit, and in accordance with a switching signal from the CPU, A function expansion device for a CPU, comprising: an output buffer for selectively receiving and outputting data and signals from the first function expansion circuit or data and signals from the second function expansion circuit. . 3. A first CPU for controlling various processes
A second CPU for controlling various processes different from the first CPU; a plurality of first processing means for executing processes for the control of the first CPU; and a second CPU for the second CPU. A plurality of second processing means for executing processing for control; a first function expansion means for performing a first function expansion for the first CPU; and a second function expansion for a second CPU. In response to a switching signal from the second function expanding means and the first CPU, data or a signal from the first CPU is received and output to the first function expanding means, or the second CPU. An input buffer for receiving data and signals from the second CPU and outputting them to the second function expanding means in response to a switching signal from the first C;
In response to the switching signal from the PU, the data or signal from the first function expanding means is received and output to the first processing means, or the data or signal from the second function expanding means is received. An electronic device comprising: a CPU function expansion device having an output buffer for outputting to the second processing means. 4. A first CPU for controlling various processes
A second CPU for controlling various processes different from the first CPU; a plurality of first processing circuits for executing processes for the control of the first CPU; and a second CPU for the second CPU. A plurality of second processing circuits that execute processing for control, a first function expansion circuit that performs a first function expansion for the first CPU, and a second function expansion that performs a second function expansion for the second CPU. In response to a switching signal from the second function expansion circuit and the first CPU, data or a signal from the first CPU is received and output to the first function expansion circuit, or the second CPU. An input buffer for receiving data and signals from the second CPU and outputting them to the second function expansion circuit in response to a switching signal from the first C;
In response to the switching signal from the PU, the data or signal from the first function expansion circuit is received and output to the first processing circuit, or the data or signal from the second function expansion circuit is received. An electronic device, comprising: a CPU function expansion device having an output buffer for outputting to the second processing circuit.