JPH08251198A - Multiplex transmission device - Google Patents

Abstract

PURPOSE: To efficiently multiplex and transmit input information whose input speed varies independently for every channel. CONSTITUTION: The input information of each input channel 1 is held in an incoming line buffer 2, and the length of the held information of each channel is counted by a channel control part 3, and the information of each channel is read out by actuating the read-out of the number of times corresponding to this count value for each incoming line buffer 2 by a multiplex control part 6, and a multiplex frame consisting of an information part in which this information of each channel is arrayed and a header part in Which the information length of each channel is shown is constituted. Then, a fixed length packet flow is generated from this multiplex frame and is transmitted to a receiving part 16 by a communication control part 7, and the multiplex frame is re-constituted from the received fixed length packet by a line receiving part 9. Thus, this multiplex frame is separated into the information of each channel by a demultiplexing part 10, and this information is distributed to each corresponding output channel 13.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplexing transmission device for transmitting and receiving information by multiplexing information in voice communication, data communication, etc., and then transmitting by dividing it into packets, cells and the like. .

[0002]

2. Description of the Related Art FIG. 3 is a block diagram showing the structure of a conventional multiplex transmission apparatus.

In FIG. 3, 21-1, 21-2, 21
-3, ..., 21-n are input channels (incoming lines),
Digital information to be multiplexed and transmitted by this device is input.

The transmitter 33 includes an incoming line buffer 22, a data bus 23, a multiplexing controller 24, and a frame clock generator 2.
5 and the line sending unit 26.

22-1, 22-2, 22-3, ..., 22
An input line buffer n is provided corresponding to each input channel 21, and sequentially holds information input from the input channel 21 in a FIFO format (First-In First-Out method).

A data bus 23 connects each input line buffer 22 and the multiplex control unit 24. Reference numeral 25 is a frame clock generator, which generates clocks at regular intervals and inputs this clock to the multiplexing controller 24.

Reference numeral 24 denotes a multiplex control unit, which synchronizes with a clock input from the frame clock generation unit 25 to sequentially perform a certain number of read operations on each input line buffer 2 to thereby obtain information on each channel. Data bus 23
The information is read via the channel, a multiplexed frame is constructed from the information of each channel, and the multiplexed frame is sent to the line sending unit 26.

Reference numeral 26 is a line sending unit, which is a multiplex control unit 24.
The multiplexed frame configured by is divided to generate a fixed length packet (cell), and the fixed length packet (cell) is transmitted to the communication line 32.

Next, the receiving section 34 includes a line receiving section 27, a demultiplexing section 28, a data bus 29, and an outgoing line buffer 30.
Composed of

A line receiving unit 27 receives fixed length packets sent from the sending unit 33 from the communication line 32 and reconstructs a multiplexed frame.

Reference numeral 28 is a demultiplexing unit, which is a line receiving unit 27.
The information of each channel is demultiplexed from the multiplexed frame reconstructed by and the corresponding output channel (outgoing line) 3
1 is delivered via the data bus 29 and the outgoing line buffer 30.

A data bus 29 is a demultiplexing unit 28.
To mediate the distribution of information from the outgoing line buffer 30 to the outgoing line buffer 30.

30-1, 30-2, 30-3, ..., 30
-N is an output line buffer, which is provided for each channel, holds the information of each channel output from the demultiplexing unit 28 in the FIFO format, and outputs it to the corresponding output channel 31.

31-1, 31-2, 31-3, ..., 31
-N is an output channel (outgoing line), and the information of each channel held in each outgoing line buffer 30 is sent out.

Next, the operation of the multiplex transmission apparatus having the above configuration will be described. In the transmission unit 33, digital information such as audio coding information is input from each input channel 21 at a constant speed. The information input speed is the same between channels. Input information is input line buffer 2
2 are sequentially written and held in

The frame clock generating section 25 generates a clock at a constant interval and inputs this clock to the multiplexing control section 24 to notify the multiplexing control section 24 of the timing which is a trigger for forming a multiplexed frame.

The multiplex control section 24 notified of the clock
Input line buffer 22 for each channel via data bus 23
For a predetermined number of times, the information stored in each input line buffer 22 is read within a unit clock time, and a multiplexed frame is constructed from the information of each channel. In this multiplexed frame, fixed length information of each channel is stored in the order of channels from the beginning.

The multiplexed frame formed by the multiplexing control unit 24 is transmitted to the line transmission unit 26, and the line transmission unit 2
Reference numeral 6 divides the multiplexed frame in order from the beginning and maps it as an information part of a fixed-length packet, and adds a header part to this information part to generate a fixed-length packet stream.
Send to.

Next, in the receiver 34, the line receiver 27
Receives a fixed length packet stream from the communication line 33 and reconstructs a multiplexed frame from each information part of the fixed length packet. The reconstructed multiplexed frame is demultiplexed by the demultiplexing unit 28.
Sent to

The demultiplexing unit 28 demultiplexes the multiplexed frame into information for each channel, and outputs the corresponding output channel 31.
Deliver to.

The information distributed by the demultiplexer 28 is sent to the output channel 31 after being held in the output line buffer 30 via the data bus 29.

[0022]

However, in the above-mentioned conventional multiplex transmission apparatus, when the input speed of information from each input channel changes independently for each channel, the multiplex control section 24 performs a read operation. However, since the length of the information held in the incoming line buffer 22 differs for each channel at the time of performing the above, there is a problem that the input information cannot be multiplexed and transmitted.

The present invention solves such a conventional problem, and multiplex transmission can be efficiently performed even for variable length input information due to the input speed changing independently for each channel. It is an object of the present invention to provide an integrated transmission device.

[0024]

In order to achieve the above-mentioned object, the present invention provides buffer means which is provided for each input channel and holds input information, and information of each channel which is held in the buffer means. Counting means for counting the length, clock generating means for generating a clock at a constant interval, and each of the buffer means based on the count value by the counting means in synchronization with the clock input from the clock generating means. Multiplexing control means for constructing a multiplexed frame, which is composed of an information section in which channel information is read out, information of each channel is arranged, and a header section having information length data indicating the length of information of each channel; The fixed length block is generated by dividing the frame to generate a fixed length block, and transmitting means for transmitting the fixed length block to the communication line. Receiving means for reconstructing the multiplexed frame by receiving from the communication line, and information of each channel is separated from the information section based on the information length data of the header section of the reconstructed multiplexed frame, The demultiplexing means for delivering to the channel is provided in the receiving section.

[0025]

Therefore, according to the present invention, in the transmitting section, the information inputted from each input channel is held in the buffer means, and the length of the information of each channel held in the buffer means is counted by the channel control means. , The multiplexing control means, in synchronization with the clock input from the clock generation means, based on the count value by the channel control means,
The information of each channel is read from the buffer means, a multiplexed frame composed of an information part in which the information of each channel is arranged and a header part having information length data is constructed, and a fixed length block is formed from this multiplexed frame by the transmitting means. While generating and transmitting, the receiving unit reconfigures the multiplexed frame from the fixed-length block received by the receiving unit, and the demultiplexing unit reconstructs the multiplexed frame based on the information length data indicated in the header unit of the multiplexed frame. By separating the information of each channel from the information section and distributing it to the destination channel, it is possible to efficiently multiplex and transmit the input information in which the input speed changes independently for each channel.

[0026]

1 is a block diagram showing the structure of a multiplex transmission apparatus according to an embodiment of the present invention.

In FIG. 1, 1-1, 1-2, 1-3,
, 1-n are input channels (incoming lines), and digital information whose input speed changes independently for each channel is input.

The transmitting section 15 includes an incoming line buffer 2, a channel control section 3, a data bus 4, a control bus 5, a multiplexing control section 6,
And the line sending unit 7.

Numerals 2-1, 2-2, 2-3, ..., 2-n are input line buffers, which are provided corresponding to the respective input channels 1 and which receive the information inputted from the respective input channels 1 in the FIFO format. Hold sequentially.

A frame clock generator 8 generates clocks at regular intervals and inputs this clock to the channel controller 3 and the multiplexing controller 6.

Channel control units 3-1, 3-2, 3-3, ..., 3-n are provided for each input channel 1 and the length of information of each channel held in the input line buffer 2 is held. The count value is sequentially counted, and this count value is given to the multiplex control unit 6 via the control bus 5 in synchronization with the clock input from the frame clock generation unit 8.

Reference numeral 4 is a data bus, and each input line buffer 2
And mediates the exchange of data between the multiplex control unit 6.

Reference numeral 5 is a control bus for each channel control unit 3
And mediates exchange of control data between the multiplex control unit 6 and the control unit 6.

Reference numeral 6 denotes a multiplexing control unit, which sequentially performs a read operation for each input line buffer 2 in synchronization with the clock input from the frame clock generation unit 8 according to the count value by the channel control unit 3. By doing so, the information of each channel is read out through the data bus 4, a multiplexed frame is constructed from this information of each channel, and is sent to the line sending unit 7.

A line sending unit 7 divides the multiplexed frame formed by the multiplexing control unit 6 to generate a fixed length packet (cell) and sends it to the communication line 14.

Next, the receiving unit 16 comprises a line receiving unit 9, a demultiplexing unit 10, a data bus 11, and an outgoing line buffer 12.

Reference numeral 9 denotes a line receiving unit, which receives the fixed length packet transmitted by the transmitting unit 15 from the communication line 14,
A multiplexed frame is reconstructed from this fixed length packet.

A demultiplexing unit 10 demultiplexes the information of each channel from the multiplexed frame reconstructed by the line receiving unit 9 and delivers it to the corresponding output channel 13 via the data bus 11.

Reference numeral 11 is a data bus, and the demultiplexer 10
To mediate the distribution of information from each channel to the outgoing line buffer 12 of each channel.

12-1, 12-2, 12-3, ..., 12
-N is an output line buffer, which is provided for each channel, holds the information demultiplexed by the demultiplexing unit 10 and delivered to each channel in the FIFO format, and outputs it to the output channel 13.

13-1, 13-2, 13-3, ..., 13
-N is an output channel (outgoing line), and the information of each channel held in each outgoing line buffer 12 is sent out.

Next, the operation of the multiplex transmission apparatus having the above configuration will be described. In the transmitting unit 15, digital information such as encoded information of voice whose input speed changes independently for each channel is input from each input channel 1.

The input information is FI stored in the incoming line buffer 2.
It is sequentially written and held according to the FO format. The length of the information held in the incoming line buffer 2 is sequentially counted by each channel control unit 3.

The frame clock generator 8 generates clocks at regular intervals and inputs the clocks to the channel controller 3 and the multiplexing controller 6 to form a multiplexed frame in which the input information of each channel is arranged. The timing that becomes the trigger is the channel control unit 3 and the multiplexing control unit 6.
To notify.

Each channel control unit 3 sequentially counts the length of the information of each channel held in the incoming line buffer 2,
When the clock is notified from the frame clock generator 8, the count value of the information length is sequentially notified to the multiplexing controller 6 via the control bus 5.

The multiplex control unit 6 notified of the clock from the frame clock generation unit 8 performs a channel read operation for each input line buffer 2 according to the count value of the information length notified from the channel control unit 3. By sequentially performing this, the variable length information of each channel is read out via the data bus 4, and the read variable length information of each channel and the count value of the information length by the channel control unit 3 constitute a multiplexed frame.

FIG. 2 shows a block diagram of a multiplexing frame formed by the multiplexing controller 6. In the figure, the multiplexed frame is composed of a header section 17 and an information section 18. In the header section 17, a multiplexed information length indicating the length of information of each channel multiplexed in the information section 18 in the order of channels for all channels is shown. The data is stored. Information length = 0 is written for a channel having no information to be multiplexed, indicating that the information of this channel is not included in the information section 18. Further, an error detection code for the information in the header section 17 is added in preparation for a code error in the transmission path.

The information section 18 stores, for each channel, information for the length indicated by the multiplex information length data of the header section 17 in order from the head to the channel.

Returning to FIG. 1, the multiplexed frame formed by the multiplexing control unit 6 is transmitted to the line transmission unit 7, and the line transmission unit 7 divides this multiplexed frame in order from the beginning and fixes the fixed-length packet (cell). ) As the information part of
A header portion is added to this information portion to generate a fixed length packet stream, which is sent to the communication line 14.

Next, in the receiving unit 16, the line receiving unit 9
Receives a fixed length packet stream from the communication line 14 and reconstructs a multiplexed frame. The reconfigured multiplexed frame is transmitted to the demultiplexing unit 10.

The demultiplexing section 10 demultiplexes the information section 18 of the multiplexed frame into information for each channel according to the multiplexed information length data of the header section 17 of the multiplexed frame, and sends it to each corresponding output channel 13. To deliver.

The information distributed by the demultiplexer 10 is sent to the output channel 13 after being held in the output line buffer 12 via the data bus 11.

As described above, according to the above embodiment, the transmitter 1
5, the information input from each input channel 1 is held in the input line buffer 2, the length of the information of each channel held in the input line buffer 2 is counted by the channel control unit 3, and each information is input by the multiplexing control unit 6. By performing a read operation on the input line buffer 2 a number of times according to the count value by the channel controller 3, the variable length information of each channel is read in the channel order for each unit time, and the information of each channel is read. A multiplexed frame composed of an information section 18 stored in the order of channels and a header section 17 having multiplexed information length data indicating the information length of each channel in the order of channels is formed, and the line control section 7 fixes the multiplexed frame from the multiplexed frame. A long packet stream is generated and transmitted to the reception unit 16. On the other hand, in the receiving unit 16, the line receiving unit 9 reconstructs a multiplexed frame from the received fixed-length packet, and the demultiplexing unit 10 follows the multiplexed information length data of the header unit 17 of this multiplexed frame to transmit the information unit. By separating 18 into information for each channel and distributing to each corresponding output channel 13, variable-length input information can be efficiently multiplexed and transmitted by independently varying the input speed for each channel. .

[0054]

As is apparent from the above-described embodiment of the present invention, the transmitting section holds the information input from each input channel in the input line buffer and counts the length of the information held in each input line buffer. By performing the read operation a number of times corresponding to this count value to each input line buffer in the channel order, the variable length information of each channel is read in the channel order per unit time, and the information of each channel is stored in the channel order. A multiplexed frame composed of an information part and a header part having multiplexed information length data indicating the information length of each channel in the order of channels is formed, and a fixed length packet stream is generated from this multiplexed frame and transmitted to the receiving part. on the other hand,
The receiving section reconstructs the multiplexed frame from the received fixed-length packet, separates the information of each channel from the information section according to the multiplexed information length data of the header section of this multiplexed frame, and distributes it to the corresponding output channels. By doing so, it is possible to efficiently multiplex and transmit the input information whose input rate changes independently for each channel.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a multiplex transmission apparatus according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a multiplexed frame according to an embodiment of the present invention.

FIG. 3 is a block diagram showing a schematic configuration of a conventional multiplex transmission device.

[Explanation of symbols]

1-1, 1-2, 1-3, ..., 1-n Input channel (incoming line) 2-1, 2-2, 2-3, ..., 2-n Incoming line buffer 3-1, 3-2, 3-3, ..., 3-n Channel control unit 4 Data bus 5 Control bus 6 Multiplexing control unit 7 Line sending unit 8 Frame clock generating unit 9 Line receiving unit 10 Demultiplexing unit 11 Data bus 12-1, 12-2, 12-3, ..., 12-n Outgoing line buffer 13-1, 13-2, 13-3, ..., 13-n Output channel (outgoing line)

Claims (1)

[Claims] 1. A transmitting unit forms a multiplexed frame from variable length information input from each input channel, divides the multiplexed frame into fixed length blocks and transmits the fixed length blocks, and a receiving unit receives the fixed length. A multiplexing transmission device configured to reconfigure a multiplexed frame from blocks, separate variable length information of each channel from this multiplexed frame, and deliver it to a destination channel. Buffer means for holding input information, counting means for counting the length of information of each channel held in the buffer means, clock generation means for generating clocks at fixed intervals, and input from the clock generation means Information of each channel is read from the buffer means on the basis of the count value by the counting means in synchronization with the clock Multiplexing control means for forming a multiplexed frame composed of an information part in which channel information is arranged and a header part having information length data indicating the length of information of each channel, and a fixed length block by dividing the multiplexed frame. And transmitting means for transmitting the fixed-length block to the communication line, the receiving unit for receiving the fixed-length block from the communication line and reconstructing the multiplexed frame; A multiplexing transmission apparatus, wherein the receiving section is provided with a demultiplexing means for separating information of each channel from the information section based on the information length data of the header section of the constructed multiplexed frame and delivering the information to the destination channel.