JPH08249702A - Optical disk device and pulse width control circuit - Google Patents

Abstract

PURPOSE: To precisely control pulse width continuously by controlling the pulse width of output pulse signal with an error voltage between the mean value level of an input pulse signal and the mean value level of the output pulse signal. CONSTITUTION: A drive signal S4 is constituted so that its signal level is changed synchronizing with the fall edge of the recording data D4, and its pulse width decided by an error voltage signal DC1 is generated by a nono-multi- vibrator circuit 31, and thus, the pulse width is controlled by varying the error voltage signal DC1. The error voltage signal DC1 is formed by that the means value level DC3 of the drive signal S4 is subtracted from the means value level DC2 of the recording data D4 after they are multiplied respectively by control voltages DK1, DK2. Consequently, a feedback loop is formed as a whole, and the pulse width of the derive signal S4 is controlled by the pulse width decided by the control voltages DK1, DL2 so that the error voltage signal DC1 becomes 0(V).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical disk device and a pulse width control circuit, for example, when a drive signal is generated from a recording data train and a laser diode is driven by this drive signal to record on a disk-shaped recording medium. The pulse width of this drive signal is variably controlled continuously and with high accuracy.

[0002]

2. Description of the Related Art Conventionally, in a write-once type optical disk device of this type, when writing, a trial writing area on the optical disk is used to set a laser light amount for writing and a pulse width. The desired data can be surely recorded and reproduced.

That is, in an optical disk applied to this type of optical disk device, an organic dye film is formed on a polycarbonate substrate by spin coating, a reflective film is subsequently formed by vapor deposition, and a plastic protective film is subsequently arranged. Formed. On the other hand, in this type of optical disk device, a laser beam is applied to the optical disk to thermally change the organic dye, thereby locally breaking the reflective film to form pits and recording desired data. .

Therefore, in this type of optical disk, the size of the pits formed changes depending on the sensitivity of the organic dye to the laser beam, the light amount of the laser beam, the ambient temperature, and the like, compared to the period during which the laser beam is irradiated. That is, when the laser beam is irradiated, if the ambient temperature is high, or if the sensitivity of the organic dye is high, the organic dye film undergoes a rapid thermal change, and a large pit is formed as compared with the period when the laser beam is irradiated. . On the contrary, when the ambient temperature is low, or when the sensitivity of the organic dye is low, the thermal change of the organic dye film becomes slow, and in this case, small pits are formed as compared with the period when the laser beam is irradiated.

For this reason, this type of optical disk device forms pits in the trial writing area according to the prescribed conditions, then selects an appropriate laser light amount based on the reproduction result of the pits, and writes the laser beam light amount for writing. The period for raising the light intensity is selected, and data is sequentially recorded under these selected conditions.

In setting the recording conditions in this way, the period during which the light quantity of the laser beam rises to the light quantity at the time of writing is set by the drive signal generation circuit 1 including a pulse width control circuit as shown in FIG. It

That is, as shown in FIG. 6, when data to be recorded is input from an external device such as a computer, this optical disc apparatus adds an error correction code or the like to the data according to a prescribed format and then encodes the data. The print data D1 (FIG. 6A) is processed to generate the print data D1, and the print data D1 is input to the drive signal generation circuit 1.

The drive signal generating circuit 1 is used for recording data D
1 is input to the delay line 2 with taps and also to the AND circuit 3. This delay line with tap 2
Is formed by a lumped-constant delay circuit in which an inductance L and a capacitor C are connected in a ladder shape and a termination is terminated by a resistor R. The input signal is regulated sequentially from the midpoint of connection between the inductance L and the capacitor C. It is formed to output a tap output delayed by a time.

The drive signal generation circuit 1 selectively inputs these tap outputs to the AND circuit 3 via the selection circuit 4 to generate the recording data D1 and the tap output delayed with respect to the recording data D1. Input to the AND circuit 3. As a result, the drive signal generation circuit 1 causes the recording data D1
Drive signal S1 whose signal level falls only during a period T determined by the delay time of the tap output corresponding to the logic level of
(FIG. 6B) is generated.

As a result, the optical disk device switches the contact of the selection circuit 4 based on the reproduction result of the trial writing area to switch the period T to adjust the pulse width of the drive signal S1. It is designed to drive a diode.

[0011]

However, the pulse width control circuit for controlling the pulse width by switching the tap output in this way has a problem that it is difficult to set the pulse width continuously, and the accuracy is also poor. There's a problem.

Further, since the delay line 2 with taps is formed by connecting the inductance L and the capacitor C in a ladder shape, there is a drawback that it is difficult to reduce the size.
As a result, this type of pulse width control circuit also has a problem inevitably increasing in size.

Therefore, in the optical disk device to which this pulse width control circuit is applied, there are drawbacks that the overall shape becomes large and it is difficult to set the writing condition with high accuracy.

The present invention has been made in consideration of the above points, and a pulse width control circuit capable of controlling the pulse width continuously and with high accuracy and miniaturizing the entire shape, and An optical disc device to which a pulse width control circuit is applied is proposed.

[0015]

In order to solve such a problem, according to the present invention, an optical disk device is provided which generates a drive signal from a recording data string generated from input data and switches the light quantity of a laser beam according to the drive signal. , An error voltage detecting means for detecting an error voltage between the average value level of this recording data string and the average value level of the drive signal, and the signal level changes in synchronization with the rising edge or falling edge of this recording data string. And a pulse signal generating means for generating a previous drive signal whose pulse width changes according to the previous error voltage.

At this time, the pulse signal generating means is
When not writing, the drive signal is generated by a dummy signal whose logic level is switched in a prescribed cycle instead of the recording data string, and the error voltage detecting means previously described averages the recording data string except when writing. Instead of the value level, the previous error voltage is generated based on the average value level of the previous dummy signal.

Further, in place of this, the pulse signal generating means generates a drive signal by a dummy signal whose logic level is switched at a regular cycle instead of the recording data string except when writing, and the error voltage is generated. The detecting means generates an error voltage based on the average value level of the dummy signal, instead of the average value level of the recording data string, except when writing, and holds the immediately preceding error voltage when writing. Or the average value level of the drive signal immediately before and the average value level of the dummy signal are held to generate and output the error voltage.

Further, error voltage detecting means for detecting an error voltage between the average value level of the input pulse signal and the average value level of the output pulse signal, and the signal level in synchronization with the rising edge or falling edge of the input pulse signal. And a pulse signal generating means for generating an output pulse signal whose pulse width changes according to the error voltage.

Further, at this time, the error voltage detecting means previously detects the error voltage before the period in which the average value level of the input pulse signal is held at a constant value during the period in which the average value level of the input pulse signal changes. It is configured to hold and output.

Alternatively, the preceding pulse signal generating means interposes a dummy signal whose logical level is switched at a prescribed cycle into the preceding input pulse signal, and the rising edge of the input pulse signal obtained by interposing the dummy signal. After generating a pulse signal whose signal level changes in synchronization with the edge or falling edge and whose pulse width changes according to the previous error voltage, remove the pulse due to the dummy signal that precedes this pulse signal. It is configured to generate the above output pulse signal.

[0021]

According to the present invention, the error voltage detecting means for detecting the error voltage between the average value level of the record data string and the average value level of the drive signal, and the signal level changes in synchronization with the rising edge or the falling edge of the record data string. And a pulse signal generating means for generating a drive signal whose pulse width changes according to the error voltage, the drive signal is a feedback loop formed by the error voltage detecting means and the pulse signal generating means. Thus, the pulse width is controlled so that the signal level of the error voltage becomes 0 level. Therefore, if necessary, the gain at the time of detecting the error voltage is varied, and the average value level at the time of detecting the error voltage and the error voltage itself are level-shifted. The pulse width of the drive signal can be changed according to the above.

At this time, except at the time of writing, instead of the recording data string, a drive signal is generated by a dummy signal whose logic level is switched at a regular cycle, and the average value level of the recording data string is replaced by the above-mentioned driving signal. If the previous error voltage is generated based on the average value level of the dummy signal, the feedback loop can be operated in the same manner as during writing, other than during writing when the logical level of the recording data string is held at a constant value.

Further, except when writing, a drive signal is generated by a dummy signal whose logic level is switched in a prescribed cycle in place of the recording data string, and the dummy value of the previous dummy is used instead of the average value level of the recording data string. If the previous error voltage is generated based on the average value level of the signal, the pulse width of the drive signal can be controlled with reference to the dummy signal except when writing. Therefore, at the time of writing, the error voltage immediately before is held and output, or the average value level of the immediately previous drive signal and the average value level of the dummy signal are held and an error voltage is generated and output. Even if the average value level of the recording data string varies, the pulse width of the drive signal can be controlled under a constant condition.

Also, by applying it to a pulse width control circuit, the error voltage between the average value level of the input pulse signal and the average value level of the output pulse signal is detected and synchronized with the rising edge or falling edge of this input pulse signal. Then, if an output pulse signal whose signal level changes and whose pulse width changes according to the previous error voltage is generated, this output pulse signal is controlled by the feedback loop so that the signal level of the error voltage becomes 0 level. , The pulse width will be controlled. Therefore, if necessary, the gain at the time of detecting the error voltage is varied, and the average value level at the time of detecting the error voltage and the error voltage itself are level-shifted. The pulse width of the output pulse signal can be changed according to the above.

Further, at this time, during the period in which the average value level of the input pulse signal changes, the error voltage in the period in which the average value level of the input pulse signal is held at a constant value is held and output. The pulse width of the output pulse signal can be controlled under a certain condition even when the average value level of the output pulse signal changes.

Alternatively, after a dummy signal whose logic level is switched in a prescribed cycle is inserted in the input pulse signal to generate a pulse signal by the pulse signal generating means, a pulse generated by the dummy signal is generated from the generated pulse. If the output pulse signal is generated by removing it, the feedback loop can be operated even during a period in which the signal level of the input pulse signal is maintained at a constant level.

[0027]

Embodiments of the present invention will be described in detail below with reference to the drawings.

(1) First Embodiment FIG. 2 is a block diagram showing an optical disk device according to an embodiment of the present invention. The optical disk device 10 is connected to an external device such as a computer via an interface circuit (not shown), and in response to a request from the external device,
Input data D2 input from the external device is recorded on the optical disc 11, and the data recorded on the optical disc 11 is read and output to the external device.

The optical disc 11 is a so-called write-once type optical disc, and after an organic dye film is formed on a polycarbonate substrate by spin coating,
Subsequently, a reflection film is formed by vapor deposition, and subsequently, a plastic protective film is arranged and formed. As a result, in the optical disk 11, the reflection film is locally destroyed by the laser beam to form pits, and desired data can be recorded by the pits.

Further, the optical disk 11 is formed with pits (that is, pre-pits) in advance in the circumferential direction at regular intervals, and the pre-pits are used as a reference for rotational driving at a regular rotational speed by a so-called sample servo method. The pre-pit is used as a reference so that the positional information of the laser beam irradiation position can be detected.

Further, the optical disc 11 is formed with a trial writing area on the inner circumference side of the information recording surface, and the trial writing area is used to select a writing condition such as a laser beam light amount for writing. It is designed to be able to.

The optical pickup 12 emits a laser beam L1 to the optical disc 11 from a built-in laser diode 13, and the laser beam L1 is focused on an information recording surface of the optical disc 11 by an objective lens 14. Further, the optical pickup 12 collects the return light L2 obtained from this information recording surface by the objective lens 14 and receives it by a built-in photo detector via a predetermined optical system. Here, the photodetector is formed by dividing the light-receiving surface and outputs the output signal S3 of each light-receiving surface.

In the configuration of the optical pickup 12 as described above, the laser diode 13 emits one of the two laser beams emitted from both ends of the diode chip toward the above-mentioned objective lens 14. At the same time, the other laser beam is received by the photodetector housed in the same package, and the photodetector outputs the detection signal SAP which is the light quantity detection result of the laser beam L1.

As a result, the laser diode 13 is formed so as to be able to detect the light quantity of the laser beam L1 by the so-called rear monitor method, and in the optical disk device 10, the so-called automatic light quantity control (APC: APC: An automatic power control circuit is formed so that the light quantity of the laser beam L1 can be set to a prescribed light quantity.

The head amplifier 15 amplifies a plurality of output signals S3 obtained by receiving the return light L2 with a predetermined gain and outputs the amplified output signals S3. The optical disk device 10 outputs the output signals of these head amplifiers 15 by a matrix circuit (not shown). A tracking error signal whose signal level changes according to the tracking error amount, a focus error signal whose signal level changes according to the focus error amount, and a reproduction signal RF whose signal level changes according to the amount of return light. To generate.

As a result, in the optical disk device 10, the objective lens 14 is moved horizontally and vertically based on the tracking error signal and the focus error signal to perform tracking control and focus control.

The reproduction signal processing circuit 16 receives the reproduction signal R.
The reproduced clock is detected from F. As a result, in the optical disk device 10, the spindle motor 18 is driven so that the frequency of the reproduction clock becomes the specified frequency, and the optical disk 11 is rotationally driven at the specified rotational speed. In the optical disk device 10, a system clock is generated based on this reproduction clock, and the entire operation is controlled by this system clock.

Further, the reproduction signal processing circuit 16 binarizes the reproduction signal RF to generate reproduction data composed of serial data, and then decodes the reproduction data at a prescribed timing with reference to the reproduction clock. As a result, the reproduction signal processing circuit 16 uses the pre-pits in advance for the optical disc 1
The address data AD recorded in 1 is reproduced, and this address data AD is output to the controller unit 17. As a result, in the optical disc device 10, the controller unit 17 can detect the laser beam irradiation position based on the address data AS.

Further, the reproduction signal processing circuit 16 is
After decoding the reproduced data obtained by binarization, the data D3 recorded on the optical disk 11 is reproduced by executing error correction processing and the like, and the reproduced data D3 is controlled by the controller unit 17 according to the regulation. Output from the interface circuit.

On the other hand, the asymmetry detection circuit 19
Detects the asymmetry AS of the reproduction signal in the trial writing area and outputs it to the controller unit 17. Here, the asymmetry AS represents a ratio of periods in which the laser beam is applied to the pit and the land when the optical disk 11 is irradiated with the laser beam, and in this embodiment, the reference level of the regulation and the reproduction signal RF are set. According to the comparison result of 1), the period during which the signal level of the reproduction signal RF exceeds the reference level is counted and detected during the prescribed period.

As a result, in the optical disc device 10, after forming the pit train in the trial writing area under the prescribed conditions, the reproducing operation is started to detect the asymmetry AS of the pit train, and the detected asymmetry AS is used as a reference. The result of the trial writing is judged and the writing condition can be further selected.

The controller section 17 has a microcomputer for controlling the overall operation of the optical disk device 10, and switches the overall operation in response to a request from an external device input via the interface circuit. That is, when the power of the optical disk device 10 is turned on, the controller unit 17 performs the optical pickup 12 with the prescribed timing.
Is moved to the trial writing area of the optical disc 11. Subsequently, the controller unit 17 drives the recording system of the optical disk device 10 to switch the light amount of the laser beam L1 stepwise to form a pit row in the trial writing area.

Further, the controller unit 17 subsequently drives the reproducing system to reproduce the pit train, and the asymmetry A at each light quantity of the laser beam L1 from the pit train.
Detect S. As a result, the controller unit 17 selects a writing light amount and a period during which the light amount of the laser beam L1 is raised to the writing light amount from the asymmetry AS, and when a writing command is input from an external device, the selected conditions are selected. The recording system is driven to record the input data D2 that is sequentially input.

At the time of this recording, the controller unit 17 controls the address data A output from the reproduction signal processing circuit 16.
Various timing signals are generated from a built-in timing generator on the basis of D, a reproduction clock, etc., and the optical disc device 10 drives the recording system on the basis of this timing signal.

The encoder 20 adds an error correction code, a header, a synchronization word, etc. to the input data D2 input from an external device via the interface circuit in a specified block unit, and then encodes and outputs it. As a result, this input data D2 is converted into recording data D4 which is serial data suitable for recording on the optical disc 11. In this embodiment, the encoder 20 uses the NRZ (No
n Return to Zero) code is used to generate the recording data D4.

The drive signal generation circuit 21 varies the pulse width of the recording data D4 according to the conditions set by the controller section 17 to generate the drive signal S4. Further, the drive signal generation circuit 21 generates the drive signal S4 in the trial writing area by using the trial writing data output from the controller unit 17 instead of the recording data D4.

The drive circuit 22 raises the light amount of the laser beam L1 from the light amount for reproduction to the light amount for writing in accordance with the signal level of the drive signal S4. At this time, the drive circuit 22 controls the light amount detection signal SAP of the laser beam L1.
With reference to, the laser diode 13 is driven by so-called automatic light amount control.

At the time of this light amount control, the drive circuit 22 switches the light amount for writing step by step at the time of trial writing in accordance with the control data DP output from the controller section 17, while the actual data recording is performed. At some time, the laser diode 13 is driven so that the optimum light amount set by the controller unit 17 is obtained.

As a result, in the optical disk device 10, in the drive circuit 22 and the drive signal generation circuit 21, respectively,
The writing light amount of the laser beam L1 and the period for rising to this writing light amount are set, the optimum writing conditions are detected during the trial writing, and the detected optimum writing conditions are detected during the recording. Is used to record the input data D2.

As shown in FIG. 1, in the drive signal generation circuit 21 for controlling the pulse width at the time of writing in this way, the recording data D4 is input to the selection circuit 30 and the training signal STR is input. Selection circuit 3
The 0 contact is switched by the control signal SW.

Here, as shown in FIG. 3, this control signal S
W (FIG. 3A) is generated by the controller unit 17 on the basis of the address data AD so that the signal level falls when the laser beam L1 is irradiated to the area for writing. Also the training signal STR
(FIG. 3B) is based on the clock used to generate the recording data D4 so that the signal level changes in synchronization with the recording data D4 (FIG. 3C) with a duty ratio of 50%. And is generated by the controller unit 17.

As a result, when the laser beam L1 is applied to the area for writing, the selection circuit 30 switches the contact point from the training signal STR to the recording data D4, and the training signal STR and the recording data D4 become continuous. The selection output signal S5 (FIG. 3 (D)) is output.

The drive signal generation circuit 21 inputs this selection output signal S5 to the mono-multi circuit 31. The mono-multi circuit 31 inputs the selection output signal S5 to a NAND circuit 32 connected so as to operate as an inverter circuit, and inputs the output signal of the NAND circuit 32 and the selection output signal S5 to an AND circuit 33 that follows. input. As a result, the mono-multi circuit 31 effectively uses the delay time of the NAND circuit 32 to detect the falling edge of the selection output signal S5 (FIG. 3 (E)).

The mono-multi circuit 31 inputs the output signal S6 of the AND circuit 33 to the base of the NPN transistor 35 via the resistor 34. The transistor 35 has its emitter directly grounded and its base grounded by a grounding resistor 36. In the mono-multi circuit 31, a series circuit of a resistor 37 and a capacitor 38 is arranged between the power supply VCC and ground, and the collector of the transistor 35 is connected to the connection midpoint of this series circuit.

As a result, the mono-multi circuit 31 has the resistance 3
7 and the capacitor 38 form an integrator circuit, and the transistor 35 forms a switch circuit for controlling this integrator circuit. When the signal level of the output signal S6 rises, the transistor 35 is switched to the ON state to store the accumulated charge in the capacitor 38. To discharge the output signal S
When the signal level of 6 falls, the transistor 35 is turned off and the terminal voltage of the capacitor 38 rises according to the time constant determined by the resistor 37 and the capacitor 38 (FIG. 3 (F)).

As a result, the mono-multi circuit 31 sharply drops the terminal voltage V7 of the capacitor 38 in synchronization with the falling edge of the selection output signal S5, and then, with the time constant determined by the resistor 37 and the capacitor 38, Terminal voltage V7
Is gradually set up.

The mono-multi circuit 31 outputs the terminal voltage V7 of the capacitor 38 to the subsequent NPN transistor 41 via the resistor 40. This transistor 41
Is designed so that the emitter is directly grounded and the collector is connected to the power supply VCC through the resistor 42.

As a result, the transistor 41 is turned on when the base voltage rises above the base-emitter voltage VBE, and the collector voltage is lowered to almost 0 [V] (FIG. 3 (G)). Further, subsequently, when the base voltage falls below the base-emitter voltage VBE, it is switched to the off state, and the collector voltage is changed to the power supply voltage VBE.
It is designed to launch in CC.

Further, the mono-multi circuit 31 is formed so that the error voltage DC1 is input to the base of the transistor 41, whereby the base voltage of the transistor 41 is changed by the error voltage DC1. Therefore, the collector voltage V8 of the transistor 41 changes according to this error voltage DC1 in the period from when it falls to almost 0 [V] to when it rises to the power supply voltage VCC,
In this embodiment, this period is adjusted by the error voltage DC1 to control the period for raising the light amount of the laser beam L1 to the writing light amount.

The inverter circuit 44 inputs the collector output of the transistor 41, and outputs the inverted output S9 (FIG. 3 (H)) of the collector output. As a result, in the mono-multi circuit 31, the signal level falls through the inverter circuit 44 in synchronization with the falling edge of the selection output signal S5, and then the signal level rises after a lapse of a period determined by the error voltage DC1. A mono-multi output signal S9 is output.

The selection circuit 46 has one input end connected to the power supply VC.
When it is connected to C and the mono-multi output signal S9 is input to the other input terminal and is driven by the control signal SW so that the laser beam L1 is applied to the area to be written, the mono-multi output is output from the power supply VCC side. The contact is switched to the signal S9 side.

As a result, in the drive signal generation circuit 21, the drive signal S4 rises after a lapse of a period determined by the error voltage DC1 after the signal level falls following the fall of the logical level of the recording data D4. (FIG. 3 (I)) is output.

In order to do so, the optical disk device 10
During the period when the signal level of the drive signal S4 falls,
Laser beam L from the light quantity for reproduction to the light quantity for writing
The laser diode 13 is driven by the drive circuit 22 so that the light amount of 1 is switched, whereby the error voltage D
By varying C1, the period during which the light amount of the laser beam L1 is switched to the writing light amount can be adjusted.

Further, the drive signal generating circuit 21 includes a resistor 49.
And the average value level DC2 of the selection output signal S5 (see FIG.
(J)) is detected, and this average value level DC2 is input to the error amplification section 51.

Similarly, the drive signal generating circuit 21 uses the low-pass filter formed by the resistor 52 and the capacitor 53 to average the average level DC3 of the mono-multi output signal S9.
(FIG. 3 (K)) is detected, and this average value level DC3 is input to the error amplification section 51.

In the error amplification section 51, the multiplication circuits 55 and 56 amplify the average value levels DC2 and DC3 according to the control voltages DK1 and DK2 output from the controller section 17, respectively. The subtraction circuit 57 subtracts the output voltages of the multiplication circuits 55 and 56 to generate an error voltage DC.
1 is detected and the error voltage DC1 is output via the resistor 58.

As a result, in the drive signal generating circuit 21, a feedback loop is formed as a whole, and the mono-multi output signal S9 is the average value level DC of the selection output signal S5.
For 2,

[Equation 1] So that the average value level represented by the relational expression is obtained, that is, the error voltage DC1 becomes 0 [V] (see FIG.
(L)), the pulse width is controlled.

Here, the control voltages DK1 and D
As for K2, the default value of the regulation is output by the controller unit 17 at the time of trial writing, whereas at the time of writing, the default value is corrected by the asymmetry AS detected by this trial writing, and the controller unit is corrected. It is designed to be output by 17.

As a result, in the optical disc device 10, the control voltages DK1 and DK2 are varied to vary the pulse width of the drive signal S4, and the period during which the laser beam L1 rises to the writing light amount is controlled. In this way, by forming a feedback loop by the mono-multi circuit 31 and varying the pulse width of this drive signal S4, it is possible to effectively avoid an increase in the overall size of the case where a delay line with a tap is used,
This period can be controlled stably.

By controlling this period by the error voltage DC1, the drive signal S4 is continuously and highly accurately produced.
The pulse width of can be changed. Therefore, in the optical disk device 10, desired data can be surely recorded / reproduced by setting the writing condition with high accuracy.

Further, the recording data D2 and the training signal S
By switching and inputting TR, in the drive signal generating circuit 21, the feedback loop can be operated so as to satisfy the relational expression (1) even when not writing. Therefore, in the optical disc device 10, when the entire operation is switched to the writing operation, the drive signal S which is immediately set to the target pulse width
4 can be obtained stably and surely.

In the above configuration, the optical disk device 10
Moves the optical pickup 12 to the trial writing area of the optical disk 11 at a timing of the rule, sequentially forms a pit row here, then reproduces the pit row to detect the asymmetry AS, and the writing condition from the asymmetry AS. Is selected.

On the other hand, the input data D2 input from the external device is converted into the specified recording data D4 by the encoder 20, and the laser diode 13 is driven by the drive signal S4 generated from this recording data D4. Thereby, the light quantity of the laser beam L1 is switched from the light quantity for reproduction to the light quantity for writing corresponding to the recording data D4, and pits are sequentially formed on the optical disc 11.
The recording data D4 is recorded on the optical disc 11.

At the time of forming this pit, the recording data D4 is
In the drive signal generation circuit 21, the pulse width is variably controlled according to the condition selected by the trial writing, and the drive signal S
4, and the light amount for writing is set by the drive circuit 22 according to the conditions selected by the trial writing,
As a result, the data is recorded on the optical disk 11 under the optimum writing condition.

The drive signal S4 changes in signal level in synchronization with the falling edge of the recording data D4 and is generated by the mono-multi circuit 31 to have a pulse width determined by the error voltage DC1. Then, the pulse width can be controlled.

Further, the error voltage DC1 is formed by subtracting after multiplying the average value level DC3 of the drive signal S4 and the average value level DC2 of the recording data D4 by the control voltages DK1 and DK2 in the error amplifying section 51, respectively. As a result, a feedback loop is formed as a whole, and the pulse width of the drive signal S4 is controlled to the pulse width determined by the control voltages DK1 and DK2 so that the error voltage DC1 becomes 0 [V].

As a result, in the controller section 17,
By setting the control voltages DK1 and DK2 according to the conditions selected by the trial writing, the drive signal S4 is generated by the pulse width selected by the trial writing, and the light amount of the laser beam L1 is reproduced by this pulse width. To the writing light amount, and the recording data D4 is recorded under the optimum condition.

Further, when generating the drive signal S4,
At times other than writing, the contacts of the selection circuits 30 and 46 are switched, the error voltage DC1 is generated by the training signal STR instead of the recording data D4, and the feedback loop is held in the same state as at the time of writing. When switched to the operation, the drive signal S4 is promptly generated with a prescribed pulse width.

According to the above-mentioned structure, the pulse width of the drive signal S4 is controlled by the feedback loop based on the average value level of the recording data D4 and the drive signal S4, and the error voltage DC1 for controlling this feedback loop is adjusted. By setting the pulse width, the pulse width can be controlled continuously and with high accuracy, and the overall shape can be reduced.

When the writing signal is input instead of the recording data D4 except when writing, the feedback loop can be held in the writing state. When the writing operation is switched to, the feedback loop can be quickly changed. It is possible to generate the drive signal S4 with a prescribed pulse width and record the recording data D4 under optimum conditions.

(2) Second Embodiment In the recording data D4 by the NRZ code,
Since the frequency band is widely distributed from DC, the recordable band of the optical disk 11 can be effectively utilized to improve the recording density.

However, in the drive signal generating circuit 21 described above, the average value level DC2 of the recording data D4 is increased accordingly.
Is large and changes at a low frequency. For example, the pulse width can be controlled at a constant ratio when the logical level of the recording data D4 falls at a large time interval and when it falls at a short time interval. It can be difficult.

In this case, by selecting the characteristics of the low-pass filter formed by the resistor 49 and the capacitor 50 and the low-pass filter formed by the resistor 52 and the capacitor 53, it is possible to improve this difficult control situation. Therefore, the configuration of these low-pass filters becomes complicated and the design becomes difficult.

Therefore, in this embodiment, as shown in FIG. 4, the hold circuit 60 holds the error voltage DC1 at the timing when the control signal SW falls, and the selection circuit 30 selects the recording data D4. During the period, the base voltage of the transistor 41 is controlled by the held error voltage DC1. In FIG. 4, the same components as those in the first embodiment (FIG. 1) described above are designated by the corresponding reference numerals, and the duplicated description will be omitted.

As a result, in this embodiment, the training signal STR whose average value level of the selection output signal S5 does not change is selectively input to the selection output signal S5 which is the input pulse signal input to the drive signal generating circuit. The feedback loop is operated only during a certain period, and the average value level of the selection output signal S5 is maintained at a constant value during the period when the recording data D4 in which the average value level of the selection output signal S5 changes is selectively input. The error voltage DC1 in the previous period is held and output, and even if the average value level of the selection output signal S5 changes, the pulse width of the drive signal is controlled under a certain condition.

Incidentally, in the optical disk by the sample servo, when the recording data D4 is recorded, the address data AD (FIG. 2) by the pre-pits is detected at a constant cycle. In this case, the address data AD is detected at the cycle. Even when the pulse width is controlled by the feedback loop formed and the error voltage DC1 held by the feedback loop, the pulse width can be controlled reliably and with high accuracy.

According to the configuration shown in FIG. 4, the error voltage DC1 immediately before is held and the pulse width of the drive signal S4 is controlled during the period in which the recording data D4 is selectively input from the selection circuit 30. For the selected output signal S5 input to the drive signal generation circuit, the pulse width can be controlled by forming a feedback loop only during the period in which the average value level of the selected output signal S5 does not change. Even when the average value level of 1 changes significantly, the pulse width can be controlled with high accuracy by a simple configuration.

(3) Other Embodiments In the above embodiment, the control signal DK1 is used.
, And DK2 are varied to vary the pulse width of the drive signal S4, the present invention is not limited to this, and any one of the control signals DK1 and DK2 may be varied to vary the pulse width. Good and error voltage DC1,
The pulse width may be varied by level shifting the average value level DC2 and / or DC3.

In addition to these, the training signal S
The pulse width may be roughly changed by switching the duty ratio of TR.

Further, in the above-described second embodiment, the case where the error voltage DC1 is held has been described, but the present invention is not limited to this, and by holding the average value levels DC2 and DC3, the error is indirectly caused. The voltage DC1 may be held.

Further, in the above-described embodiment, the case where the training signal STR having the duty ratio of 50% is used has been described, but the present invention is not limited to this, and the pulse width may be controlled according to need. Duty ratio 50
It may be set to a value other than [%].

Further, in the above-mentioned embodiments, the case where the clock used for generating the recording data D4 is used as the training signal STR has been described, but the present invention is not limited to this, and for example, the variable range of the pulse width is reduced. In addition, when the adjustment accuracy is further improved, the time constant of the mono-multi circuit 31 can be reduced and the frequency of the training signal can be set to a higher frequency.

Further, in the above-described embodiment, the case where the recording data D4 and the training signal STR are switched and input to the feedback loop formed by the mono-multi circuit 31 and the error amplifying section 51 has been described. However, the training signal STR alone is input to the feedback loop to form an error voltage, and the error voltage is used to drive the mono-multi circuit separately to record data D.
The pulse width of 4 may be controlled.

Alternatively, when controlling the pulse width of a pulse signal whose signal level continuously changes, the input of the training signal STR may be omitted if necessary.

Further, in the above embodiment, the case where the pulse width of the recording data D4 composed of the NRZ code is controlled has been described, but the present invention is not limited to this, and the EFM (Eight to Eight to).
It can be widely applied to the control of the pulse width of pulse signals generated by various modulation methods such as Fourteen Modulation).

Further, in the above-mentioned embodiment, the case where the pulse width of the drive signal S4 is controlled by asymmetry has been described, but the present invention is not limited to this, and the light quantity of the laser beam L1 is raised to the light quantity for writing. The present invention can be widely applied in the case of controlling the pulse width by changing the light amount of the returning light at that time, and further in the case of controlling the pulse width by various parameters such as the internal temperature.

Further, in the above-mentioned embodiment, the case where the light quantity is controlled together with the pulse width of the laser beam L1 has been described, but the present invention is not limited to this, and can be applied to the case where only the pulse width is controlled.

Furthermore, in the above-mentioned embodiment, the case where the present invention is applied to the so-called sample servo type optical disk device has been described, but the present invention is not limited to this, and for example, by a pre-groove which is a groove for guiding a laser beam. The present invention can be widely applied to optical disk devices and the like that execute processing such as tracking control.

Further, in the above-mentioned embodiment, the case where the present invention is applied to the write-once type optical disk device has been described, but the present invention is not limited to this, and may be applied to an optical disk device which records data by thermomagnetic recording. Can be applied. Further, it is not limited to an optical disc device for recording data on an optical disc, but for a pulse width control of various electronic devices such as a data recording device for irradiating various recording media with a laser beam to record desired data, and further a data transmission device. It can be widely applied.

[0100]

As described above, according to the present invention, the error voltage is controlled by controlling the pulse width of the output pulse signal by the error voltage between the average value level of the input pulse signal and the average value level of the output pulse signal. Can be adjusted effectively to prevent the overall shape from becoming large, and the pulse width can be controlled continuously and with high accuracy.

[Brief description of drawings]

FIG. 1 is a block diagram showing a drive signal generation circuit of an optical disc device according to an embodiment of the present invention.

2 is a block diagram showing an optical disk device to which the drive signal generation circuit of FIG. 1 is applied.

FIG. 3 is a signal waveform diagram for explaining the operation of the drive signal generation circuit of FIG.

FIG. 4 is a block diagram showing a drive signal generation circuit according to another embodiment.

FIG. 5 is a block diagram showing a conventional drive signal generation circuit.

FIG. 6 is a signal waveform diagram for explaining the operation of the drive signal generation circuit of FIG.

[Explanation of symbols]

 1, 21 Drive signal generation circuit 10 Optical disk device 11 Optical disk 13 Laser diode 17 Controller section 20 Encoder 22 Drive circuit 30, 46 Selection circuit 31 Mono-multi circuit 51 Error amplification section

Claims (6)

[Claims] 1. A drive signal whose signal level changes in accordance with a logical level of the recording data string after converting input data into a recording data string in a prescribed format,
In an optical disk device for switching the light amount of a laser beam according to the signal level of the drive signal and irradiating the disk-shaped recording medium with the input data, the average value level of the recording data string, An error voltage detection unit that detects an error voltage with respect to the average value level of the drive signal, a signal level that changes in synchronization with a rising edge or a falling edge of the recording data string, and a pulse width according to the error voltage. And a pulse signal generating means for generating the drive signal that changes. 2. The pulse signal generating means generates the drive signal by a dummy signal whose logic level is switched at a regular cycle, instead of the recording data string, except when writing, and detects the error voltage. 2. The optical disk device according to claim 1, wherein the means generates the error voltage based on the average value level of the dummy signal instead of the average value level of the recording data string, except during writing. 3. The pulse signal generating means generates the drive signal by a dummy signal whose logic level is switched at a regular cycle, instead of the recording data string, except when writing, and detects the error voltage. The means generates the error voltage according to the average value level of the dummy signal instead of the average value level of the recording data string except when writing, and holds the immediately previous error voltage when writing. 2. The optical disk device according to claim 1, wherein the error voltage is generated by outputting or holding the average value level of the drive signal and the average value level of the dummy signal immediately before. 4. An error voltage detecting means for detecting an error voltage between an average value level of an input pulse signal and an average value level of an output pulse signal, and a signal synchronized with a rising edge or a falling edge of the input pulse signal. A pulse width control circuit comprising: a pulse signal generation unit that generates the output pulse signal whose level changes and whose pulse width changes according to the error voltage. 5. The error voltage detection means holds the error voltage during a period in which the average value level of the input pulse signal is held constant during the period in which the average value level of the input pulse signal changes. The pulse width control circuit according to claim 4, wherein the pulse width control circuit outputs the pulse width control circuit. 6. The pulse signal generating means inserts a dummy signal whose logical level is switched in a prescribed cycle into the input pulse signal, and a rising edge or a falling edge of the input pulse signal in which the dummy signal is inserted. A pulse signal whose signal level changes in synchronization with an edge and whose pulse width changes according to the error voltage is generated, and then the pulse generated by the dummy signal is removed from the pulse signal to generate the output pulse signal. The pulse width control circuit according to claim 4, wherein