JPH08249585A - Signal transmission circuit - Google Patents

Signal transmission circuit

Info

Publication number
JPH08249585A
JPH08249585A JP7049913A JP4991395A JPH08249585A JP H08249585 A JPH08249585 A JP H08249585A JP 7049913 A JP7049913 A JP 7049913A JP 4991395 A JP4991395 A JP 4991395A JP H08249585 A JPH08249585 A JP H08249585A
Authority
JP
Japan
Prior art keywords
signal
line
switching element
signal transmission
circuit section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7049913A
Other languages
Japanese (ja)
Other versions
JP3405489B2 (en
Inventor
Atsushi Tarui
淳 樽井
Akira Furukawa
晃 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP04991395A priority Critical patent/JP3405489B2/en
Publication of JPH08249585A publication Critical patent/JPH08249585A/en
Application granted granted Critical
Publication of JP3405489B2 publication Critical patent/JP3405489B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE: To provide a signal transmission circuit with which the grounding defect or power feeding defect of a signal input circuit part can be detected on the side of a signal output circuit part. CONSTITUTION: A signal output circuit part 1 is provided with a switching element 15 for output and a resistor 17 mutually parallelly connected between a ground line 12 and a signal line 2, and the signal output circuit part 1 transmits signals through the signal transmission line 2 to a signal input circuit part 3 under the control of the switching element 15 for output. The signal input circuit part 3 is provided with a switching element 33 for load and resistors 34 and 35 connected between a power source line 31 and the signal line 2 and supplies a load current to the signal transmission line 2. The signal input circuit part 3 is provided with a voltage dividing circuit composed of voltage dividing resistors 36 and 37 serially connected and arranged between the power source line 31 and a ground line 32 and this voltage dividing circuit stops power supply from the switching element 33 for load to the signal transmission line 2 by cutting off the switching element 33 for load when the ground line 32 is disconnected. As the result, even when the switching element 15 for output is turned off, the signal transmission line 2 is turned to a low level by the resistor 17.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、少なくとも信号出力回
路部から信号入力回路部へ信号を伝送する信号伝送回路
に関する。本発明の信号伝送回路は、信号入力回路部か
ら信号出力回路部へ接地不良警報信号を伝送することが
でき、また、信号入力回路部側における接地不良発生時
に信号伝送線に給電される負荷電流を遮断して電力の節
約を実現することができる。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal transmission circuit for transmitting a signal from at least a signal output circuit section to a signal input circuit section. The signal transmission circuit of the present invention can transmit a grounding failure alarm signal from the signal input circuit section to the signal output circuit section, and the load current supplied to the signal transmission line when grounding failure occurs on the signal input circuit section side. It is possible to cut off the power to realize power saving.

【0002】[0002]

【従来の技術】実開平5−92736号公報は、一対の
信号伝送線を通じて信号出力回路部から信号入力回路部
へ信号を伝送するに際し、上記信号伝送線対の低電位側
のラインを信号入力回路部側において抵抗を通じて接地
する。このようにすれば、信号伝送線対の少なくとも一
方が断線するとこの抵抗の電圧降下が0となるので信号
伝送線の断線を検出することができる。
2. Description of the Related Art Japanese Utility Model Laid-Open No. 5-92736 discloses that when a signal is transmitted from a signal output circuit section to a signal input circuit section through a pair of signal transmission lines, a signal on the low potential side of the signal transmission line pair is input. Ground on the circuit side through a resistor. With this configuration, when at least one of the pair of signal transmission lines is broken, the voltage drop of this resistance becomes 0, so that the disconnection of the signal transmission line can be detected.

【0003】特開平5−294167号公報は、一本の
信号伝送線と、電源線と接地線との間に配設されるとと
もに信号伝送線を通じて信号を出力する信号出力回路部
と、電源線と接地線との間に配設されるとともに信号伝
送線を通じて信号を受け取る信号入力回路部とを有し、
信号出力回路部が、接地線と信号線との間に互いに並列
に接続される出力用スイッチング素子及び抵抗素子を有
し、信号入力回路部が、電源線と信号線との間に接続さ
れる抵抗素子を有する信号伝送回路を開示している。こ
の回路によれば、信号伝送線の断線時には出力用スイッ
チング素子の遮断にもかかわらず信号出力回路部の出力
端(信号伝送線接続端)が低電位となるので、それを信
号出力回路部で検出することができる。
Japanese Unexamined Patent Publication No. 5-294167 discloses a signal transmission line, a signal output circuit section which is arranged between a power line and a ground line, and outputs a signal through the signal transmission line, and a power line. And a signal input circuit section that receives a signal through a signal transmission line while being disposed between the ground line and
The signal output circuit unit has an output switching element and a resistance element connected in parallel to each other between the ground line and the signal line, and the signal input circuit unit is connected between the power supply line and the signal line. A signal transmission circuit having a resistance element is disclosed. According to this circuit, when the signal transmission line is broken, the output end (signal transmission line connection end) of the signal output circuit section becomes a low potential despite the interruption of the output switching element. Can be detected.

【0004】[0004]

【発明が解決しようとする課題】上述したように、信号
伝送線の断線(導通不良)は従来技術により良好に検出
することができる。しかしながら、信号入力回路部側に
おける接地線の導通不良、すなわち、信号入力回路部の
接地不良は上記した従来技術では信号出力回路部側で検
出することができなかった。
As described above, the disconnection (defective conduction) of the signal transmission line can be satisfactorily detected by the conventional technique. However, in the above-mentioned conventional technique, the signal output circuit unit side cannot detect the ground line continuity defect on the signal input circuit unit side, that is, the ground fault of the signal input circuit unit.

【0005】また、このような異常状態でも信号伝送線
の電位固定のために信号伝送線へ無駄な電流が流れ、電
力の無駄な消費が生じた。本発明は上記問題点に鑑みな
されたものであり、信号入力回路部の接地不良又は給電
不良を信号出力回路部側で検出可能な信号伝送回路を提
供することを、その目的としている。
In addition, even in such an abnormal state, useless current flows through the signal transmission line to fix the potential of the signal transmission line, resulting in wasted power consumption. The present invention has been made in view of the above problems, and an object thereof is to provide a signal transmission circuit capable of detecting a grounding failure or a power feeding failure of a signal input circuit unit on the signal output circuit unit side.

【0006】また本発明は、上記信号入力回路部の接地
不良や給電不良が生じた場合の無駄な電力消費を節約可
能な信号伝送回路を提供することを、その他の目的とし
ている。
Another object of the present invention is to provide a signal transmission circuit capable of saving wasteful power consumption in the case where the signal input circuit section has a ground failure or a power supply failure.

【0007】[0007]

【課題を解決するための手段】本発明の第1の構成は、
信号伝送線と、電源線と接地線との間に配設されるとと
もに前記信号伝送線を通じて信号を出力する信号出力回
路部と、前記電源線と前記接地線との間に配設されると
ともに前記信号伝送線を通じて前記信号を受け取る信号
入力回路部とを有し、前記信号出力回路部が、前記電源
線及び前記接地線の一方と前記信号線との間に互いに並
列に接続される出力用スイッチング素子及び抵抗素子を
有し、前記信号入力回路部が、前記電源線及び前記接地
線の他方と前記信号線との間に接続される負荷用スイッ
チング素子を含む負荷電流給電回路部と、前記信号入力
回路部側における前記電源線及び前記接地線の一方の導
通不良時に前記負荷用スイッチング素子を遮断する負荷
用スイッチング素子遮断回路部とを有することを特徴と
する信号伝送回路である。
The first structure of the present invention is as follows.
A signal transmission line, a signal output circuit unit that is provided between the power supply line and the ground line and outputs a signal through the signal transmission line, and is provided between the power supply line and the ground line. A signal input circuit section for receiving the signal through the signal transmission line, wherein the signal output circuit section is connected in parallel between one of the power supply line and the ground line and the signal line. A load current feeding circuit section including a switching element and a resistance element, wherein the signal input circuit section includes a load switching element connected between the other of the power supply line and the ground line and the signal line; A signal transmission circuit, comprising: a load switching element cutoff circuit section that cuts off the load switching element when one of the power supply line and the ground line on the signal input circuit section side fails in conduction. A.

【0008】なお、上記電源線は信号入力回路部側と信
号出力回路部側とで異なる電源電位をもつことができ
る。また、前記接地線の接地電位は本明細書では大地電
位でなくてもよく、前記電源電位より低い電位であれば
よい。本発明の第2の構成は、上記第1の構成において
更に、前記信号出力回路部が、前記信号伝送線の電位を
検出する電位検出回路部と、前記電位検出回路部で検出
された前記信号伝送線の電位に基づいて前記信号入力回
路部側における接地不良を検出する接地不良検出手段を
備えることを特徴としている。
The power supply line may have different power supply potentials on the signal input circuit section side and the signal output circuit section side. The ground potential of the ground line does not have to be the ground potential in this specification, and may be a potential lower than the power supply potential. According to a second configuration of the present invention, in addition to the first configuration, the signal output circuit section further includes a potential detection circuit section that detects a potential of the signal transmission line, and the signal detected by the potential detection circuit section. It is characterized in that grounding fault detection means for detecting a grounding fault on the side of the signal input circuit section based on the potential of the transmission line is provided.

【0009】本発明の第3の構成は、上記第2の構成に
おいて更に、前記接地不良検出手段が、前記出力用スイ
ッチング素子の遮断時に前記信号伝送線の電位がローレ
ベルである場合に、前記信号入力回路部の接地不良及び
給電不良を含む信号伝送不良状態発生と判定するもので
あることを特徴としている。本発明の第4の構成は、上
記第1から第3のいずれかの構成において更に、前記負
荷用スイッチング素子遮断回路部が、一端が前記電源線
に接続される第1分圧抵抗と、一端が前記接地線に接続
される第2分圧抵抗とからなる分圧回路とを有し、前記
両分圧抵抗の他端は前記負荷用スイッチング素子の制御
端子に接続され、前記負荷用スイッチング素子は前記電
源線の電位より低い電位が前記両分圧抵抗の他端から前
記制御端子に印加される時に導通するエミッタ接地又は
ソース接地のトランジスタからなることを特徴としてい
る。
A third structure of the present invention is the above-mentioned second structure, wherein the ground fault detecting means further comprises: when the potential of the signal transmission line is at a low level when the output switching element is cut off. The feature is that it is determined that a signal transmission failure state including a grounding failure and a power supply failure of the signal input circuit unit occurs. A fourth configuration of the present invention is the configuration according to any one of the first to third configurations, wherein the load switching element blocking circuit section further includes a first voltage dividing resistor having one end connected to the power supply line and one end. And a voltage dividing circuit including a second voltage dividing resistor connected to the ground line, the other ends of the two voltage dividing resistors being connected to the control terminal of the load switching element, and the load switching element. Is composed of a grounded-emitter or source-grounded transistor that conducts when a potential lower than the potential of the power supply line is applied to the control terminal from the other ends of the voltage dividing resistors.

【0010】本発明の第5の構成は、上記第1から第3
のいずれかの構成において更に、前記負荷用スイッチン
グ素子遮断回路部が、一端が前記接地線に接続され、他
端がバイポーラpnpトランジスタからなる前記負荷用
スイッチング素子の制御端子に接続されるベース電流規
制抵抗を備えることを特徴としている。本発明の第6の
構成は、上記第1から第3のいずれかの構成において更
に、前記負荷電流給電回路部が、前記負荷用スイッチン
グ素子と、前記負荷用スイッチング素子と直列接続され
た抵抗素子とを有することを特徴としている。
A fifth structure of the present invention is the above first to third structures.
In any one of the above configurations, the load switching element cutoff circuit unit further has a base current regulation in which one end is connected to the ground line and the other end is connected to a control terminal of the load switching element including a bipolar pnp transistor. It is characterized by having a resistor. According to a sixth aspect of the present invention, in the configuration according to any one of the first to third aspects, the load current feeding circuit section further includes the load switching element and a resistance element connected in series with the load switching element. It is characterized by having and.

【0011】[0011]

【作用及び発明の効果】本発明の第1の構成では、信号
出力回路部は、電源線及び接地線の一方と信号線との間
に互いに並列に接続される出力用スイッチング素子及び
抵抗素子を有し、信号出力回路部は出力用スイッチング
素子の制御により信号伝送線を通じて信号入力回路部に
信号を伝送する。信号入力回路部は、電源線及び接地線
の他方と信号線との間に接続される負荷用スイッチング
素子を含む負荷電流給電回路部を有し、負荷電流給電回
路部は出力用スイッチング素子の負荷素子として信号伝
送線に負荷電流を給電する。また、信号入力回路部は、
負荷用スイッチング素子遮断回路部を有し、この負荷用
スイッチング素子遮断回路部は、信号入力回路部側にお
ける電源線及び接地線の一方の導通不良時に負荷用スイ
ッチング素子を遮断する。
In the first configuration of the present invention, the signal output circuit section includes the output switching element and the resistance element connected in parallel with each other between one of the power line and the ground line and the signal line. The signal output circuit unit transmits a signal to the signal input circuit unit through the signal transmission line under the control of the output switching element. The signal input circuit unit has a load current feeding circuit unit including a load switching element connected between the other of the power supply line and the ground line and the signal line, and the load current feeding circuit unit is a load of the output switching element. A load current is supplied to the signal transmission line as an element. In addition, the signal input circuit unit,
The load switching element cutoff circuit section includes a load switching element cutoff circuit section, which cuts off the load switching element when one of the power supply line and the ground line on the signal input circuit section side is defective in conduction.

【0012】したがって、本構成によれば、信号入力回
路部の接地不良又は給電不良警報信号を信号出力回路部
へ伝送することができ、また、信号入力回路部側におけ
る上記不良発生時に信号伝送線に給電される負荷電流給
電回路部の負荷電流を遮断して電力の節約を実現するこ
とができる。本発明の第2の構成では、上記第1の構成
において更に、信号出力回路部が信号伝送線の電位に基
づいて信号入力回路部側における上記接地不良(又は給
電不良)を検出する接地不良検出手段を備えるので、こ
れら不良発生時の対策を講じることができる。
Therefore, according to this structure, the grounding failure or power supply failure alarm signal of the signal input circuit section can be transmitted to the signal output circuit section, and the signal transmission line is generated when the above-mentioned failure occurs on the signal input circuit section side. It is possible to save power by cutting off the load current of the load current feeding circuit section that is fed to the. In the second configuration of the present invention, in addition to the first configuration, the signal output circuit section detects the grounding failure (or the power supply failure) on the signal input circuit section side based on the potential of the signal transmission line. Since the means is provided, it is possible to take measures against these defects.

【0013】本発明の第3の構成では、上記第2の構成
において更に、接地不良検出手段が、出力用スイッチン
グ素子の遮断時に信号伝送線の電位がローレベルである
場合に、信号入力回路部の接地不良及び給電不良を含む
信号伝送不良状態発生と判定するので、上記第2の構成
を簡単に実現することができる。本発明の第4の構成で
は、上記第1から第3のいずれかの構成において更に、
負荷用スイッチング素子遮断回路部が、電源線と接地線
との間に配設される分圧回路の分圧をエミッタ接地又は
ソース接地のトランジスタからなる負荷用スイッチング
素子の制御端子に印加する。このようにすれば、信号入
力回路部の接地不良時に負荷用スイッチング素子が遮断
するので、第1の構成の作用効果を簡単に奏することが
できる。
In a third configuration of the present invention, in the second configuration, the ground fault detecting means further includes a signal input circuit section when the potential of the signal transmission line is at a low level when the output switching element is cut off. Since it is determined that the signal transmission failure state including the grounding failure and the power feeding failure has occurred, it is possible to easily realize the second configuration. According to a fourth configuration of the present invention, in any one of the first to third configurations described above,
The load switching element cutoff circuit section applies the voltage division of the voltage dividing circuit arranged between the power supply line and the ground line to the control terminal of the load switching element which is formed of a transistor with a grounded emitter or a source. With this configuration, since the load switching element is shut off when the signal input circuit section is grounded poorly, the function and effect of the first configuration can be easily achieved.

【0014】本発明の第5の構成では、上記第1から第
3のいずれかの構成において更に、負荷用スイッチング
素子遮断回路部が、一端が接地線に接続され、他端がバ
イポーラpnpトランジスタからなる前記負荷用スイッ
チング素子の制御端子に接続され、このバイポーラpn
pトランジスタのエミッタが電源線に接続される。この
ようにすれば、信号入力回路部の接地不良時に負荷用ス
イッチング素子が遮断するので、第1の構成の作用効果
を簡単に奏することができる。
In a fifth structure of the present invention, in addition to any one of the first to third structures, the load switching element interruption circuit section has one end connected to the ground line and the other end connected to a bipolar pnp transistor. Is connected to the control terminal of the load switching element
The emitter of the p-transistor is connected to the power supply line. With this configuration, since the load switching element is shut off when the signal input circuit section is grounded poorly, the function and effect of the first configuration can be easily achieved.

【0015】本発明の第6の構成では、上記第1から第
3のいずれかの構成において更に、負荷電流給電回路部
が、負荷用スイッチング素子と、負荷用スイッチング素
子と直列接続された抵抗素子とを有するので、信号出力
回路部側の上記抵抗素子の抵抗値及び出力用スイッチン
グ素子のオン抵抗に対して最適な負荷電流を簡単に信号
伝送線へ給電することができる。
According to a sixth aspect of the present invention, in any one of the first to third aspects, the load current feeding circuit section further includes a load switching element and a resistance element connected in series with the load switching element. Therefore, the optimum load current for the resistance value of the resistance element on the signal output circuit side and the on resistance of the output switching element can be easily supplied to the signal transmission line.

【0016】[0016]

【実施例】 (実施例1)以下、本発明の信号伝送回路の一実施例を
図1を参照して説明する。この信号伝送回路は、信号出
力回路部1と、信号伝送線2と、信号入力回路部3とか
らなり、信号伝送線2は信号出力回路部1の信号出力端
10と信号入力回路部3の信号入力端30とを接続して
いる。
[Embodiment 1] An embodiment of a signal transmission circuit according to the present invention will be described below with reference to FIG. This signal transmission circuit comprises a signal output circuit unit 1, a signal transmission line 2 and a signal input circuit unit 3, and the signal transmission line 2 includes a signal output terminal 10 of the signal output circuit unit 1 and a signal input circuit unit 3. It is connected to the signal input terminal 30.

【0017】信号出力回路部1は、電源+Bから出力側
の高位電源線11を通じて電源電圧を給電されるととも
に出力側の接地線12を通じて接地され、同様に、信号
入力回路部3は、電源+Bから入力側の高位電源線31
を通じて電源電圧を給電されるとともに入力側の接地線
32を通じて接地されている。信号出力回路部1は、C
PU13と、信号線電位検出回路部14と、出力用スイ
ッチング素子15と、電流制限抵抗16と、バイパス抵
抗17とからなる。出力用スイッチング素子15はオー
プンコレクタ形式のnpnバイポーラトランジスタであ
って、そのベースはベース電流制限抵抗rbを通じてC
PU13により制御され、そのエミッタは出力側の接地
線12に接続され、そのコレクタは信号出力端10に接
続されている。バイパス抵抗17は信号出力端10と出
力側の接地線12とを接続している。
The signal output circuit unit 1 is supplied with a power supply voltage from the power supply + B through the high-side power supply line 11 on the output side and is grounded through the grounding line 12 on the output side. To high-level power line 31 on the input side
A power supply voltage is supplied via the grounding line 32 on the input side. The signal output circuit unit 1 is C
It includes a PU 13, a signal line potential detection circuit unit 14, an output switching element 15, a current limiting resistor 16, and a bypass resistor 17. The output switching element 15 is an open collector type npn bipolar transistor whose base is C through a base current limiting resistor rb.
It is controlled by the PU 13, its emitter is connected to the ground line 12 on the output side, and its collector is connected to the signal output terminal 10. The bypass resistor 17 connects the signal output terminal 10 and the output side ground line 12.

【0018】信号線電位検出回路部14は、信号出力端
10の電圧を所定倍に増幅してCPU33に入力するオ
ペアンプ増幅回路からなる。信号入力回路部3は、エミ
ッタが入力側の電源線31に接続され、コレクタが電流
制限抵抗34、35を通じて信号入力端30に接続され
るpnpバイポーラトランジスタからなる負荷用スイッ
チング素子33を有し、負荷用スイッチング素子33の
ベースはベース電流制限抵抗rb及び分圧抵抗36を通
じて入力側の電源線31に接続され、かつ、ベース電流
制限抵抗rb及び分圧抵抗37を通じて入力側の接地線
32に接続されている。ここで、負荷用スイッチング素
子33、抵抗34は本発明でいう負荷電流給電回路部を
構成し、抵抗36、37は本発明でいう負荷用スイッチ
ング素子遮断回路部を構成している。
The signal line potential detection circuit section 14 is composed of an operational amplifier amplifier circuit for amplifying the voltage of the signal output terminal 10 by a predetermined factor and inputting it to the CPU 33. The signal input circuit unit 3 includes a load switching element 33 having a pnp bipolar transistor whose emitter is connected to the power supply line 31 on the input side and whose collector is connected to the signal input terminal 30 through the current limiting resistors 34 and 35. The base of the load switching element 33 is connected to the input side power supply line 31 through the base current limiting resistor rb and the voltage dividing resistor 36, and is connected to the input side grounding line 32 through the base current limiting resistor rb and the voltage dividing resistor 37. Has been done. Here, the load switching element 33 and the resistor 34 form a load current feeding circuit section according to the present invention, and the resistors 36 and 37 form a load switching element cutoff circuit section according to the present invention.

【0019】電流制限抵抗34、35の接続点Ipは内
部信号線39を通じて信号入力回路部3の図示しないア
クチエータ回路部に上記信号を送出している。また、こ
のアクチエータ回路部は図示しない警報回路を内蔵して
おり、この警報回路は警報トランジスタ38を駆動制御
して信号線電位を変更して信号出力回路部1へ警報を発
信する機能を有している。更に説明すれば、警報トラン
ジスタ38は、オープンコレクタ形式のnpnバイポー
ラトランジスタからなり、そのエミッタは入力側の接地
線32に接続され、そのコレクタは接続点Ipに接続さ
れている。この警報トランジスタ38の動作については
本発明の要旨から離れるのでこれ以上の説明を省略す
る。
The connection point Ip between the current limiting resistors 34 and 35 sends the above signal to an actuator circuit section (not shown) of the signal input circuit section 3 through the internal signal line 39. Further, this actuator circuit section has a built-in alarm circuit (not shown), and this alarm circuit has a function of driving and controlling the alarm transistor 38 to change the signal line potential and transmitting an alarm to the signal output circuit section 1. ing. More specifically, the alarm transistor 38 is an open collector type npn bipolar transistor, the emitter of which is connected to the ground line 32 on the input side and the collector of which is connected to the connection point Ip. Since the operation of the alarm transistor 38 is far from the gist of the present invention, further description will be omitted.

【0020】次に、この信号伝送回路の動作を以下に説
明する。正常動作時において、負荷用スイッチング素子
33がオンして入力側の電源線31から信号伝送線2に
給電されている。CPU13は所定のPWM(パルス幅
変調)信号電圧を出力用スイッチング素子15に出力
し、出力用スイッチング素子15がオンすると信号伝送
線2の電位は所定のローレベルとなり、出力用スイッチ
ング素子15がオフすると信号伝送線2の電位はバイパ
ス抵抗17の電圧降下により規定される所定のハイレベ
ル電位となり、これらの電位が信号入力回路部3に伝送
される。
Next, the operation of this signal transmission circuit will be described below. During normal operation, the load switching element 33 is turned on and power is supplied from the power supply line 31 on the input side to the signal transmission line 2. The CPU 13 outputs a predetermined PWM (pulse width modulation) signal voltage to the output switching element 15, and when the output switching element 15 is turned on, the potential of the signal transmission line 2 becomes a predetermined low level and the output switching element 15 is turned off. Then, the potential of the signal transmission line 2 becomes a predetermined high-level potential defined by the voltage drop of the bypass resistor 17, and these potentials are transmitted to the signal input circuit unit 3.

【0021】いま、入力側の接地線32の導通不良又は
それと信号入力回路部3との接触不良が生じると、分圧
抵抗36、37の接続点の電位が上昇して負荷用スイッ
チング素子33が遮断され、これにより信号伝送線2は
バイパス抵抗17からの放電により接地電位となる。こ
の接地電位は信号線電位検出回路部14により検出され
てCPU13に入力される。
Now, when the grounding line 32 on the input side has a poor continuity or a poor contact between the grounding line 32 and the signal input circuit section 3, the potential at the connection point of the voltage dividing resistors 36 and 37 rises, and the load switching element 33 is activated. As a result, the signal transmission line 2 is brought to the ground potential due to the discharge from the bypass resistor 17. This ground potential is detected by the signal line potential detection circuit unit 14 and input to the CPU 13.

【0022】次に、CPU13による信号入力回路部3
の異常判定動作を図5のフローチャートを参照して説明
する。まず、出力用スイッチング素子15がオフしてい
るかどうかを、CPU13から出力用スイッチング素子
15へ出力する制御電圧の電位に基づいて判定し(10
0)、オンであれば待機するか又はメインルーチンへリ
ターンし、オフであれば所定時間待機(102)した
後、信号伝送線2の電位がロー(所定電位以下)である
かを信号線電位検出回路部14からの入力電圧に基づい
て判定する(104)。そして、ローであれば信号伝送
線2の断線又は信号入力回路部3の給電不良又は接地不
良と判定して警報を出力する。
Next, the signal input circuit section 3 by the CPU 13
The abnormality determination operation will be described with reference to the flowchart of FIG. First, it is determined whether the output switching element 15 is off based on the potential of the control voltage output from the CPU 13 to the output switching element 15 (10
0), if it is on, it waits or returns to the main routine, and if it is off, after waiting for a predetermined time (102), it is determined whether the potential of the signal transmission line 2 is low (below a predetermined potential). The determination is made based on the input voltage from the detection circuit unit 14 (104). If it is low, it is determined that the signal transmission line 2 is broken or that the signal input circuit unit 3 is not properly fed or grounded, and an alarm is output.

【0023】なお、上記した給電不良とは以下の場合を
意味する。すなわち、信号入力回路部3と入力側の電源
線31との接触が不良の場合又は入力側の電源線31が
断線した場合、負荷用スイッチング素子33を通じての
給電が停止するので、上記した接地不良と同じ原理で信
号出力回路部1で検出が可能となる。なお、電流制限抵
抗35、16は省略してもよい。 (実施例2)他の実施例を図2を参照して説明する。
The above-mentioned power supply failure means the following cases. That is, when the contact between the signal input circuit unit 3 and the power supply line 31 on the input side is defective or the power supply line 31 on the input side is broken, the power supply through the load switching element 33 is stopped, and thus the above-described grounding failure occurs. The signal output circuit unit 1 can detect the same principle. The current limiting resistors 35 and 16 may be omitted. (Embodiment 2) Another embodiment will be described with reference to FIG.

【0024】この実施例は実施例1において分圧抵抗3
6及び負荷用スイッチング素子のベース電流制限抵抗r
bを省略したものである。この場合にも実施例1と同じ
効果を奏することができる。 (実施例3)他の実施例を図3を参照して説明する。
In this embodiment, the voltage dividing resistor 3 is used in the first embodiment.
6 and base current limiting resistance r of switching element for load
b is omitted. Even in this case, the same effect as that of the first embodiment can be obtained. (Embodiment 3) Another embodiment will be described with reference to FIG.

【0025】この実施例は実施例1において、負荷用ス
イッチング素子33及び出力用スイッチング素子15を
構成するトランジスタの導電型を変更するとともに、負
荷用スイッチング素子33を信号伝送線2と入力側の接
地線32との間に接続し、出力用スイッチング素子15
を信号伝送線2と出力側の電源線11との間に接続した
ものであり、この場合にも実施例1と同様の作用効果を
奏する(入力側の電源線の導通不良又はそれと信号入力
回路部3との接触不良を検出する)ことができる。
This embodiment differs from the first embodiment in that the conductivity type of the transistors constituting the load switching element 33 and the output switching element 15 is changed, and the load switching element 33 is grounded on the signal transmission line 2 and the input side. It is connected between the line 32 and the output switching element 15
Is connected between the signal transmission line 2 and the power supply line 11 on the output side. In this case as well, the same operation and effect as those of the first embodiment can be obtained (conduction failure of the power supply line on the input side or it and the signal input circuit). It is possible to detect a poor contact with the portion 3).

【図面の簡単な説明】[Brief description of drawings]

【図1】 実施例1の信号伝送回路の回路図である、FIG. 1 is a circuit diagram of a signal transmission circuit according to a first embodiment,

【図2】 実施例2の信号伝送回路の回路図である、FIG. 2 is a circuit diagram of a signal transmission circuit according to a second embodiment,

【図3】 実施例3の信号伝送回路の回路図である、FIG. 3 is a circuit diagram of a signal transmission circuit according to a third embodiment,

【図4】 CPU13の異常検出動作を示すフローチャ
ートである。
FIG. 4 is a flowchart showing an abnormality detecting operation of the CPU 13.

【符号の説明】[Explanation of symbols]

1は信号出力回路部、2は信号伝送線、3は信号入力回
路部、11は出力側の電源線、12は出力側の接地線、
13はCPU(接地不良検出手段)、14は電位検出回
路部、15は出力用スイッチング素子、17はバイパス
抵抗(抵抗素子)、33は負荷用スイッチング素子(負
荷電流給電回路部の一部)、34は抵抗(負荷電流給電
回路部の残部)、36、37は分圧抵抗(負荷用スイッ
チング素子遮断回路部)。
1 is a signal output circuit unit, 2 is a signal transmission line, 3 is a signal input circuit unit, 11 is an output side power supply line, 12 is an output side ground line,
13 is a CPU (ground fault detection means), 14 is a potential detection circuit section, 15 is an output switching element, 17 is a bypass resistance (resistive element), 33 is a load switching element (a part of the load current feeding circuit section), Reference numeral 34 is a resistor (the rest of the load current feeding circuit portion), and 36 and 37 are voltage dividing resistors (load switching element cutoff circuit portion).

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】信号伝送線と、電源線と接地線との間に配
設されるとともに前記信号伝送線を通じて信号を出力す
る信号出力回路部と、前記電源線と前記接地線との間に
配設されるとともに前記信号伝送線を通じて前記信号を
受け取る信号入力回路部とを有し、 前記信号出力回路部は、前記電源線及び前記接地線の一
方と前記信号線との間に互いに並列に接続される出力用
スイッチング素子及び抵抗素子を有し、 前記信号入力回路部は、前記電源線及び前記接地線の他
方と前記信号線との間に接続される負荷用スイッチング
素子を含む負荷電流給電回路部と、前記信号入力回路部
側における前記電源線及び前記接地線の一方の導通不良
時に前記負荷用スイッチング素子を遮断する負荷用スイ
ッチング素子遮断回路部とを有することを特徴とする信
号伝送回路。
1. A signal transmission circuit, a signal output circuit section that is arranged between a power supply line and a ground line and outputs a signal through the signal transmission line, and between the power supply line and the ground line. And a signal input circuit unit that receives the signal through the signal transmission line, and the signal output circuit unit is in parallel with each other between the signal line and one of the power supply line and the ground line. A load current feed including a switching element for load connected between the signal line and the other of the power supply line and the ground line; A circuit section and a load switching element cutoff circuit section that cuts off the load switching element when one of the power supply line and the ground line on the signal input circuit side is defective in conduction. Signal transmission circuit.
【請求項2】前記信号出力回路部は、前記信号伝送線の
電位を検出する電位検出回路部と、前記電位検出回路部
で検出された前記信号伝送線の電位に基づいて前記信号
入力回路部側における接地不良を検出する接地不良検出
手段を備える請求項1記載の信号伝送回路。
2. The signal output circuit section detects the potential of the signal transmission line, and the signal input circuit section based on the potential of the signal transmission line detected by the potential detection circuit section. The signal transmission circuit according to claim 1, further comprising grounding failure detection means for detecting grounding failure on the side.
【請求項3】前記接地不良検出手段は、前記出力用スイ
ッチング素子の遮断時に前記信号伝送線の電位がローレ
ベルである場合に、前記信号入力回路部の接地不良及び
給電不良を含む信号伝送不良状態発生と判定するもので
ある請求項2記載の信号伝送回路。
3. The ground fault detecting means includes a fault in signal transmission including a fault in grounding and a fault in power feeding of the signal input circuit section when the potential of the signal transmission line is at a low level when the switching element for output is cut off. The signal transmission circuit according to claim 2, which determines that a state has occurred.
【請求項4】前記負荷用スイッチング素子遮断回路部
は、一端が前記電源線に接続される第1分圧抵抗と、一
端が前記接地線に接続される第2分圧抵抗とからなる分
圧回路とを有し、前記両分圧抵抗の他端は前記負荷用ス
イッチング素子の制御端子に接続され、前記負荷用スイ
ッチング素子は前記電源線の電位より低い電位が前記両
分圧抵抗の他端から前記制御端子に印加される時に導通
するエミッタ接地又はソース接地のトランジスタからな
る請求項1から3のいずれか記載の信号伝送回路。
4. The load switching element cutoff circuit section has a voltage dividing resistor including a first voltage dividing resistor having one end connected to the power supply line and a second voltage dividing resistor having one end connected to the ground line. A circuit, the other ends of the two voltage dividing resistors are connected to the control terminal of the load switching element, the load switching element has a potential lower than the potential of the power supply line, the other end of the two voltage dividing resistors. 4. The signal transmission circuit according to claim 1, comprising a grounded-emitter or source-grounded transistor that conducts when applied to the control terminal.
【請求項5】前記負荷用スイッチング素子遮断回路部
は、一端が前記接地線に接続され、他端がバイポーラp
npトランジスタからなる前記負荷用スイッチング素子
の制御端子に接続されるベース電流規制抵抗を備える請
求項請求項1から3のいずれか記載の信号伝送回路。
5. The load switching element cutoff circuit section has one end connected to the ground line and the other end connected to a bipolar p-type.
4. The signal transmission circuit according to claim 1, further comprising a base current regulating resistor connected to a control terminal of the load switching element formed of an np transistor.
【請求項6】前記負荷電流給電回路部は、前記負荷用ス
イッチング素子と、前記負荷用スイッチング素子と直列
接続された抵抗素子とを有する請求項1から3のいずれ
か記載の信号伝送回路。
6. The signal transmission circuit according to claim 1, wherein the load current feeding circuit section includes the load switching element and a resistance element connected in series with the load switching element.
JP04991395A 1995-03-09 1995-03-09 Signal transmission circuit Expired - Fee Related JP3405489B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04991395A JP3405489B2 (en) 1995-03-09 1995-03-09 Signal transmission circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04991395A JP3405489B2 (en) 1995-03-09 1995-03-09 Signal transmission circuit

Publications (2)

Publication Number Publication Date
JPH08249585A true JPH08249585A (en) 1996-09-27
JP3405489B2 JP3405489B2 (en) 2003-05-12

Family

ID=12844261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04991395A Expired - Fee Related JP3405489B2 (en) 1995-03-09 1995-03-09 Signal transmission circuit

Country Status (1)

Country Link
JP (1) JP3405489B2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010400U (en) * 1983-06-29 1985-01-24 日野自動車株式会社 Vehicle speed sensor abnormality detection device
JPH05294167A (en) * 1992-04-21 1993-11-09 Jidosha Kiki Co Ltd Abnormality detecting method and abnormality detecting device consisting of main controller and subcontroller
JPH06273429A (en) * 1993-03-15 1994-09-30 Sumitomo Electric Ind Ltd Fault detection apparatus of rotary sensor and rotary sensor equipped with fault detection function
JPH06289037A (en) * 1993-04-06 1994-10-18 Sumitomo Electric Ind Ltd Failure detection for rotation sensor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010400U (en) * 1983-06-29 1985-01-24 日野自動車株式会社 Vehicle speed sensor abnormality detection device
JPH05294167A (en) * 1992-04-21 1993-11-09 Jidosha Kiki Co Ltd Abnormality detecting method and abnormality detecting device consisting of main controller and subcontroller
JPH06273429A (en) * 1993-03-15 1994-09-30 Sumitomo Electric Ind Ltd Fault detection apparatus of rotary sensor and rotary sensor equipped with fault detection function
JPH06289037A (en) * 1993-04-06 1994-10-18 Sumitomo Electric Ind Ltd Failure detection for rotation sensor

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