JPH05146048A - Load drive circuit - Google Patents

Abstract

PURPOSE:To achieve a compact and highly reliable electronic device with a high utilization factor and less heat build-up for a circuit which drives an electrical load safely. CONSTITUTION:A title item is provided with a test part 5 which previously tests a state of a load 1 by allowing a test current iTEST which is smaller than a current iLOAD driving a load 1 when the load 1 is operating normally to the load 1 while being activated by a drive signal SD, a judgment part 6 where the drive signal SD is input at the same time when a test result of a test part 5 is input, the test result is normal, and the output signal becomes active only when the drive signal SD is active, and a drive part 7 which is driven by an output signal of the judgment part 6 and drives the load 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for safely and efficiently driving an electric load.

One of the most important things to be aware of when driving a load with electric power is to confirm that the load is not short-circuited or grounded. If neglected, failure or burning of the circuit that drives the load is unavoidable.
That is, if electric power is driven when the load is in a short-circuit state, a huge short-circuit current will flow in the drive circuit.

Therefore, in a circuit for driving a load with electric power, a short circuit (ground fault) protection circuit is provided to suppress a short circuit current, or a drive current is cut off.

However, the conventional load drive circuit having the short-circuit protection circuit has disadvantages such as poor power efficiency and large heat generation.

Therefore, there is a demand for a drive circuit which is safe against load short-circuits and ground faults, has high power efficiency, and generates little heat.

[0006]

2. Description of the Related Art FIG. 3 is a diagram for explaining a conventional load drive circuit. (A) is a block diagram showing a general form of a drive circuit provided with a short circuit protection circuit, and (b) is provided with a short circuit protection circuit. It is an example of a drive circuit.

(1) General Form of Load Drive Circuit with Short Circuit Protection Circuit As shown in FIG. 3 (a), a resistor for detecting the load drive current i _LOAD between the load 1 and the drive unit 2. A configuration in which Rs are provided in series is generally used.

That is, if a short circuit or a ground fault occurs in the load 1,
Load drive current i_LOADWill increase. So that increase
Voltage V across the series resistor R_SENSDetected as an increase in
Pressure V _SENSWhen the voltage exceeds a predetermined voltage
With the circuit configuration that suppresses or cuts off the drive of the load 1
is there.

Therefore, an overcurrent detection unit 3 for detecting a short circuit or a ground fault of the load 1 from the voltage V _SENS across the series resistor R is provided, while the drive signal S _D is provided in the preceding stage of the drive unit 2 for driving the load 1. Is provided with a shutoff unit 4 for shutting off the
The configuration is such that the shutoff operation of the shutoff unit 4 is controlled based on the detection result.

That is, when the voltage V _SENS across the series resistor R becomes larger than a predetermined voltage, the load is driven by the overcurrent detection unit 3 to activate the cutoff unit 4 and the drive unit 2 drives the load 1. _Operates to suppress or block the drive current i _LOAD .

(2) Concrete Circuit Example 1) Structure FIG. 3 (b) shows that the power supplied to the load 1 is supplied to the transistor Tr ₁
This is a drive circuit that is switched by, and the power supplied to the load 1 is supplied from the power supply Vcc.

A series resistor R for current detection is provided between the transistor Tr ₁ and the load 1, and the voltage across the resistor R is amplified by the operational amplifier OP-AMP. Also, the operational amplifier
The output voltage Vs of OP AMP is the reference voltage V by the comparator CMP.
Compared with ref, if the output voltage Vs of the operational amplifier OP-AMP exceeds the reference voltage Vref, the output of the comparator CMP is “L”.
It is a structure that becomes a level.

That is, the reference voltage Vref is a voltage for determining a short circuit or a ground fault of the load 1.

On the other hand, in front of the load driving transistor Tr ₁ , a transistor Tr ₂ for cutting off the drive signal S _D is provided.
Is provided and the transistor Tr ₂ is driven by the output signal of the comparator CMP.

In the circuit example of FIG. 3B, the case where the drive signal S _D is low active is illustrated.

The resistors R ₁ , R ₂ and R ₃ are base driving resistors for the load driving transistor Tr ₁ , and at the same time, the resistor R ₁ is used in combination with the blocking transistor Tr ₂ to block the drive signal S _D. -It plays the role of damping resistance. The resistors R ₄ and R ₅ are base driving resistors of the cutoff transistor Tr ₂ .

2) Operation In the circuit example of FIG. 3 (b), the relationship between the output voltage Vs of the operational amplifier OP AMP and the reference voltage Vref is Vs <Vref unless the load 1 has a short circuit or a ground fault. .. Therefore,
The output signal of the comparator CMP is at "H" level. Therefore, the cutoff transistor Tr ₂ is in the OFF state, and the drive signal S _D is applied to the load drive transistor Tr ₁ through the resistors R ₁ and R ₂ .

On the other hand, if a short circuit or a ground fault occurs in the load 1,
The load drive current i _LOAD increases and the voltage across the series resistor R also increases. Therefore, the output voltage Vs of the operational amplifier OP AMP also rises and the relationship with the reference voltage Vref is Vs> Vref. As a result, the output signal of the comparator CMP becomes "L" level, and the cutoff transistor Tr ₂ is turned on. Then, the drive signal S _D is cut off and attenuated by the resistor R ₁ , and the load driving transistor Tr ₁ is turned off.

[0019]

The conventional drive circuit as described above has the following problems due to the use of the current detecting resistor R inserted in series with the load 1. There is.

Since the voltage drop V _SENS due to the series resistance R is generated, the utilization factor of the power supply voltage Vcc for the load 1 is lowered.

There is a power loss due to the series resistance R, and heat generation due to the loss causes the temperature of the drive circuit and other peripheral circuits to rise.

Due to the above reasons, it is necessary to take a large heat radiation space when mounting the series resistor R. In extreme cases, it is necessary to use means such as a radiator.

Due to the above reasons, the reliability of the drive circuit and other peripheral circuits deteriorates. That is all.

A technical object of the present invention is to realize a circuit for detecting a load state and safely driving a load without using a series resistor for detecting a load drive current, thereby having a high voltage utilization rate and less heat generation. , To realize a small and highly reliable electronic device.

[0025]

FIG. 1 is a block diagram for explaining the basic structure of the present invention.

The present invention is characterized in that a minute test current i _TEST is supplied to the load 1 before driving the load 1 to detect a short circuit / ground fault condition.

That is, when the load 1 is short-circuited or grounded, it is a circuit that does not drive the load 1 even if the drive signal S _D is input. It is a drive circuit.

A test current i that is smaller than the current i _LOAD that drives the load 1 when the load 1 is operating normally.
The _TEST, flowing is activated to a drive signal S _D to the load 1 trying advance the state of the load 1 Test 5

The output signal is active only when the test result of the test section 5 and the drive signal S _D are input and the test result is normal and the drive signal S _D is active. Judgment unit 6

A driving unit 7 for driving the load 1 by being driven by the output signal of the judging unit 6

[0031]

Considering the inherent impedance of the load 1 as a reference, if a short circuit or a ground fault occurs in the load 1, the apparent impedance will decrease.

Therefore, when a short circuit or a ground fault occurs in the load 1, the test current i _TEST supplied from the test section 5 increases or the load 1 is supplied when the test current i _TEST is supplied. The magnitude of the voltage appearing at is reduced. Therefore,
This makes it possible to detect whether the load 1 is in a normal state or a state in which a short circuit or a ground fault has occurred. That is, that is the role of the test unit 5.

On the other hand, the same drive signal S _D as that of the test section 5 is also input to the determination section 6, and the drive signal S _D is active only when the test result of the test section 5 is normal. The output signal of the determination unit 6 becomes active, and the drive unit 7 is driven.

That is, when the load 1 is short-circuited or has a ground fault, the drive unit 7 is not driven by the determination unit 6, so that the load drive current from the drive unit 7 to the load 1 is reduced.
i _{LO AD} is not supplied.

[0035] In the present invention, since being activated drive signal S _D to the test unit 5 operates, it can be the drive signal S _D to detect the state of the load 1 whenever it becomes active. Therefore, if it is a temporary short circuit or ground fault, it is sufficient to stop the drive current i _LOAD supply to the load 1 only during the short circuit / ground fault period. It can be driven.

Since the current detecting resistor is not inserted in series with the load 1, the voltage utilization rate does not decrease and heat is not generated.

[0037]

EXAMPLES Next, examples of how the load drive circuit according to the present invention can be embodied in practice will be described.

FIG. 2 is a diagram for explaining the embodiment, (a) is a circuit diagram of a load driving circuit, and (b) is a table for explaining the operation of each transistor.

[0039] (1) As shown in diagram 2 (a), a driving circuit for switching power supplies with transistor Tr ₁₁ to the load 1, load between the load drive transistor Tr ₁₁ and the load 1 No drive current detection resistor is inserted.

The transistor Tr ₁₂ is a transistor for testing the state of the load 1, and supplies the test current i _TEST to the load 1 through the resistor R ₁₇ . The resistance value of R ₁₇ is
It was set to 9R _L. However, the resistance value of load 1 is _RL .

The comparator CMP includes a transistor Tr.
This is a comparator for comparing the voltage appearing in the load 1 with the reference voltage when the test current i _TEST is supplied from ₁₂ to the load 1. The voltage appearing on the load 1 is the resistance R _20.
The voltage is divided by (100KΩ) and resistor R ₂₁ (18KΩ) and input to the- (minus) input terminal of comparator CMP.

The reference voltage input to the comparator CMP is the resistance R ₁₄ (resistance value 100R _L ) and the resistance R ₁₃ (resistance value 5R
_The voltage divided by _L ) and R ₁₈ (100KΩ) and resistance R
_The voltage is divided with ₁₉ (22KΩ) and input to the + (plus) input terminal of the comparator CMP.

On the other hand, the output signal of the comparator CMP is
A load driving transistor Tr through resistors R ₂₂ and R ₂₃
Add to the base of ₁₁ .

The transistor Tr ₁₃ is a pre-driving transistor and outputs a high-active (Hi-Active) drive signal S _d through resistors R ₁₁ and R ₁₂ to the transistor Tr _13.
Add to the base of.

The front driving transistor Tr ₁₃
Is applied to the base of the test current supply transistor Tr ₁₂ through resistors R ₁₅ and R ₁₆ . At the same time, the cold end side of the voltage dividing resistor R ₁₃ that creates the reference voltage for the comparator CMP is connected to the collector of the pre-driving transistor Tr ₁₃ .

That is, the front drive transistor Tr
The collector output of ₁₃ drives the test current supply transistor Tr ₁₂ and also drives the comparator CMP. However, the comparator CMP is driven by superimposing it on the supply of the reference voltage.

[0047] Incidentally, the power source Vcc is used as a negative electrode grounded, the load driving transistor Tr _{1 1} and the test current supply transistor Tr ₁₂ is used in common emitter connecting the emitter of the PNP transistor to the hot side of the power supply Vcc The pre-driving transistor Tr ₁₃ was used with the emitter grounded by connecting the emitter of the NPN transistor to the ground side.

(2) Operation Based on the chart of FIG. 2 (b), each of the transistors Tr ₁₃ and Tr
The operation will be described according to the operations of ₁₂ and Tr ₁₁ .

1) When the load 1 is normal and the drive signal S _d is at “H” level: That is, when the drive signal S _d is changed from “L” level to “H” level, the front drive transistor Tr ₁₃ Is O
Transition from FF state to ON state. As a result, the test current supply transistor Tr ₁₂ is turned on, and the test current i _TEST is supplied from the power supply Vcc to the load 1 through the resistor R ₁₇ .
The magnitude of the test current i _TEST at this time can be given by the following equation (1). However, the ON resistance of the test current supply transistor Tr ₁₂ is ignored.

I _TEST = Vcc / (9R _L + R _L ) = Vcc / 10R _L ----------- (1)

Here, the load driving transistor Tr ₁₁
The load drive current i _LOAD when the transistor is turned on is given by the following equation (2) when the ON resistance of the transistor Tr ₁₁ is ignored.

I _LOAD = Vcc / R _L ----------- (2)

Therefore, by substituting the equation (2) into the equation (1), the following equation (3) is established.

I _TEST = i _LOAD / 10 ----------- (3)

Further, the test current i_TESTSupply to load 1
The voltage appearing on the load 1 when _TESTIf expressed in
Pressure V_TESTIs given by the following equation (4).

[0056] _{V TEST = Vcc · R L /} (9R L + R L) = Vcc / 10 ----------- (4)

Therefore, the voltage V ₂ applied to the minus input terminal of the comparator CMP is given by the following equation (5). However, (R
_{20 + R 21) »R L} , and a relation of 9R _L.

V ₂ = V _TEST · R ₂₁ / (R ₂₀ + R ₂₁ ) = V _TEST · 18 / (100 +18) = (Vcc / 10) (18/118) ≈1.53 Vcc × 10 ^-2 ---- -------(Five)

On the other hand, it is added to the + input terminal of the comparator CMP.
Reference voltage V₁Is given by the following equation (6). However, front drive
Transistor Tr₁₃Ignore the ON resistance of (R₁₈
+ R ₁₉) >> R₁₃ , R₁₄It is assumed that there is a relationship.

[0060] _{V 1 = Vcc {R 13 /} (R 13 + R 14)} {R 19 / (R 18 + R 19)} = Vcc (5/105) (22/122) ≒ 8.58Vcc × 10 -3 - --------- (6)

Therefore, from the equations (5) and (6), V ₁ <V ₂ , and the output signal of the comparator CMP becomes "L" level. As a result, the load driving transistor Tr ₁₁ turns on.
Then, the drive current i _LOAD is supplied to the load 1.

At this time, the load driving transistor Tr
_If the ON resistance of ₁₁ is ignored, the power supply Vcc is applied to the load 1 as it is. Therefore, the voltage V ₂ applied to the minus input terminal of the comparator CMP is given by the following equation (7).

V ₂ = Vcc · R ₂₁ / (R ₂₀ + R ₂₁ ) = Vcc · 18 / (100 + 18) ≈1.53 Vcc × 10 ^-1 ----------- (7)

That is, the load driving transistor Tr
_{Even if 11} is turned on, the relationship of V ₁ <V ₂ is satisfied from the equations (6) and (7), and the drive current i _LOAD is continuously supplied to the load 1.

The load driving transistor Tr ₁₁ is turned on.
If N, the test current supply transistor Tr ₁₂ is turned on.
Even if it was done, the test current i _TEST becomes 0 (zero).
This is because the ON resistance of the load driving transistor Tr ₁₁ is ignored. However, in practice, a negligible amount of current is supplied.

2) Drive signal S when load 1 is normal_dBut
In case of “L” level, that is, the drive signal S_dIs from "H" level to "L" level
To the drive circuit, the front drive transistor Tr₁₃Is O
Transition from N state to OFF state. As a result, the test current
Supply transistor Tr₁₂Is also turned off. Also, (R
₁₈+ R₁₉) >> R ₁₃ , R₁₄Therefore, the comparator C
Reference voltage V applied to + input terminal of MP₁Is given by the following equation (8)
Be done.

V ₁ = Vcc · R ₁₉ / (R ₁₈ + R ₁₉ ) = Vcc · 22 / (100 + 22) ≈1.80 Vcc × 10 ^-1 ----------- (8)

Therefore, from the equations (7) and (8), V ₁ > V ₂ , and the output signal of the comparator CMP becomes "H" level. As a result, the load driving transistor Tr ₁₁ becomes OF
F, and the drive current i _LOAD to the load 1 also becomes 0 (zero).

As a result, the voltage appearing at the load 1 also becomes 0 (zero), so that V ₂ = 0 and the relationship of V ₁ > V ₂ is maintained and satisfied, and the load driving transistor Tr ₁₁ is turned off.
Hold the state.

3) If the load 1 is short-circuited (ground fault) and the drive signal is
Issue S_dIs at “H” level In this case, the impedance of load 1 is 0 (zero).
It Therefore, the front driving transistor Tr₁₃And
And test current supply transistor Tr₁₂Is turned on, test
Current i_TESTIs supplied to the load 1,
Appearing test voltage V _TESTBecomes 0 (zero). for that reason,
Input voltage V of comparator CMP₂Is also 0 (zero).

That is, from this fact and the equation (6), V ₁ >
V _2, and the output signal of the comparator CMP becomes "H" level. As a result, the load driving transistor Tr ₁₁
Is not turned on, and the drive current i _LOAD is not supplied to the load 1.

4) When the load 1 is short-circuited (ground fault) and the drive signal S _d is at "L" level, the pre-driving transistor Tr ₁₃ is turned off.
As a result, the test current supply transistor Tr ₁₂ is also OF
It is F. Thus, the test current i _{TE ST} to the load 1 is not supplied. On the other hand, in this case, since the impedance of the load 1 is 0 (zero), the comparator is the same as in 3) above.
The input voltage V _{2 of the} CMP is also 0 (zero).

On the other hand, since the input voltage V ₁ of the comparator CMP in this case is given by the equation (8), V ₁ > V ₂ and
The output signal of the comparator CMP becomes "H" level. As a result, the load driving transistor Tr ₁₁ is not turned on and the drive current i _LOAD is not supplied to the load 1.

[0074]

As described above, according to the load driving circuit of the present invention, a minute test current i _TEST is supplied to the load before driving the load to detect a short circuit / ground fault condition, and a short circuit / ground fault is detected. If it is in a tangled state, it does not drive. Moreover, the load drive current i _LOAD
No series resistor is required to detect.

Therefore, it is possible to realize a small-sized and highly reliable electronic device which can safely drive a load, has a high voltage utilization rate and generates little heat.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating a basic configuration of the present invention.

FIG. 2 is a diagram illustrating an embodiment, (a) is a circuit diagram of a load drive circuit, (b) is a diagram illustrating the operation of each transistor,
Is.

FIG. 3 is a diagram illustrating a conventional load drive circuit, (a) is a block diagram showing a general form of a drive circuit having a short-circuit protection circuit, (b) is an example of a drive circuit having a short-circuit protection circuit, Is.

[Explanation of symbols]

1 Load (electrical load) 2 Drive part 3 Overcurrent detection part 4 Breaking part 5 Test part 6 Judgment part 7 Drive part R Load drive current detection resistance S _D , S _d Drive signal i _LOAD Load drive current V _SENS Load drive Current detection voltage Vref Reference voltage i _TEST Test current V _TEST Voltage appearing on load due to test current _RL Load impedance (load resistance) Tr ₁ and Tr ₂ Transistors Tr _{11 to} Tr ₁₃ Transistors R _{1 to} R ₅ Resistance R ₁₁ ~ R ₂₃ resistor OP-AMP operational amplifier CMP comparator

Claims (1)

[Claims] 1. A circuit in which the load (1) is not driven even when the drive signal (S _D ) is input when the load (1) is in a short circuit or ground fault state, and the load (1) is normal. The current (i _TEST ) that is smaller than the current (i _LOAD ) that drives the load (1) during the operation of the load (1) is activated by the drive signal ( _SD ) and flows to the load (1) to The test unit (5) for testing the state of 1) in advance, and the test result of the test unit (5) and the drive signal (S _D ) are also input, and the test result is normal and the drive signal is A judging section (6) whose output signal becomes active only when ( _SD ) is in an active state, and a driving section (7) which is driven by the output signal of the judging section (6) to drive the load (1). And a load drive circuit comprising: