JPH0824078B2 - Accelerator controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Object of the Invention (Industrial field of application) The present invention relates to an accelerator control device having an improved operation pattern signal generator.

(Prior Art) Generally, in a synchrotron accelerator or the like, in a process of applying energy to charged particles to accelerate them, a current value of a bending electromagnet is changed depending on energy,
That is, it is necessary to make the pattern change with time. This pattern is determined in advance by the capacity of the electromagnet power source, the cycle for extracting the accelerated charged particles, and the like, and is recorded in the memory for generating the pattern signal. The generation of the pattern signal is performed by reading and outputting the data in the memory at a predetermined cycle.

FIG. 5 shows the configuration of such a conventional accelerator control device, and shows that a current is supplied from the electromagnet power source 2 to the electromagnet 1 to generate a magnetic field B necessary for accelerator operation. A magnetic field reference value BR is given to the electromagnet power source 2 from the magnetic field pattern generator 3 as a pattern signal that changes with time. The magnetic field pattern generator 3 is supplied with the time clock signal CT from the timing signal generator 4, whereby the magnetic field pattern generator 3 operates. The strength of the magnetic field B generated by the electromagnet 1 is converted into an electric signal by the magnetic field sensor 5 and input to the magnetic field clock generator 6. The magnetic field clock generator 6 outputs one pulse signal as the magnetic field clock signal CB in response to a change in the magnetic field value of a certain amount (for example, outputs one pulse signal for a magnetic field change equivalent to 0.2 gauss). This magnetic field clock signal CB is input to the frequency pattern generator 7. The reset signal R is also input to the frequency pattern generator 7 from the timing signal generator 4. The frequency pattern generator 7 is the magnetic field clock signal CB.
The frequency reference value fR is output as a pattern signal that changes with time, and the frequency reference value fR is input to the high frequency generator 8. The high frequency generator 8 outputs the high frequency output PR of the frequency given by the input frequency reference value fR.
F is generated, and this high frequency output PRF is supplied to the high frequency acceleration cavity 9 attached to the accelerator ring.

FIG. 6 is a diagram showing the relationship between the magnetic field B and the frequency f of the high-frequency output PRF in such a conventional accelerator controller, where the horizontal axis represents time and the vertical axis represents the magnetic field B and frequency f. It shows a temporal change of one cycle from the incident Inj of the charged particles to the extraction Ext of the charged particles after the completion of acceleration.

FIG. 7 shows the structure of the frequency pattern generator 7, which is composed of an address counter 71, a memory 72, an output register 73 and a data bus 74 for inputting / outputting data between them.

FIG. 8 shows the configuration of the address counter 71 in FIG. 7, which is composed of a clock pulse counter 711 and an address register 712.

In such a conventional accelerator controller, the timing signal generator 4 gives the clock signal CT to the magnetic field pattern generator 3 in order to generate the pattern of the magnetic field B as shown in the graph of FIG. As a result, the pattern data written in the memory of the magnetic field pattern generator 3 is sequentially read and the magnetic field reference value BR is output. The magnetic field reference value BR has a temporal change pattern so as to obtain the waveform of the magnetic field B in FIG. 6, and is given to the electromagnet power supply 2. The electromagnet power supply 2 supplies a current to the electromagnet according to the change in the magnetic field reference value BR. The magnetic field generated by the electromagnet 1 is detected by the sensor 5. Since the sensor 5 uses a winding, the output is a voltage output V proportional to the magnitude of the change in the magnetic field, which is input to the magnetic field clock generator 6. The magnetic field clock generator 6 is provided with an integrating circuit and outputs one pulse when the integrated value of the input voltage, that is, the magnitude of the magnetic field reaches a constant value (for example, a value corresponding to 1 gauss), and the integrated value Is cleared to 0.
Therefore, as the output, the magnetic field clock signal CB is obtained such that one pulse is output each time the magnitude of the magnetic field increases by a constant value. The frequency pattern generator 7 has a reset signal R
By inputting the magnetic field clock signal CB, the following operation is performed.

First, the reset signal R resets the clock pulse counter 711 and sets 0 in the address register 712, as shown in FIGS. Since the address register 712 indicates the read address of the memory 72, the data of the head address of the memory 72 is read at this point and set in the output register 73. The data set in the output register 73 is the frequency reference value fR as it is.
Is output as Next, every time one pulse is input from the magnetic field clock signal CB, the clock pulse counter
The 711 counts up, and each time the read address of the memory 72 is advanced by one address, the read data is set in the output register 73 and is output as the frequency reference value fR. By such an operation, the frequency reference value fR is given as a function of the magnetic field B, so that it can be obtained as a pattern corresponding to the change of the magnetic field B.

It is necessary to change the frequency of the high-frequency power used for accelerating the charged particles in accordance with the strength of the magnetic field generated by the electromagnet, as compared with light particles such as electrons, especially in the synchrotron accelerator. It occurs when accelerating heavy particles (for example, hydrogen atoms). In light particles, when a certain amount of energy is obtained, the speed becomes almost the speed of light due to the relativistic effect, and the weight of the particle increases as the energy is obtained. In the synchrotron accelerator, the orbit of particles must be on a fixed closed orbit, but when the speed is constant, the cycle of orbit on the closed orbit is constant, so that the high frequency power to be applied for acceleration is The frequency may be constant. However, in the case of heavy particles, the speed increases as the energy increases (because it is used in a region where the speed is sufficiently lower than the speed of light), so the frequency that the particles orbit increases with the increase in energy. . On the other hand, the strength of the magnetic field generated by the electromagnet (deflection electromagnet) is made proportional to the energy to secure a constant curvature and form a constant closed orbit. Under such circumstances, changing the frequency depending on the magnetic field is equivalent to changing the frequency depending on the energy, and the energy and speed, that is, the frequency is given by a constant frequency. The device as described above is effective.

(Problem to be Solved by the Invention) However, in the conventional accelerator control device, since the pattern is generated according to the change of the magnetic field as described above,
When the magnetic field reached a certain level, the frequency could be slightly changed to finely adjust the closed orbit of the charged particles, and the operation for effectively extracting the beam could not be performed.

Therefore, the present invention, even when the magnetic field reaches a constant value,
An object is to provide an accelerator control device capable of changing an output pattern.

[Configuration of the Invention] (Means for Solving the Problems) The accelerator control device of the present invention includes a first memory for recording frequency pattern data corresponding to a magnetic field clock signal, and a timing when the magnetic field of the electromagnet reaches a predetermined value. A timing signal generator for generating a memory address branch signal and a time clock signal, a second memory for recording pattern data corresponding to the time clock signal, and a second memory for outputting the memory address branch signal when the memory address branch signal is output. A memory address counter for switching the output data address from the first memory to the second memory is provided.

(Operation) The contents of the first memory are sequentially read according to the output of the magnetic field clock signal generated by detecting the change in the magnetic field of the electromagnet of the accelerator, and are input to the high frequency generator. As a result, the frequency of the high frequency power supplied to the high frequency acceleration cavity attached to the accelerator ring is gradually increased until the magnetic field reaches a predetermined value.

Next, a memory address branch signal is generated at the timing when the magnetic field of the electromagnet reaches a predetermined value, whereby the first memory is switched to the second memory, and thereafter, the first clock is output in accordance with the time clock signal output from the timing signal generator. The contents of the two memories are sequentially read and input to the high frequency generator. Thereby, the frequency of the high-frequency output can be increased even after the magnetic field reaches a certain level, and the closed orbit at the time of emission of the charged particle beam is finely adjusted to facilitate beam extraction.

(Embodiment) FIG. 1 is a block diagram of an accelerator control apparatus according to an embodiment of the present invention. In the figure, the same reference numerals as in FIG. 5 indicate the same or corresponding portions, and the difference from the configuration of FIG.
Timing signal generator 10 to frequency pattern generator 11
In addition, the memory address branch signal J generated when the magnetic field value of the other electromagnet 1 of the reset signal R reaches a predetermined value.
And that the time clock signal CT is input,
A first memory 112 that stores pattern data corresponding to the magnetic field clock signal CB inside the frequency pattern generator 11, and a second memory 113 that stores pattern data corresponding to the time clock signal CT. In addition, the memory address counter 111 switches to the output data address from the first memory to the second memory when the memory address branch signal J is output. With the above configuration, the electromagnet 1 is supplied with current from the electromagnet power source 2 so as to generate the magnetic field B in the pattern as shown in FIG. 2 as described above. The pattern of the magnetic field B is given by the magnetic field pattern signal BR which is the reference value output of the magnetic field pattern generator 3. On the other hand, the change of the magnetic field B is detected by the magnetic field sensor 5 and input to the magnetic field clock generator 6. This magnetic field change signal causes the magnetic field clock generator 6 to generate the magnetic field clock signal CB.
Is output to the address counter 111. Address counter 1
Each time 11 receives the magnetic field clock signal CB, it outputs 1-word data in the first memory 112 as a frequency reference value fR while counting up the address.

At the timing when the magnetic field B becomes constant, the address branch signal J is output from the timing signal generator 10 and given to the address counter 111. The address counter 111 switches the memory address for the read operation from the first memory 112 to the leading address of the second memory 113 by this signal J. After that, the timing signal generator 3 outputs the time clock CT having a constant cycle to the address counter 111. Then, the address counter 111 causes the second memory 112 to
The content of is output as the frequency reference value fR while sequentially incrementing the address. Therefore, as shown in FIG. 2, the frequency f can be changed in accordance with the emission timing Ext of the charged particle beam.

In addition, the timing signal generator 10
The reset signal R output to 111 brings the address to the head of the first memory 112 and at the same time outputs the data of the head address as fR, and operates at the beginning of one cycle. The operation timings of J, R, and CT are set in the timing signal generator 10 in advance. Although not shown in FIG. 1, the operations of the incident (Inj) and the exit (Ext) of the charged particle beam need to be synchronized with the pattern of the magnetic field B and the frequency f. The generation is often performed by the timing signal generator 10.

FIG. 3 shows the relationship among the first memory 112, the second memory 113, the address counter 111 and the output register 114 in more detail. These first memory 112, second
Memory 113, address counter 111 and output register
The data buses 114 are connected to each other.

FIG. 4 shows the configuration of the address counter 111 in more detail. A clock OR circuit 121 that outputs a pulse signal input as one of a magnetic field clock signal CB and a time clock signal CT as a clock signal C, a clock A counter 122 that accumulates the number of pulse signals input from the signal C and outputs the memory address A1, and a pulse signal that is either the reset signal R or the address branch signal J
A reset OR circuit 123 that outputs a counter reset signal Re as a reset signal of 122, a branch address register 124 that holds the start address JA of the second memory, and an output signal JH and a reset signal R are input after the address branch signal J is input. Hold circuit 125 that holds the output signal JH in the ON state until
An AND circuit 126 that outputs the branch address data JA as the address A2 while the signal JH is ON, an adder 127 that outputs the sum of the addresses A1 and A2 as the address A, and an address register 128 that holds the value of the address A To be done.

The first memory 112 and the second memory 113 are substantially 1
One memory is divided into two, the first memory
The start address of 112 is 0, and the start address of the second memory 113 is the branch address JA set in the branch address register 124. In these memories, as shown in FIG. 3, the data of the frequency reference value fR is stored in the first memory 11
2, the magnetic field clock signal CB is recorded as a function of the magnetic field B for each unit ΔB of one clock signal,
In the second memory 113, it is stored as a function of the time t for each unit Δt of one clock signal of the time clock signal CT.

First, when the reset signal R is input, the output A1 of the counter 122 is cleared to 0. Also, the output JH of the holding circuit 125
Is also cleared, so A2 is also cleared to 0. Therefore, the output A of the adder 127 is also cleared to 0, and the start address of the first memory 112 is set in the address register 128. At the same time, the data at the start address of the first memory 112 is read and set in the output register 114. The data set in the output register 114 is directly output as the frequency reference value fR.

Next, when the operation of the frequency pattern generator 3 is started by the input of the time clock signal CT, the magnetic field B starts to increase monotonously as shown in FIG. In this case, since the charged particle energy and the magnetic field B are in a substantially proportional relationship due to the nature of the accelerator, the operation of decreasing the magnetic field is not performed in the process of increasing energy. By increasing this magnetic field,
A magnetic field clock signal CB is generated by the magnetic field sensor 5 and the magnetic field clock generator 6, and is input to the address counter 111. In the address counter 111, the input magnetic field clock signal CB is sent to the counter 1 via the clock OR circuit 121.
Since it is input to the counter 22, the counter 122 performs a pulse counting operation. When the count value is output as the address A1 for each count of the counter 122, the adders 127 add the addresses A1 and A2, but at this time, A2 is 0.
So output A is the same as A1. A is the address register
While being set to 128, the data at the address indicated by A in the first memory is read out and set in the output register 14, and this data is output as the frequency reference value fR. In this way, as the magnetic field B increases, the contents of the first memory 112 are read and output as fR.

Next, when the branch signal J is input to the address counter 111 at the timing when the magnetic field B becomes constant, the reset signal is input to the counter 122 via the reset OR circuit 123 by this signal, so the count value is It is cleared to 0 and the address A1 also becomes 0. Further, since the output JH of the holding circuit 125 is turned ON, the branch address JA set in the branch address register 124 passes through the AND circuit 126 and the address A2.
And is input to the adder circuit 127. At this time, since A1 is cleared to 0, A matches A2. When this address A is set in the address register 128, the memory address becomes the top address of the second memory 113, and the data of this address is set in the output register 14 and fR is set.
Is output as Next, when the time clock signal CT is input to the address counter 111, since the pulse signal is input to the counter 122 via the clock OR circuit 121,
The counting operation is started again and the count value is output as A1. The adder 127 adds A1 and A2 and outputs A. Since A2 is the start address of the second memory 113 after the input of J, the address of A is the address of the second memory 113 that is sequentially advanced each time one time clock signal CT enters. Becomes Therefore, the contents of the second memory 113 are read by the pulse signal of CT and f
Output as R.

As described above, by inputting the magnetic field clock signal CB, the time clock signal CT, and the memory branch signal J to the address counter 111, reading and output of the first memory 112,
Since the switching to the second memory 113 and the reading and output of the second memory 113 can be performed, the pattern of the frequency reference value fR as a function of the magnetic field and the pattern of fR as a function of time are separately stored in the memory. It is possible to write it in advance, switch it at a predetermined timing, and output it.

In the above embodiment, the case where the frequency reference value fR is obtained has been described, but the present invention can be similarly applied to reference values other than the frequency reference value (for example, a high frequency output voltage pattern).

Further, in the above embodiment, the case where two types of memories, that is, the first memory 112 and the second memory 113 are provided, is shown.
Further, the memory may be divided into third and fourth sections, and at the same time, the address branch signal J may be increased to J ₁ , J ₂ , J ₃ ... It does not change the gist of the present invention.

Further, in the above description, the magnetic field B monotonically increases as the energy increases. However, depending on the method of the electromagnet power supply, the current of the electromagnet may include an AC ripple, and the magnetic field also slightly changes. . As a countermeasure against this, conventionally, there has been used a device in which two kinds of magnetic field clocks, an increasing direction clock and a decreasing direction clock, are provided to advance the memory address in the increasing direction and return the memory address in the decreasing direction. The same is applicable to the case.

Further, the case where the reset signal R and the address branch signal J are obtained from the timing signal generator 10 has been described.
These signals can also be obtained from the magnetic field pattern generator 3. In that case, in addition to the magnetic field pattern data, pulse output data may be added to data at a predetermined address, and a pulse signal may be output when the data is read.

As described above, according to the present invention, by using the magnetic field clock signal and the time clock signal,
In the process of increasing the magnetic field, the pattern data can be output as a function of the magnetic field by the magnetic field clock signal, and in the region where the magnetic field has a constant value, the pattern data can be output as a function of time by the time clock signal. It has become possible. This makes it possible to finely adjust the pattern when the charged particle beam is emitted, which was impossible in the past.

[Brief description of drawings]

FIG. 1 is a block diagram of an accelerator control device showing an embodiment of the present invention, FIG. 2 is a time chart showing the operation of the accelerator control device of FIG. 1, and FIG. 3 is a detail of the pattern generator of FIG. Block diagram, FIG. 4 is a detailed block diagram of the address counter of FIG. 1, FIG. 5 is a block diagram of a conventional accelerator control device, FIG. 6 is a time chart showing the operation of the device of FIG. 5, and FIG. Is a diagram showing the configuration of the pattern generator of FIG. 5, and FIG. 8 is a diagram showing the configuration of the address counter of FIG. 11 ... Frequency pattern generator, 111 ... Address counter, 112 ... First memory, 113 ... Second memory, 114
...... Output register.

Claims (1)

[Claims] 1. An accelerator control device for generating pattern data of a high frequency power frequency for accelerating charged particles by using a magnetic field clock signal generated by detecting a change in a magnetic field of an electromagnet of the accelerator, which corresponds to the magnetic field clock signal. A first memory for storing first pattern data, a timing signal generator for generating a time clock signal following the memory address branch signal at the timing when the magnetic field of the electromagnet reaches a predetermined value, and the time clock. A second memory storing second pattern data corresponding to the signal; and a memory for switching the output data address from the first memory to the second memory when the memory address branch signal is output. An accelerator control device comprising an address counter.