JPH08237207A - Signal processing circuit for photoelectric conversion element - Google Patents

Abstract

PURPOSE: To precisely demodulate a modulated wave from the output of a photoelectric conversion element by preventing the activation of an integration circuit only for time which is previously decided from the restoration time of a pulse outputted from an output circuit. CONSTITUTION: An electric signal from a light-receiving element 22 is amplified by an amplifier circuit 23 and is filtered into only a transportation frequency component by BPF 24. Output from BPF 24 is discriminated from a prescribed level by waveform shaping circuits 25 and 26 and is waveform-shaped. Then, it is inputted to the integration circuit 27 and the component of a modulate wave is extracted by integration. Then, it is waveform-shaped by an output circuit 28 and outputted to a decoding circuit and a control circuit in a poststage. Output is masked by permitting a discharge current switching circuit 33 to short circuit terminals in the capacitor of the integration circuit 27 so as to prevent the activation in response to the output of the output circuit 28, for example. Thus, the malfunction of output by the feedback of the output pulse to the input-side of the amplifier circuit with voltage fluctuation is prevented and the modulated wave can precisely be demodulated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing circuit for a photoelectric conversion element, which is suitable for use as a receiver of a remote control device using infrared rays in home electric appliances such as television receivers and video tape recorders. .

[0002]

2. Description of the Related Art FIG. 4 is a block diagram showing an electrical configuration of a typical prior art signal processing circuit 1 used in a receiver of a remote control device as described above. From the transmitter, for example, a pulse corresponding to the operation of the television receiver or the video tape recorder is used as a modulation wave, and a predetermined frequency sufficiently higher than the modulation wave, for example, 38 kHz.
Infrared light is transmitted by driving a light emitting element such as a light emitting diode by a transmission signal obtained by intensity-modulating the carrier wave.

On the other hand, on the receiver side, the infrared light is converted into an electric signal by a light receiving element 2 realized by a photodiode or the like, amplified by an amplifier circuit 3, and then a bandpass filter (abbreviated as BPF). At 4, the components of the predetermined frequency band are filtered. The output from the BPF 4 is input to the discrimination level creating circuit 5. The discrimination level creating circuit 5 is realized by, for example, an integrating circuit or the like, calculates an average value of the outputs of the BPF 4 over a predetermined period, and the average value is used as the discrimination level. Is given to one input of the comparator 6. The output from the BPF 4 is directly input to the other input of the comparator 6. Therefore, the comparator 6 derives a high level output when the output from the BPF 4 is equal to or higher than the discrimination level and a low level output when the output is less than the discrimination level, thus shaping the output from the BPF 4 in waveform.

The output from the comparator 6 is input to an integrating circuit 7 to extract the component of the modulated wave, and the output from the integrating circuit 7 is level discriminated at a discrimination level predetermined by a comparator 8 having a hysteresis characteristic. Then, the rectangular wave pulse corresponding to the modulated wave is demodulated. The output from the comparator 8 is input to the base of the output transistor 9. The emitter of the output transistor 9 is grounded, and the collector is connected to the high-level power supply line 11 via the pull-up resistor 10 and the output terminal 12.

Therefore, in response to the modulated wave pulse from the transmitter, a high level output is derived from the comparator 8, the output is inverted by the output transistor 9 and the pull-up resistor 10, and the output terminal 12 is output. A so-called low-active output is derived from. The output from the output terminal 12 is input to a control circuit, a decoding circuit, etc. in the subsequent stage to decode the code of the modulated wave, and the operation corresponding to the decoded code is performed.

FIG. 5 is a waveform diagram for explaining the operation of the signal processing circuit 1. From the transmitter, see FIG.
Only during the period when the modulated wave shown in FIG.
A carrier of a predetermined frequency shown in (b) is modulated,
The transmission signal shown in FIG. 5C is created, and the light corresponding to this transmission signal is transmitted.

Therefore, from the light receiving element 2, as shown in FIG.
The electric signal shown in (c) is derived. This electrical signal is
As a result of being amplified by the amplifier circuit 3 and further filtered by the BPF 4, due to a delay element such as an integral element of the BPF 4, a rising and falling edge becomes gentle and a blunt waveform as shown in FIG. Become. By discriminating this waveform at the discrimination level vth1 obtained from the average value of the waveform in the discrimination level creating circuit 5 as described above, a waveform as shown in FIG. 5 (e) is obtained.

Therefore, when the output of the comparator 6 is integrated by the integrating circuit 7, it becomes as shown in FIG. 5 (f). After the waveform is shaped at the discrimination level vth2 in the comparator 8, the output transistor 9 and the pull-up resistor 10 are formed. By inverting, the output shown in FIG. 5 (g) is derived at the output terminal 12.

In this way, the modulated wave on the transmitter side can be demodulated and the operation corresponding to the code represented by the modulated wave becomes possible.

[0010]

In the signal processing circuit 1 configured as described above, the amplifier circuit 3, the output transistor 9 and the pull-up resistor 10 are integrated as an integrated circuit including the light receiving element 2. Therefore, each circuit element is integrally sealed in resin.
Therefore, the voltage fluctuation of the output terminal 12 is fed back to the input of the amplifier circuit 3 through the resin, and the same signal processing as the electric signal from the light receiving element 2 is performed,
There is a problem that the output malfunctions.

That is, FIG. 5 (a) and FIG.
Similar to (b), when the carrier wave in FIG. 6 (b) is modulated by the modulated wave in FIG. 6 (a), the output from the light receiving element 2 is shown in FIG. 6 (c), and the output from the BPF 4 is shown. Is shown in FIG. 6 (d), the output from the comparator 6 is shown in FIG. 6 (e), the output from the integrating circuit 7 is shown in FIG. 6 (f), and the output terminal 1
The output from 2 is shown in FIG.

The output voltage from the output terminal 12 is the reference symbol α1.
When it rises as indicated by, the pulse indicated by reference numeral α2 is superimposed on the output from the light receiving element 2 in the amplifier circuit 3. Therefore, this pulse is subjected to signal processing in the same manner as the output from the regular light receiving element 2, and a pulse due to a malfunction as indicated by reference numeral α3 is output from the output terminal 12. Therefore, there is a problem that the code becomes undecipherable or malfunction occurs.

An object of the present invention is to provide a signal processing circuit for a photoelectric conversion element which can accurately demodulate a modulated wave from the output of the photoelectric conversion element.

[0014]

According to a first aspect of the present invention, there is provided a signal processing circuit for a photoelectric conversion element, which responds to an output obtained by intensity-modulating a carrier of a predetermined frequency, using a desired pulse to be transmitted as a modulation wave. And a filter for extracting a desired carrier frequency component from the output of the amplifier circuit, in which the light emitting element is driven and the electric signal from the photoelectric conversion element obtained in response to the light from the light emitting element is amplified. A waveform shaping circuit for shaping the output from the filter, an integrating circuit for extracting the component of the modulated wave from the output of the waveform shaping circuit, and an output circuit for discriminating the output of the integrating circuit into an output waveform by level discrimination In a signal processing circuit of a photoelectric conversion element including at least the respective circuits integrated, provided in association with the integration circuit, and responsive to the output of the output circuit. Characterized in that it comprises a deactivation means for deactivation of the integrating circuit by pre-determined time from the return of the pulse output from the output circuit.

According to a second aspect of the present invention, in the signal processing circuit for a photoelectric conversion element, the integrating circuit includes a capacitor and a constant current source for supplying a charging current to the capacitor, and the immobilizing means. Disables the integrating circuit by bypassing the capacitor, and the predetermined time depends on the time delay element such as the filter and the integrating circuit until the output is obtained from the output circuit in response to the output of the photoelectric conversion element. It is characterized in that it can be obtained slightly longer than the delay time.

[0016]

According to the first aspect of the present invention, in the signal processing circuit of the photoelectric conversion element used as a receiver of a remote control device using infrared rays of home electric appliances, only a predetermined time when the output pulse corresponding to the modulated wave is restored. Mask output.

That is, from the transmitter, light is emitted from the light emitting element in response to the intensity modulated output of the carrier wave of a predetermined frequency using the desired pulse to be transmitted representing the operation code of the remote operation as the modulation wave. It is radiated, and the photoelectric conversion element outputs an electric signal in response to the light. This electric signal is amplified by an amplifier circuit and then filtered by a filter realized by a bandpass filter or the like into only carrier frequency components. The output from this filter is
In the waveform shaping circuit, the waveform is shaped by discriminating it from a predetermined level, and then the waveform is input to the integration circuit, and the component of the modulated wave is extracted by integration. After that, the waveform is further shaped by an output circuit, and then output to a decoding circuit, a control circuit and the like in the subsequent stage. Since the integrator circuit is configured to include a capacitor and the like, the mask of the output is disabled by the immobilizing means in response to the output of the output circuit, for example, by short-circuiting the terminals of the capacitor. It is realized by doing.

Therefore, the output pulse is fed back to the input side of the amplifier circuit due to the voltage fluctuation due to the return to the high level at which the output of the low level output pulse ends, for example, the malfunction of the output. Can be prevented and the modulated wave can be accurately demodulated.

According to a second aspect of the present invention, the integrator circuit comprises a capacitor and a constant current source for supplying a charging current to the capacitor. Therefore, the immobilizing means includes the capacitor. To disable the integrator circuit and mask the output.

The integrating circuit, the filter, and the like configured as described above include a time delay element such as the capacitor. Therefore, the predetermined time is output from the output circuit in response to the output of the photoelectric conversion element. It is selected to be slightly longer than the time until the output is obtained. Therefore, even if an erroneous input occurs in the amplifier circuit due to the voltage fluctuation at the end of the output of the output pulse, the output due to the erroneous input is masked, and thus the output due to the erroneous operation can be reliably prevented.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The following will describe one embodiment of the present invention with reference to FIGS.

FIG. 1 is a block diagram showing an electrical configuration of a signal processing circuit 21 according to an embodiment of the present invention. The signal processing circuit 21 is used, for example, in a receiver such as a television receiver or a video tape recorder, and a pulse corresponding to the operation is used as a modulation wave from a transmitter, and a predetermined frequency sufficiently higher than the modulation wave, For example, a light emitting element such as a light emitting diode is driven by a transmission signal obtained by intensity-modulating a carrier wave of 38 kHz, and infrared light is transmitted.

On the other hand, on the receiver side, the infrared light is converted into an electric signal by the light receiving element 22 realized by a photodiode or the like, amplified by the amplifying circuit 23, and then, the predetermined frequency band by the BPF 24. Components of are filtered. The output from the BPF 24 is input to the discrimination level creating circuit 25. The discrimination level creating circuit 25 is realized by, for example, an integrating circuit or the like, and the BPF for a predetermined period is provided.
An average value of the outputs of 24 is obtained, and the average value is given to one input of the comparator 26 as a discrimination level. This comparator 26
The output from the BPF 24 is directly input to the other input of the. Therefore, the comparator 26 derives a high level output when the output from the BPF 24 is equal to or higher than the discrimination level, and derives a low level output when the output is less than the discrimination level, thus shaping the output from the BPF 24.

The output from the comparator 26 is input to an integrating circuit 27, and the modulated wave component is extracted by integration,
The output from the integrating circuit 27 is level-discriminated by a discrimination level having a hysteresis characteristic at a predetermined discrimination level, and a rectangular wave pulse corresponding to the modulated wave is demodulated.
The output from the comparator 28 is input to the base of the output transistor 29. The emitter of the output transistor 29 is grounded, and the collector is connected to the high-level power supply line 31 via the pull-up resistor 30 and the output terminal 32.

Therefore, in response to the modulated wave pulse from the transmitter, a high level output is derived from the comparator 28, this output is inverted by the output transistor 29 and the pull-up resistor 30, and the output terminal 32 is output. A so-called low-active output is derived from. Output terminal 3
The output from 2 is input to a control circuit, a decoding circuit or the like in the subsequent stage to decode the code of the modulated wave, and the operation corresponding to the decoded code is performed.

Further, in the present invention, a discharge current switching circuit 33 is provided in association with the integrating circuit 27. As will be described later, the discharge current switching circuit 33 responds to the output of the comparator 28 and increases the discharge current of the integrating circuit 27 for a predetermined time from the time when the output from the output terminal 32 rises to a high level. . Light receiving element 22 and each circuit element 23
-30 are integrated by being sealed with resin as an integrated circuit.

FIG. 2 is an electric circuit diagram of a stage subsequent to the comparator 26 in the signal processing circuit 21 for explaining the specific configurations of the integrating circuit 27, the comparator 28 and the discharge current switching circuit 33. The comparator 26 and the integrating circuit 27 are
A differential amplifier 41 that calculates the difference between the direct output from the BPF 24 and the discrimination level Vth1 from the discrimination level creating circuit 25, and a current that extracts a current corresponding to the potential difference between the two inputs obtained by the differential amplifier 41. A mirror circuit 42, a capacitor C1 charged by the current taken out by the current mirror circuit 42, and a constant current source 44 for discharging the electric charge of the capacitor C1 with a predetermined minute current value are configured. ing.

The output from the BPF 24 is input terminal P
1 is input to the base of one of the transistors Tr1 that constitutes the differential amplifier 41. Further, the output from the discrimination level creating circuit 25 is given from the input terminal P2 to the base of the other transistor Tr2. The emitters of these transistors Tr1 and Tr2 are commonly grounded via a constant current source 45. The collector of the transistor Tr2 is connected to the high level power supply line 31,
Further, the collector of the transistor Tr1 is connected to the power supply line 31 via one transistor Tr3 forming the current mirror circuit 42.

Therefore, from the collector of the other transistor Tr4 of the current mirror circuit 42, the terminal P
A current corresponding to the potential difference between P1 and P2 is output and applied to the capacitor C1 for charging. The connection point between the capacitor C1 and the collector of the transistor Tr4 is grounded via the constant current source 44, so that the capacitor C1 is discharged via the constant current source 44 with a minute predetermined current. .

The comparator 28 generally has a differential amplifier 5 for discriminating the level of the output from the integrating circuit 27.
1, a current mirror circuit 52 for setting a discrimination level having a hysteresis characteristic in the differential amplifier 51, a resistor R1 and a transistor Tr10, and a current mirror circuit 53 for extracting an output from the differential amplifier 51. It is equipped with.

The terminal voltage of the capacitor C1 which is the output of the integrating circuit 27 is applied to the base of one transistor Tr11 which constitutes the differential amplifier 51 via the detection signal line 54. The emitter of the transistor Tr11 is grounded via the constant current source 55 together with the emitter of the other transistor Tr12 forming a pair, and the collector is connected to the power supply line 31 via the one transistor Tr13 forming the current mirror circuit 53. It is connected. The collector of the transistor Tr12 is also
The current mirror circuit 52 is connected to the power supply line 31 through one transistor Tr15. The other transistor Tr of the current mirror circuit 52
Reference numeral 16 is for supplying a current for creating a discrimination level Vth2 to be given to the base of the transistor Tr12, and the resistor R is provided from the power supply line 31.
A current is supplied to one of the terminals. The other terminal of the resistor R1 is grounded via a constant current source 56. A current is supplied to the constant current source 56 from the power supply line 31 via the transistor Tr10. A reference voltage Vref determined by a constant voltage circuit (not shown) is input to the base of the transistor Tr10 via the input terminal P3.

Therefore, in the initial state in which the output voltage of the capacitor C1 is sufficiently low, the discrimination level Vth2 applied to the transistor Tr12 is higher than the input voltage to the transistor Tr11, and this discrimination level Vth2.
Vth2 = Vref−Vbe + R1 × i1 (1) However, Vbe is the base-emitter voltage of the transistor Tr10, and i1 is the current value of the constant current source 55.

That is, the base voltage of the transistor Tr12 is sufficiently higher than the base voltage of the transistor Tr11, and therefore the current i1 of the constant current source 55 is mostly supplied from the transistor Tr12, and the current mirror circuit 5 is supplied.
A current substantially equal to this current i1 is applied to the resistor R1 via the resistor R1.
It will be supplied to.

On the other hand, when the output voltage of the capacitor C1 becomes higher and the base voltage of the transistor Tr11 becomes higher than the base voltage of the transistor Tr12, the discrimination level Vth2 becomes Vth2 = Vref-Vbe (2) .

Therefore, the discrimination level Vth2 is determined by the above equation (1) when the output voltage of the capacitor C1 rises.
, And becomes lower as shown in the above equation (2) at the time of falling, thus realizing the hysteresis characteristic and preventing the hunting of the discrimination result of the differential amplifier 51.

The other transistor Tr14a of the current mirror circuit 53 is turned on when the output voltage of the capacitor C1 is equal to or higher than the discrimination level Vth2 and outputs a current to the resistor R2. The current is converted into a voltage by the resistor R2 and given to the base of the output transistor 29, and a low level rectangular wave pulse is output from the output terminal 32.

The discharge current switching circuit 33 generally has
The calculation result in the differential amplifier 51 is taken out and output terminal 3
A transistor Tr14b whose trigger input is the rise of the terminal voltage of 2 to a high level; a constant current source 61 and a capacitor C2 for performing a time-delaying operation of a predetermined time T2 described later in response to the trigger input; A resistor R3 and a transistor Tr21 for rapidly discharging the electric charge of the capacitor C1, a differential amplifier 62 and a current mirror circuit 63 for driving the transistor Tr21 for the time T2 are provided.

The transistor Tr14b constitutes a current mirror circuit 53 together with the transistor Tr13 together with the transistor Tr14a.
The collector current of r11 is detected by this transistor Tr14b. The emitter of the transistor Tr14b is connected to the power supply line 31, and the collector is grounded via constant current sources 64 and 65. A series circuit of a constant current source 61 and a capacitor C3 is interposed between the constant current sources 64 and 65 and the power supply line 31, and a connection point 69 between the constant current source 61 and the capacitor C3 is connected to the capacitor C2. It is grounded via a constant current source 66.

On the other hand, the discrimination level created by the diodes D1 and D2 and the constant current source 67 is input to the base of one transistor Tr23 of the differential amplifier 62, and the collector of the transistor Tr23 is the power source. It is connected to the line 31 and its emitter is grounded through the constant current source 68 together with the emitter of the other transistor Tr24. The base of the transistor Tr24 is supplied with the potential of the connection point 69, and the collector is one transistor Tr of the current mirror circuit 63.
It is connected to the power supply line 31 via 25. The other transistor Tr2 of the current mirror circuit 63
6, its emitter is connected to the power supply line 31,
The collector is connected to the connection point 70 between the capacitor C2 and the constant current source 66. From the connection point 70, a resistor R4
The drive output of the transistor Tr21 is derived via the.

When the output terminal 32 is at a low level, the transistor Tr14b is conducting, and therefore the capacitor C2 is charged by the current from the constant current source 61 via the constant current source 66, and the potential at the connection point 69 is high. It is a level. Therefore, the transistor Tr24
Is higher than the base voltage of the transistor Tr23, the transistor Tr26 is conducting, and thus the transistor Tr21 is shut off. At this time, the capacitor C3 is discharged.

When the voltage at the output terminal 32 returns to the high level, the transistor Tr14b is cut off and the capacitor C
3, the charging is started via the constant current sources 64 and 65. Therefore, the potential of the connection point 69 becomes low level, the capacitor C2 is discharged, the transistor Tr26 is cut off, the transistor Tr21 is turned on, and the capacitor C1 is discharged with a discharge current sufficiently larger than the current value of the constant current source 44. Therefore, the integration operation by the capacitor C1 is stopped.

After that, a charging current is supplied to the capacitor C2 via the constant current source 61 and the constant current source 66, whereby the potential of the connection point 69 rises, and the base voltage of the transistor Tr24 again changes the base voltage of the transistor Tr23. When the voltage becomes equal to or higher than the voltage, the transistor Tr26 becomes conductive, the potential of the connection point 70 rises, and the transistor Tr21 cuts off. Therefore, the capacitor C1 can be charged again and the integration operation is performed.

FIG. 3 is a waveform diagram of each part of the signal processing circuit 21 for explaining the above operation. From the transmitter, the modulated wave shown in FIG.
Infrared light corresponding to a transmission signal created by intensity-modulating the carrier indicated by is output, and the infrared light is photoelectrically converted by the light receiving element 22 and converted into an electric signal shown in FIG. The electric signal from the light receiving element 22 is
The signal is amplified by the amplifier circuit 23, and further 38 by the BPF 24.
By filtering the carrier frequency component of kHz, the edge is rounded and the signal period T1 is expanded as shown in FIG. 3 (d) due to the time delay element such as the capacitor forming the BPF 24. Become. This BPF
The output from 24 is the discrimination level Vth in the comparator 26.
When the level is discriminated at 1, it becomes as shown in FIG. Therefore, the output of the integrating circuit 27 becomes as shown in FIG.
The output from the output terminal 32 obtained by discriminating the level at th2 is as shown in FIG.

Therefore, at the time t1 when the output voltage of the output terminal 32 returns to the high level, the output pulse from the output terminal 32 is fed back to the input side of the amplifier circuit 23 as shown by the reference sign β1 and is simulated. Even if a pulse is input to the device, from the time t1, a predetermined time T2 determined by the current supply amount of the constant current source 61 per unit time and the electrostatic capacitance of the capacitor C2, for example, several hundreds μsec. Only the capacitor C2 is the transistor Tr21
The discharge is performed with a discharge current sufficiently larger than that of the constant current source 44 via, and the integration operation is stopped and the output of the output terminal 32 is masked. Therefore, the integration circuit 27
Therefore, an erroneous output as indicated by reference sign β2 is not derived, and therefore, no pulse is erroneously output from the output terminal 32 as shown in FIG.

Thus, the signal processing circuit 21 according to the present invention
Then, when outputting the low active pulse corresponding to the modulated wave in the transmitter from the output terminal 32, the response delay time in the time delay element such as the BPF 24 and the integrating circuit 27 is restored when the terminal voltage rises to the high level. The discharge current switching circuit 33 bypasses the terminals of the capacitor C1 of the integrating circuit 27 for the time T2 corresponding to the above, and deactivates the integrating circuit 27. Therefore, it is possible to prevent an erroneous pulse from being output from the output terminal 32, and it is possible to accurately demodulate the modulated wave.

[0046]

As described above, the signal processing circuit of the photoelectric conversion element according to the first aspect of the present invention amplifies, band-pass filters, and shapes the signal from the photoelectric conversion element, and then removes the carrier component by the integrating circuit. In order to shape the waveform in the output circuit and output the modulated wave component, a disabling means is provided in relation to the integration circuit, and the integration circuit is disabled for a predetermined time after the output pulse from the output circuit is restored. Activate and mask the output.

Therefore, for example, in the case of a low active output pulse, even if an erroneous input due to the feedback of the output pulse is given to the input of the amplifier circuit due to the voltage fluctuation of the output at the time of returning to the high level, the erroneous input The output of the output circuit for is stopped. Therefore, it is possible to accurately demodulate only the modulated wave, and it is possible to prevent an input error and a malfunction in the decoding circuit and control circuit in the subsequent stage.

In the signal processing circuit of the photoelectric conversion element according to the second aspect of the present invention, as described above, when the integrating circuit is configured to include the capacitor and the constant current source, the immobilizing means is the capacitor. By masking the output by bypassing, and the predetermined time for masking the output is slightly longer than the time delay due to the time delay element such as the filter and the integration circuit for the output of the photoelectric conversion element. Is set.

Therefore, it is possible to reliably prevent an erroneous output from the output circuit due to an erroneous input of the output of the output circuit to the input of the integrating circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing an electrical configuration of a signal processing circuit according to an embodiment of the present invention.

FIG. 2 is an electric circuit diagram showing a specific configuration of a part of the signal processing circuit shown in FIG.

FIG. 3 is a waveform diagram for explaining the operation of the signal processing circuit shown in FIG.

FIG. 4 is a block diagram showing an electrical configuration of a typical prior art signal processing circuit.

5 is a waveform diagram for explaining the operation of the signal processing circuit shown in FIG.

FIG. 6 is a waveform chart for explaining a problem that occurs when the signal processing circuit shown in FIG. 4 is integrated into an integrated circuit.

[Explanation of symbols]

 21 signal processing circuit 22 light receiving element (photoelectric conversion element) 23 amplification circuit 24 BPF (filter) 25 discrimination level creating circuit (waveform shaping circuit) 26 comparator (waveform shaping circuit) 27 integration circuit 28 comparator (output circuit) 29 output Transistor (output circuit) 32 Output terminal 33 Discharge current switching circuit (immobilizing means) 41 Differential amplifier 42 Current mirror circuit 51 Differential amplifier 52 Current mirror circuit 53 Current mirror circuit 62 Differential amplifier 63 Current mirror circuit C1 Capacitor ( Integrator circuit) C2 capacitor

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H03D 1/04 H04L 25/49

Claims (2)

[Claims] 1. A light emitting element is driven in response to an output obtained by intensity-modulating a carrier wave of a predetermined frequency, using a desired pulse to be transmitted as a modulation wave, and is obtained in response to light from the light emitting element. An amplification circuit for amplifying an electric signal from a photoelectric conversion element, a filter for extracting a desired carrier frequency component from the output of the amplification circuit, a waveform shaping circuit for shaping the output from the filter, and the waveform shaping circuit. Of the photoelectric conversion element including an integrator circuit that extracts the component of the modulated wave from the output of the output circuit and an output circuit that discriminates the output of the integrator circuit into an output waveform by level discrimination, In the signal processing circuit, the product is provided in association with the integration circuit, responds to the output of the output circuit, and outputs the pulse output from the output circuit for a predetermined time from the restoration of the pulse. A signal processing circuit for a photoelectric conversion element, comprising a deactivating means for deactivating a branch circuit. 2. The integrating circuit comprises a capacitor and a constant current source for supplying a charging current to the capacitor, and the immobilizing means deactivates the integrating circuit by bypassing the capacitor. The predetermined time is selected to be slightly longer than the delay time due to the time delay element such as the filter and the integrating circuit until the output is obtained from the output circuit in response to the output of the photoelectric conversion element. Signal processing circuit for photoelectric conversion element.