JP3224485B2 - Signal processing circuit of photoelectric conversion element - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing circuit of a photoelectric conversion element which is preferably used as a receiver of a remote control device using infrared rays in home electric appliances such as a television receiver and a video tape recorder. .

[0002]

2. Description of the Related Art FIG. 4 is a block diagram showing the electrical configuration of a typical prior art signal processing circuit 1 used in a receiver of a remote control device as described above. From the transmitter, for example, a pulse corresponding to the operation of the television receiver or the video tape recorder is used as a modulation wave, and a predetermined frequency sufficiently higher than the modulation wave, for example, 38 kHz, is used.
A light-emitting element such as a light-emitting diode is driven by a transmission signal obtained by intensity-modulating the carrier wave to transmit infrared light.

On the receiver side, on the other hand, the infrared light is converted into an electric signal by a light receiving element 2 realized by a photodiode or the like, and is amplified by an amplifier circuit 3, and then a bandpass filter (abbreviated BPF). At 4 the components of the predetermined frequency band are filtered. The output from the BPF 4 is input to a discrimination level creation circuit 5, which is realized by, for example, an integration circuit or the like, calculates an average value of the output of the BPF 4 over a predetermined period, and converts the average value to the discrimination level. To one input of the comparator 6. The output from the BPF 4 is directly input to the other input of the comparator 6. Therefore, the comparator 6 derives a high-level output when the output from the BPF 4 is equal to or higher than the discrimination level, and derives a low-level output when the output is less than the discrimination level, and thus shapes the output from the BPF 4.

The output from the comparator 6 is input to an integrating circuit 7 to extract the component of the modulated wave, and the output from the integrating circuit 7 is discriminated at a predetermined discriminating level by a comparator 8 having a hysteresis characteristic. Then, a rectangular pulse corresponding to the modulated wave is demodulated. The output from the comparator 8 is input to the base of the output transistor 9. The emitter of the output transistor 9 is grounded, and the collector is connected to a high-level power supply line 11 via a pull-up resistor 10 and to an output terminal 12.

Accordingly, a high-level output is derived from the comparator 8 in response to the modulated wave pulse from the transmitter, and this output is inverted by the output transistor 9 and the pull-up resistor 10 and is output to the output terminal 12. , A so-called low active output is derived. The output from the output terminal 12 is input to a control circuit, a decoding circuit, and the like at the subsequent stage, where the code of the modulated wave is decoded, and an operation corresponding to the decoded code is performed.

FIG. 5 is a waveform diagram for explaining the operation of the signal processing circuit 1. From the transmitter, FIG.
FIG. 5 shows only the period in which the modulated wave shown in FIG.
A carrier having a predetermined frequency shown in (b) is modulated,
A transmission signal shown in FIG. 5C is created, and light corresponding to the transmission signal is transmitted.

[0007] Therefore, from the light receiving element 2, FIG.
An electric signal shown in (c) is derived. This electrical signal
The signal is amplified by the amplifier circuit 3 and further filtered by the BPF 4, and as shown in FIG. 5D, a blunt waveform having a slow rising and falling due to a delay element such as an integration element of the BPF 4. Become. This waveform is subjected to level discrimination in the discrimination level creation circuit 5 at the discrimination level vth1 obtained from the average value of the waveform as described above, whereby a waveform as shown in FIG. 5E is obtained.

Therefore, when the output of the comparator 6 is integrated by the integration circuit 7, the result becomes as shown in FIG. 5 (f). After the comparator 8 shapes the waveform at the discrimination level vth2, the output transistor 9 and the pull-up resistor 10 In this case, the output shown in FIG. 5G is derived from the output terminal 12.

In this manner, the modulated wave on the transmitter side is demodulated, and an operation corresponding to the code represented by the modulated wave can be performed.

[0010]

In the signal processing circuit 1 constructed as described above, the components from the amplifier circuit 3 to the output transistor 9 and the pull-up resistor 10 are integrated as an integrated circuit including the light receiving element 2. Therefore, each circuit element is integrally sealed in the resin.
For this reason, the voltage fluctuation of the output terminal 12 is fed back to the input of the amplifier circuit 3 via the resin, and the signal processing as described above is performed similarly to the electric signal from the light receiving element 2.
There is a problem that a malfunction occurs in the output.

That is, FIG. 5A and FIG.
Similarly to FIG. 6B, when the carrier wave shown in FIG. 6B is modulated by the modulated wave shown in FIG. 6A, the output from the light receiving element 2 is shown in FIG. 6 (d), the output from the comparator 6 is shown in FIG. 6 (e), the output from the integration circuit 7 is shown in FIG. 6 (f), and the output terminal 1
The output from 2 is shown in FIG.

The output voltage from the output terminal 12 is denoted by reference numeral α1.
When the signal rises as indicated by the symbol, a pulse as indicated by reference numeral α2 is superimposed on the output from the light receiving element 2 in the amplifier circuit 3. Therefore, this pulse is subjected to signal processing in the same manner as the output from the regular light receiving element 2, and a pulse due to a malfunction as indicated by reference numeral α3 is output from the output terminal 12. Therefore, there is a problem that the code cannot be decoded or a malfunction occurs.

An object of the present invention is to provide a signal processing circuit of a photoelectric conversion element capable of accurately demodulating a modulated wave from an output of the photoelectric conversion element.

[0014]

According to a first aspect of the present invention, there is provided a signal processing circuit for a photoelectric conversion element which responds to an output obtained by intensity-modulating a carrier having a predetermined frequency using a desired pulse to be transmitted as a modulation wave. Circuit for amplifying an electric signal from a photoelectric conversion element obtained in response to light from the light emitting element, and a filter for extracting a desired carrier frequency component from an output of the amplifier circuit A waveform shaping circuit for shaping the output from the filter, an integration circuit for extracting the component of the modulated wave from the output of the waveform shaping circuit, and an output circuit for shaping the output of the integration circuit into an output waveform by level discrimination. A signal processing circuit of a photoelectric conversion element configured by integrating at least the respective circuits, provided in association with the integration circuit, and responsive to an output of the output circuit. Characterized in that it comprises a deactivation means for deactivation of the integrating circuit by pre-determined time from the return of the pulse output from the output circuit.

According to a second aspect of the present invention, in the signal processing circuit for a photoelectric conversion element, the integration circuit includes a capacitor and a constant current source for supplying a charging current to the capacitor, and the deactivating means. Deactivates the integration circuit by bypassing the capacitor, and the predetermined time is determined by a time delay element such as the filter and the integration circuit until an output is obtained from the output circuit in response to the output of the photoelectric conversion element. It is characterized in that it can be obtained slightly longer than the delay time.

[0016]

According to the first aspect of the present invention, in a signal processing circuit of a photoelectric conversion element used as a receiver of a remote control device for home appliances using infrared light, a predetermined time is required when an output pulse corresponding to a modulated wave is restored. Mask the output.

That is, from a transmitter, light is emitted from a light emitting element in response to an intensity-modulated output of a carrier having a predetermined frequency, which is a pulse to be transmitted representing a remote operation code or the like as a modulation wave. The light is emitted, and an electrical signal responsive to the light is output from the photoelectric conversion element. This electric signal is amplified by an amplifier circuit and then filtered by a filter realized by a band-pass filter or the like into only a carrier frequency component. The output from this filter is
After the waveform is shaped by, for example, discrimination from a predetermined level in the waveform shaping circuit, the signal is input to the integration circuit, and the component of the modulated wave is extracted by integration. Thereafter, the waveform is further shaped by an output circuit, and then output to a decoding circuit, a control circuit, and the like at a subsequent stage. The integration circuit includes a capacitor and the like. Therefore, the mask of the output is inactivated by the deactivating means in response to the output of the output circuit, for example, by short-circuiting the terminals of the capacitor. It is realized by doing.

Therefore, an output malfunction occurs because the output pulse is fed back to the input side of the amplifier circuit due to the voltage fluctuation due to the return to the high level at which the output of the output pulse of the low level ends, for example, from the output circuit. And the modulated wave can be accurately demodulated.

According to a second aspect of the present invention, the integrating circuit includes a capacitor and a constant current source for supplying a charging current to the capacitor. To deactivate the integration circuit and mask the output.

The integrating circuit and the filter configured as described above include a time delay element such as the capacitor. Therefore, the predetermined time is set by the output circuit in response to the output of the photoelectric conversion element. It is chosen slightly longer than the time until the output is obtained. Therefore, even if an erroneous input occurs to the amplifier circuit due to the voltage fluctuation at the end of output of the output pulse, the output due to the erroneous input is masked, and the output due to the erroneous operation can be reliably prevented.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 is a block diagram showing an electrical configuration of a signal processing circuit 21 according to one embodiment of the present invention. The signal processing circuit 21 is used in a receiver such as a television receiver or a video tape recorder, and a pulse corresponding to an operation is used as a modulation wave from a transmitter, and a predetermined frequency higher than the modulation wave, For example, a light emitting element such as a light emitting diode is driven by a transmission signal obtained by intensity-modulating a carrier of 38 kHz to transmit infrared light.

On the other hand, on the receiver side, the infrared light is converted into an electric signal by a light receiving element 22 implemented by a photodiode or the like, and is amplified by an amplifier circuit 23. Are filtered. The output from the BPF 24 is input to a discrimination level creation circuit 25. The discrimination level creation circuit 25 is realized by, for example, an integration circuit or the like, and has a BPF for a predetermined period.
An average value of the outputs of the comparator 24 is obtained, and the average value is given to one input of the comparator 26 as a discrimination level. This comparator 26
The output from the BPF 24 is directly input to the other input of the. Therefore, the comparator 26 derives a high-level output when the output from the BPF 24 is equal to or higher than the discrimination level, derives a low-level output when the output is lower than the discrimination level, and thus shapes the output from the BPF 24.

The output from the comparator 26 is input to an integration circuit 27, and the component of the modulated wave is extracted by integration.
The output from the integrating circuit 27 is level-discriminated by a comparator 28 having a hysteresis characteristic at a predetermined discrimination level, and a rectangular pulse corresponding to the modulated wave is demodulated.
The output from the comparator 28 is input to the base of the output transistor 29. The emitter of the output transistor 29 is grounded, and the collector is connected to a high-level power supply line 31 via a pull-up resistor 30 and to an output terminal 32.

Therefore, in response to the modulated wave pulse from the transmitter, a high-level output is derived from the comparator 28, and this output is inverted by the output transistor 29 and the pull-up resistor 30, and is output to the output terminal 32. , A so-called low active output is derived. Output terminal 3
The output from 2 is input to a control circuit, a decoding circuit, and the like at the subsequent stage, where the code of the modulated wave is decoded, and an operation corresponding to the decoded code is performed.

In the present invention, a discharge current switching circuit 33 is provided in connection with the integration circuit 27. The discharge current switching circuit 33 responds to the output of the comparator 28 and increases the discharge current of the integration circuit 27 for a predetermined time from the time when the output from the output terminal 32 rises to a high level, as described later. . Light receiving element 22 and each circuit element 23
30 are integrated with a resin as an integrated circuit by sealing.

FIG. 2 is an electric circuit diagram after the comparator 26 in the signal processing circuit 21 for explaining the specific configuration of the integration circuit 27, the comparator 28, and the discharge current switching circuit 33. The comparator 26 and the integrating circuit 27
A differential amplifier 41 for calculating the difference between the direct output from the BPF 24 and the discrimination level Vth1 from the discrimination level creation circuit 25, and a current for extracting a current corresponding to a potential difference between two inputs obtained by the differential amplifier 41. A mirror circuit 42, a capacitor C1 charged by the current extracted by the current mirror circuit 42, and a constant current source 44 for discharging the electric charge of the capacitor C1 with a predetermined small current value. ing.

The output from the BPF 24 is input terminal P
1 and is provided to the base of one transistor Tr1 constituting the differential amplifier 41. The output from the discrimination level creation circuit 25 is provided from the input terminal P2 to the base of the other transistor Tr2. The emitters of these transistors Tr1 and Tr2 are commonly grounded via a constant current source 45. The collector of the transistor Tr2 is connected to the high-level power supply line 31,
The collector of the transistor Tr1 is connected to the power supply line 31 via one transistor Tr3 forming a current mirror circuit 42.

Accordingly, the collector of the other transistor Tr4 of the current mirror circuit 42 is supplied from the terminal P
A current corresponding to the potential difference between P1 and P2 is output and supplied to the capacitor C1 to perform charging. The connection point between the capacitor C1 and the collector of the transistor Tr4 is grounded via the constant current source 44. Therefore, the capacitor C1 is discharged with a small predetermined current via the constant current source 44. .

The comparator 28 generally includes a differential amplifier 5 for discriminating the level of the output from the integrating circuit 27.
1, a current mirror circuit 52 for setting a discrimination level having a hysteresis characteristic in the differential amplifier 51, a resistor R1 and a transistor Tr10, and a current mirror circuit 53 for extracting an output from the differential amplifier 51. It is provided with.

The terminal voltage of the capacitor C 1, which is the output of the integration circuit 27, is applied to the base of one transistor Tr 11 of the differential amplifier 51 via the detection signal line 54. The emitter of this transistor Tr11 is grounded via a constant current source 55 together with the emitter of the other transistor Tr12 forming a pair, and the collector is connected to the power supply line 31 via one transistor Tr13 constituting the current mirror circuit 53. It is connected. Also, the collector of the transistor Tr12 is
The current mirror circuit 52 is connected to the power supply line 31 via one transistor Tr15. The other transistor Tr of the current mirror circuit 52
The reference numeral 16 is for supplying a current for generating a discrimination level Vth2 to be given to the base of the transistor Tr12.
1 to one terminal. The other terminal of the resistor R1 is grounded via a constant current source 56. The constant current source 56 is supplied with current from the power supply line 31 via the transistor Tr10. A reference voltage Vref determined by a not-shown constant voltage circuit is input to the base of the transistor Tr10 via an input terminal P3.

Therefore, in the initial state where the output voltage of the capacitor C1 is sufficiently low, the discrimination level Vth2 applied to the transistor Tr12 becomes higher than the input voltage to the transistor Tr11, and this discrimination level Vth2
Vth2 = Vref−Vbe + R1 × i1 (1) Here, Vbe is a base-emitter voltage of the transistor Tr10, and i1 is a current value of the constant current source 55.

That is, the base voltage of the transistor Tr12 is sufficiently higher than the base voltage of the transistor Tr11, so that almost all of the current i1 of the constant current source 55 is supplied from the transistor Tr12 and the current mirror circuit 5
2, a current substantially equal to the current i1 is applied to the resistor R1.
This is because it will be supplied to.

On the other hand, when the output voltage of the capacitor C1 increases and the base voltage of the transistor Tr11 becomes higher than the base voltage of the transistor Tr12, the discrimination level Vth2 becomes as follows: Vth2 = Vref-Vbe (2) .

Therefore, when the output voltage of the capacitor C1 rises, the discrimination level Vth2 is calculated by the equation (1).
, And becomes low as shown by the above equation (2) at the time of falling. Thus, the hysteresis characteristic is realized, and hunting of the discrimination result of the differential amplifier 51 can be prevented.

The other transistor Tr14a of the current mirror circuit 53 conducts when the output voltage of the capacitor C1 is equal to or higher than the discrimination level Vth2, and outputs a current to the resistor R2. The current is converted to a voltage by the resistor R2 and applied to the base of the output transistor 29, and a low-level rectangular wave pulse is output from the output terminal 32.

The discharge current switching circuit 33 is generally
The operation result of the differential amplifier 51 is taken out, and the output terminal 3
A constant current source 61 and a capacitor C2 for performing a timed operation for a predetermined time T2, which will be described later, in response to the trigger input; It comprises a resistor R3 and a transistor Tr21 for rapidly discharging the electric charge of the capacitor C1, and a differential amplifier 62 and a current mirror circuit 63 for driving the transistor Tr21 for the time T2.

The transistor Tr14b and the transistor Tr14a together with the transistor Tr13 form a current mirror circuit 53.
The collector current of r11 is detected by the transistor Tr14b. The emitter of the transistor Tr14b is connected to the power supply line 31, and the collector is grounded via constant current sources 64 and 65. A series circuit of a constant current source 61 and a capacitor C3 is interposed between the constant current sources 64 and 65 and the power supply line 31, and a connection point 69 between the constant current source 61 and the capacitor C3 is connected to the capacitor C2. It is grounded via a constant current source 66.

On the other hand, a discrimination level created by diodes D1 and D2 and a constant current source 67 is input to the base of one transistor Tr23 of the differential amplifier 62. The collector of the transistor Tr23 is connected to the power supply. The emitter is connected to the line 31 and the emitter is grounded via the constant current source 68 together with the emitter of the other transistor Tr24. The potential of the connection point 69 is given to the base of the transistor Tr24, and the collector of the transistor Tr24 is connected to one transistor Tr of the current mirror circuit 63.
25 is connected to the power supply line 31. The other transistor Tr2 of the current mirror circuit 63
6 has its emitter connected to the power supply line 31;
The collector is connected to a connection point 70 between the capacitor C2 and the constant current source 66. From the connection point 70, a resistor R4
The driving output of the transistor Tr21 is derived through the above.

When the output terminal 32 is at the low level, the transistor Tr14b is conducting, so that the capacitor C2 is charged by the current from the constant current source 61 via the constant current source 66, and the potential at the connection point 69 is high. Level. Therefore, the transistor Tr24
Is higher than the base voltage of the transistor Tr23, the transistor Tr26 is turned on, and the transistor Tr21 is turned off. At this time, the capacitor C3 is discharged.

When the voltage at the output terminal 32 returns to the high level, the transistor Tr14b is cut off, and the capacitor C
In 3, charging is started via the constant current sources 64 and 65. Therefore, the potential of the node 69 becomes low level, the capacitor C2 discharges, the transistor Tr26 shuts off, the transistor Tr21 conducts, and the capacitor C1 discharges with a discharge current sufficiently larger than the current value of the constant current source 44. The integration operation by the capacitor C1 is stopped.

Thereafter, a charging current is supplied to the capacitor C2 via the constant current source 61 and the constant current source 66, whereby the potential of the connection point 69 is increased, and the base voltage of the transistor Tr24 is again increased to the base of the transistor Tr23. When the voltage becomes equal to or higher than the voltage, the transistor Tr26 becomes conductive, the potential of the connection point 70 rises, and the transistor Tr21 is cut off. Therefore, the capacitor C1 can be charged again and performs the integration operation.

FIG. 3 is a waveform diagram of each part of the signal processing circuit 21 for explaining the above-described operation. From the transmitter, the modulated wave shown in FIG.
The infrared light corresponding to the transmission signal created by intensity-modulating the carrier indicated by the symbol is output, and the infrared light is photoelectrically converted by the light receiving element 22 and is converted into the electric signal shown in FIG. The electric signal from the light receiving element 22 is
The signal is amplified by the amplifier circuit 23, and
By filtering the carrier frequency component of kHz, the edge is rounded and the signal period T1 is expanded as shown in FIG. 3D by a time delay element such as a capacitor constituting the BPF 24. Become. This BPF
The output from the comparator 24 is output to the comparator 26 at the discrimination level Vth.
When the level is discriminated at 1, the result is as shown in FIG. Therefore, the output of the integrating circuit 27 is as shown in FIG.
The output from the output terminal 32 obtained by level discrimination at th2 is as shown in FIG.

Therefore, at time t1 when the output voltage of the output terminal 32 returns to the high level, the output pulse from the output terminal 32 is fed back to the input side of the amplifier circuit 23 as indicated by reference numeral β1 and is pseudo. From the time t1, a predetermined time T2 determined by the current supply amount per unit time of the constant current source 61 and the capacitance of the capacitor C2, for example, several hundred μsec. Only, the capacitor C2 is connected to the transistor Tr21.
, Discharge is performed with a discharge current sufficiently larger than that of the constant current source 44, the integration operation is stopped, and the output of the output terminal 32 is masked. Therefore, the integration circuit 27
Does not derive an erroneous output as indicated by reference numeral β2 from the output terminal 32, and therefore does not erroneously output a pulse from the output terminal 32 as shown in FIG.

As described above, the signal processing circuit 21 according to the present invention
Then, when a low active pulse corresponding to the modulated wave in the transmitter is output from the output terminal 32, the response delay time due to the time delay element such as the BPF 24 and the integration circuit 27 at the time of the return when the terminal voltage rises to the high level. In this case, the discharge current switching circuit 33 bypasses the terminals of the capacitor C1 of the integration circuit 27 and inactivates the integration circuit 27 for a time T2 corresponding to Therefore, it is possible to prevent an erroneous pulse from being output from the output terminal 32, and to accurately demodulate the modulated wave.

[0046]

As described above, the signal processing circuit of the photoelectric conversion element according to the first aspect of the present invention amplifies and band filters the signal from the photoelectric conversion element and shapes the waveform, and then removes the carrier component by the integration circuit. In order to output the modulated wave component by shaping the waveform in the output circuit, a deactivating means is provided in connection with the integration circuit, and the integration circuit cannot be operated for a predetermined time from when the output pulse from the output circuit is restored. Activate and mask output.

Therefore, for example, when the output pulse is low active, even if an erroneous input due to the feedback of the output pulse is given to the input of the amplifier circuit due to a voltage fluctuation of the output at the time of return to the high level, the erroneous input is performed. Output of the output circuit is stopped. Therefore, it is possible to accurately demodulate only the modulated wave, and to prevent an input error or a malfunction in a decoding circuit or a control circuit at a subsequent stage.

In the signal processing circuit for a photoelectric conversion element according to the second aspect of the present invention, as described above, when the integrating circuit includes a capacitor and a constant current source, the deactivating means includes the capacitor. Masking the output by bypassing, and the predetermined time for masking the output is slightly longer than the time delay due to the time delay element such as the filter and the integration circuit with respect to the output of the photoelectric conversion element. Is set.

Therefore, erroneous output from the output circuit due to erroneous input of the output of the output circuit to the input of the integration circuit can be reliably prevented.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an electrical configuration of a signal processing circuit according to an embodiment of the present invention.

FIG. 2 is an electric circuit diagram showing a specific configuration of a part of the signal processing circuit shown in FIG.

FIG. 3 is a waveform chart for explaining an operation of the signal processing circuit shown in FIG. 1;

FIG. 4 is a block diagram showing an electrical configuration of a typical conventional signal processing circuit.

FIG. 5 is a waveform chart for explaining an operation of the signal processing circuit shown in FIG. 4;

FIG. 6 is a waveform diagram for explaining a problem that occurs when the signal processing circuit shown in FIG. 4 is integrated into an integrated circuit.

[Explanation of symbols]

 Reference Signs List 21 signal processing circuit 22 light receiving element (photoelectric conversion element) 23 amplifying circuit 24 BPF (filter) 25 discrimination level creation circuit (waveform shaping circuit) 26 comparator (waveform shaping circuit) 27 integration circuit 28 comparator (output circuit) 29 output Transistor (output circuit) 32 Output terminal 33 Discharge current switching circuit (inactivating means) 41 Differential amplifier 42 Current mirror circuit 51 Differential amplifier 52 Current mirror circuit 53 Current mirror circuit 62 Differential amplifier 63 Current mirror circuit C1 Capacitor ( Integrating circuit) C2 capacitor

──────────────────────────────────────────────────の Continuation of the front page (51) Int.Cl. ⁷ identification code FI H04B 10/26 H04Q 9/00 301 (58) Investigated field (Int.Cl. ⁷ , DB name) H04B 10/00-10 / 28 H04J 14/00-14/08 H04B 1/10 H04Q 9/00 301

Claims (2)

(57) [Claims] 1. A light-emitting element is driven in response to an intensity-modulated output of a carrier having a predetermined frequency, using a desired pulse to be transmitted as a modulation wave, and obtained in response to light from the light-emitting element. An amplifier circuit for amplifying an electric signal from a photoelectric conversion element, a filter for extracting a desired carrier frequency component from an output of the amplifier circuit, a waveform shaping circuit for shaping a waveform of an output from the filter, and the waveform shaping circuit An integration circuit that extracts the component of the modulated wave from the output of the photoelectric conversion element, and an output circuit that shapes the output of the integration circuit into an output waveform by level-discriminating the output of the integration circuit. A signal processing circuit provided in association with the integration circuit, responsive to an output of the output circuit, for a predetermined time from a return of a pulse output from the output circuit; A signal processing circuit for a photoelectric conversion element, comprising a deactivating means for deactivating a branch circuit. 2. The integration circuit according to claim 1, wherein the integration circuit includes a capacitor, and a constant current source that supplies a charging current to the capacitor. The deactivating means deactivates the integration circuit by bypassing the capacitor. The predetermined time is selected to be slightly longer than a delay time due to a time delay element such as the filter and the integration circuit until the output is obtained from the output circuit in response to the output of the photoelectric conversion element. A signal processing circuit for a photoelectric conversion element according to claim 1 .