JPH0823234A - Frequency conversion circuit - Google Patents

Abstract

PURPOSE:To provide a frequency conversion circuit which is available over a wide frequency band and also suitable for integration of a circuit with no balance adjustment required. CONSTITUTION:A 1st input signal E1 is supplied to an input terminal 1, and a phase division circuit 2 outputs the signals of four channels including the phase division signals E1 to E4 from the signal E1. A 2nd input signal E5 is supplied to an input terminal 7. A switch signal generator 8 produces a signal E6 having 1/2 cycle of the signal E5 based on this signal E5 and furthermore produces the switch signals E7 to E10. The phase division signals E1... E4 are switched by the switches 3...6 in response to the switch signals E7... E10 respectively. Then an output signal E11 is acquired at a switch output terminal 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a frequency conversion circuit using a phase shift type single sideband signal generation method suitable for integration into an integrated circuit.

[0002]

2. Description of the Related Art As a general means for obtaining a frequency conversion circuit or a single sideband signal, for example, a multiplier, a balanced modulator, or a double balance mixer is used to suppress both sides of a carrier wave. After obtaining the band signals, each side band signal is selectively separated by a filter to generate a single side band signal, or the carrier wave and the signal are phase-shifted by 90 degrees, respectively. Is supplied to two balanced modulators, and the output signals from the two balanced modulators are added or subtracted to basically eliminate the use of a filter, and a phase shift type single side wave is performed. Means for generating band signals and the like are known (for example, CBS Publishing Co., Ltd. March 28, 1985).
Issued by B. P. Rasi, "Detailed Explanation of Digital / Analog Communication Method (First Volume)", pages 226 to 251).

[0003]

In the above frequency conversion circuit, when frequency conversion is performed using the first signal frequency f1 and the second signal frequency f2, the frequencies are relatively high and the use of a filter is a problem. If not, the sum frequency f1 + f2 and the difference frequency f1-f2 can be easily obtained by the multiplier and the filter. However, the first frequency is particularly high, and conversely the second frequency
If the frequency of is extremely low, selective separation with a filter is almost impossible.

A phase shift type single sideband signal generation circuit is used there. This circuit basically eliminates the need for a filter (actually, a simple filter is used), and if the characteristics and adjustments of the circuit are perfect, the target f1 + f2 or f1-f2 can be selected and they are close to each other. f1 is suppressed and no problem occurs. However, in an actual circuit, the balance of the balanced modulator is easily lost, and an error is likely to occur in the mixing level in the adding circuit and the subtracting circuit. Therefore, in selecting the output of either f1 + f2 or f1-f2 described above,
For example, when f1 + f2 is selected, f1 corresponding to a suppressed carrier wave in the vicinity and higher-order frequency components based on the f1-f2 component are mixed as unnecessary frequencies, and in some cases the filter cannot remove them. There was a problem. In particular, when integrated into an integrated circuit, each balance adjustment must be performed outside the integrated circuit, which causes a problem of an increase in the number of pins of the integrated circuit. The frequency conversion circuit used is not suitable for integrated circuits.

Here, a conventional example will be described with reference to FIGS. 8 and 9. FIG. 8 is a block diagram showing a conventional frequency conversion circuit, and FIG. 9 is an operation waveform diagram thereof. Now
It is assumed that the input signal A ₁ cosPt is supplied to the input terminal 101 and the input signal A ₂ cosCt is supplied to the input terminal 105. These input signals are respectively π / 2 phase shift circuit 103,
The π / 2 phase shift circuit 106 is supplied to the π / 2 phase shift circuit 10
The output of 3 becomes A ₁ sinPt, and the π / 2 phase shift circuit 10
The output of 6 is A ₂ sinCt. The multiplier (or balanced modulator) 102 multiplies the input signal A ₁ cosPt and the input signal A ₂ cosCt, and the multiplier (or balanced modulator) 104 outputs the output A ₁ si of the π / 2 phase shift circuit 103.
nPt and the output A ₂ sinCt of the π / 2 phase shift circuit 106
Are multiplied and the respective outputs become those shown in the following equations (1) and (2). _{A 1 cosPt · A 2 cosCt =} (A 1 A 2/2) {cos (PC) t + cos (P + C) t} (1) A 1 sinPt · A 2 sinCt = (A 1 A 2/2) {cos (PC) t-cos (P + C) t} (2) Therefore, in the arithmetic circuit 107, in the case of addition operation, A ₁ A
₂ cos (PC) t is obtained, and in the case of the subtraction operation, A ₁
A ₂ cos (P + C) t is obtained.

The operation waveform diagram of FIG. 9 will be described. Figure 9
In the above, a square wave is used for the signal input to the input terminal 105. However, the circuits to be actually used are not limited to the square wave, and in the circuits actually used, the multipliers 102 and 104 include a balanced modulator (double balance module). Or double balance mixer)
Is used to switch the signal at the input terminal 101 with the signal at the input terminal 105. Here, the switching output by the square wave input is obtained.

Input signal A input from the input terminal 101
Is supplied to the multiplier 102 and the π / 2 phase shift circuit 103,
The input signal C input from the input terminal 105 is the multiplier 1
02, π / 2 phase shift circuit 106. Multiplier 10
In 2, the input signal A and the input signal C are multiplied and the output signal E is output. In the multiplier 104, the π / 2 phase shift circuit 10
The output signal B of 3 and the output signal D of the π / 2 phase shift circuit 106 are multiplied and the output signal F is output. The arithmetic circuit 107 is an adder circuit, which adds the output signal E and the output signal F, obtains the difference frequency as described above, and outputs the output signal G. Although the waveform has a slight angle, the fundamental wave component signal H is output to the output terminal 110 via the low-pass filter 109.

In the figure, assuming that the frequency of the input signal A is 1, the fundamental frequency of the input signal C is four times that of the input signal A, and the frequency of the output signal H is three times that of the input signal A. The calculated result of 4 (frequency of input signal C) -1 (frequency of input signal A) = 3 (frequency of output signal H) can be confirmed.

The respective waveforms in the figure are waveforms in an ideal case, and in such a circuit, when the balance modulators 102 and 104 are slightly out of balance, the output signals E and F are waveforms as shown in the figure. Is not obtained, and the arithmetic circuit 107
Even in the adding operation in (1), if the mixing balance is slightly disturbed, a waveform like the output signal G cannot be obtained. From these things, balance adjustment is unnecessary and it can be used in a wide frequency band from low frequency to high frequency,
It has been desired to develop a frequency conversion circuit suitable for integrated circuits based on the phase shift single sideband signal generation method that can be adjusted.

[0010]

According to the present invention, in a frequency conversion circuit for obtaining a signal having a sum or difference of frequencies of a first input signal and a second input signal, a plurality of the first input signals are provided. Phase dividing means for generating a plurality of channel signals having different phases and outputting the same, and a plurality of switching signals having the same number as the plurality of channel signals but different phases from the second input signal. The switching signal generating means, the one channel signal of the plurality of channel signals and the one switching signal of the plurality of switching signals, which are the same as the number of the plurality of channel signals but are different from each other, are supplied, and in response to the one switching signal. Switch means for outputting the output from the plurality of switches from one end, and the switch means for outputting the one-channel signal. There is provided a frequency conversion circuit for.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The frequency conversion circuit of the present invention will be described in detail below. FIG. 1 is a block diagram of a circuit showing an example of a basic system of a frequency conversion circuit of the present invention, and FIG. 2 is an operation waveform diagram of the circuit of FIG. The fundamental frequency in the figures described below is the same as the operation waveform diagram of the conventional frequency conversion circuit shown in FIG. It is assumed that the input signal E1 (first input signal) is supplied to the input terminal 1. In the phase division circuit 2, a plurality of phase division signals are output from the input signal E1, but it is assumed that four channel signals E1 to E4 are output in relation to FIG. Input signal E5 is applied to input terminal 7.
It is assumed that the second input signal, which is a square wave here, but is not limited to this, is supplied. In the switching signal generating circuit 8, based on the input signal E5, 1/2 of the cycle of E5
The signal E6 having the cycle of is obtained, and the switching signals E7 to E10 are further generated. Phase division signals E1, ..., E4
Switch signals E7, 6 by switch 3, ..., 6 respectively.
,, E10, the output signal E is output to the switch output terminal 9 to which the output terminals of the switches 3, ..., 6 are connected.
You get 11. It can be seen that this is equivalent to the signal G of FIG. 9 of the conventional example.

In the phase division circuit 2, the input signal E1
Phase division is performed by equally dividing the phase angle 2π of the input signal by the number of channels (4 in this case) to obtain phase-divided signals E1 to E4 (the phase angle obtained by equally dividing the phase angle 2π of the input signal by the number of channels (here, 0 , Π / 2, π, 3π / 2) with a phase angle shift of E2, π with a phase shift of π / 2 with respect to E1.
E3 which is out of phase by E3, E4 which is out of phase by 3π / 2
) Is output. In addition, the switching signal generation circuit 8
Then, there is an output (switching output) by the phase angle obtained by dividing the phase angle 2π of the input signal E5 by the number of channels (4 in this case) (a signal with a duty ratio of 1 / the number of channels). E7 to E10 (these are shifted by a phase angle (here, 0, π / 2, π, 3π / 2) obtained by equally dividing the phase angle 2π of the input signal by the number of channels. Then, E8 having a phase shift of π / 2, E9 having a phase shift of π / 2, and E10 having a phase shift of 3π / 2 are generated.

Next, an embodiment will be described with reference to FIGS. FIG. 3 is a block diagram showing a first embodiment of the frequency conversion circuit of the present invention, and FIG. 2 is an operation waveform diagram thereof. The input signal E1 input from the input terminal 11 is supplied to the switch 15, and the phase inverting amplifier 13 having a gain of 1 is supplied.
Is supplied to the switch 17, and the output signal E3 of the phase inverting amplifier 13 which is the phase inverted of E1 is supplied to the switch 17. Also,
The input signal E1 is supplied to the π / 2 phase shifter 12, the output signal E2 of the π / 2 phase shifter 12 is supplied to the switch 16 and the phase inverting amplifier 14 having a gain of 1 to phase invert E2. The output signal E4 is supplied to the switch 18.

On the other hand, the input signal E5 input from the input terminal 19 is supplied to the inverter 20 and AND gates 24 and 25, and the output signal E6 of the inverter 20 is supplied to the Miller integrating circuit 21 and AND gates 26 and 27. From the output signal E7 of the Miller integrating circuit 21, the inverter 22
Gives E8, which is AND gate 24,2
7 is supplied to the inverter 23, and the output of the inverter 23 is supplied to the AND gates 25 and 26.

As a result, the AND gates 24, 25, 2
Output signals 6 and 27 are switching signals E9, E10, E1.
1, E12 and switches 15, 16, 17, 1 respectively
8 and the signals E1, ..., E4 are supplied to the switch 1 respectively.
, 18 are switched according to the switching signals E9, ..., E12, and the output signal E is output to the switch output terminal 28.
13 is output, and a simpler low pass filter (LPF) 2
Finally, the signal E14 having a substantially ideal waveform whose frequency has been converted is output to the output terminal 30 via 9.

In the frequency conversion circuit of the present invention, it is possible to smooth the angle-converted output waveform having the frequency converted. That is, it is possible to make the angle of the waveform fine and smooth the roughness of the waveform without using a low pass filter such as an LPF. The embodiment will be described with reference to FIGS.

FIG. 5 is a block diagram showing a second embodiment of the frequency conversion circuit of the present invention, and FIGS. 6 and 7 are operation waveform diagrams thereof. The input signal E1 input from the input terminal 31 is supplied to the switch 39, and also π / 4 and π /, respectively.
It is supplied to the phase shifters 32, 33, and 34 that perform a phase shift of 2, 3π / 4, and is further supplied to the switch 43 via the phase inverting amplifier 35 having a gain of 1. The outputs of the phase shifters 32, 33 and 34 are supplied to the switches 40, 41 and 42, respectively, and
The signals are supplied to switches 44, 45 and 46 via phase inverting amplifiers 36, 37 and 38 having a gain of 1, respectively. As a result, the switches 39, ..., 46 are respectively provided with E1 ,.
E8 signal is supplied.

On the other hand, the input signal E9 input from the input terminal 47 receives the inverter 48, AND gates 58 and 61, EX.
The output signal E10 of the inverter 48 is supplied to the OR gate 52, and the Miller integrating circuit 49 and AND gates 62 and 65 are used.
Is supplied to Output signal E11 of Miller integrating circuit 49
From the above, E12 is obtained by the inverter 50, E12 is supplied to the AND gates 59 and 64, and the EX-OR gate 52, and the output of the inverter 51 is AND gates 60 and 63.
Is supplied to Output signal E of EX-OR gate 52
13 is supplied to the Miller integrating circuit 53, and the output signal E14 of the Miller integrating circuit 53 is supplied to the inverter 55 and the 1/2 frequency divider 57 via the inverter 54, and the inverter 5
The output signal E15 of No. 5 is supplied to the 1/2 frequency divider 56. From the 1/2 frequency divider 56, E16 (the output Q of the 1/2 frequency divider 56 shown in the figure) and a signal obtained by inverting the phase of E16 (the output bar Q of the 1/2 frequency divider 56 shown in the figure) are output. Has been output,
E16 is supplied to AND gates 58 and 63, and a signal obtained by inverting the phase of E16 is supplied to AND gates 59 and 62. 1 /
The 2 frequency divider 57 outputs E17 (the output Q of the 1/2 frequency divider 57 shown in the figure) and a signal obtained by inverting the phase of E17 (the output bar Q of the 1/2 frequency divider 57 shown in the figure). And E17 is A
The signal obtained by inverting the phase of E17 to the ND gates 60 and 65 is A
It is supplied to the ND gates 61 and 64.

With these, the AND gates 58, ..., 6
, E25 are supplied to the switches 39, ..., 46, respectively, and the signals E1, ..., E8 are switched by the switches 39 ,.
..., switched according to E25, switch output terminal 66
Then, the output signal E26 is outputted, and finally, the signal E27 having a substantially ideal waveform whose frequency has been converted is outputted to the output terminal 68 via the simple low pass filter (LPF) 67.

In the circuit of FIG. 5, the number of channels is eight, so that the frequency-converted output waveform also has finer waveform density, as indicated by E26 in FIG. Therefore, the low-pass filter 67 does not require sharpness as a filter characteristic, and a good waveform can be obtained with a simple low-pass filter.

The frequency conversion circuit of the present invention outputs the sum frequency in the multiplication operation when the order of the signals supplied to the respective switches is reversed. In that case, for example, the signals E9 to E12 in the circuit of FIG. 3 are output. , And the signals E1 to E4 are reversed (the switch 3 receives the signal E4 and the switch 4 receives the signal E3).
To supply the signal E2 to the switch 5 and the signal E1 to the switch 6), and leave the signals E1 to E4 as they are to obtain the signal E9.
~ E12 may be reversed.

[0022]

As described above, the frequency conversion circuit of the present invention basically does not cause the problem of imbalance of the balanced modulator and the problem of unbalance of mixing in the adder / subtractor circuit, which are seen in the conventional example. Further, the phase division of the first input signal is performed by shifting the phase regardless of the frequency, for example, Hi.
Since the lbert conversion method can be used and a switching signal can be generated from the second input signal by using a Miller integrating circuit in the circuit, the frequency of the signal supplied to each input terminal varies. Needless to say, even if the frequency is changed intentionally, it works well in a certain frequency range. In other words, it is suitable for an integrated circuit based on the phase shift type single sideband signal generation method which can be used in a wide frequency band from a low frequency to a high frequency without requiring balance adjustment and can be adjusted. Therefore, as a frequency conversion circuit used as needed, a frequency conversion circuit suitable for a frequency inversion type secret-talk circuit or single sideband modulation (SSB modulation), which has already become commonplace, can be provided, and it can be integrated into an integrated circuit. A suitable frequency conversion circuit can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram of a circuit showing an example of a basic system of a frequency conversion circuit of the present invention.

FIG. 2 is an operation waveform diagram of the circuit of FIG.

FIG. 3 is a block diagram showing a first embodiment of the frequency conversion circuit of the present invention.

FIG. 4 is an operation waveform diagram of the circuit of FIG.

FIG. 5 is a block diagram showing a second embodiment of the frequency conversion circuit of the present invention.

6 is an operation waveform diagram of the circuit of FIG.

FIG. 7 is an operation waveform diagram of the circuit of FIG.

FIG. 8 is a block diagram showing a conventional frequency conversion circuit.

9 is an operation waveform diagram of the circuit of FIG.

[Explanation of symbols]

 1 Input Terminal 2 Phase Division Circuit (Phase Division Means) 3 to 6 Switch (Switch Means) 7 Input Terminal 8 Switching Signal Generation Circuit (Switching Signal Generation Means) 9 Output Terminals

Claims (3)

[Claims] 1. A frequency conversion circuit for obtaining a signal having a frequency of a sum or a difference of frequencies of a first input signal and a second input signal, wherein the first input signal is divided into a plurality of phases, Phase dividing means for generating and outputting a plurality of different channel signals; switching signal generating means for generating a plurality of switching signals of the same number as the plurality of channel signals but different phases from the second input signal; 1 channel signal of the plurality of channel signals and one switching signal of the plurality of switching signals, which are the same as the number of channel signals of
A frequency conversion circuit comprising: a plurality of switches that output the one-channel signal in response to a switching signal, and switch means that outputs the outputs from the plurality of switches from one end. 2. As the phase dividing means, the range of the phase 2π of the first input signal is equally divided by the number of 2 ⁿ channels (n is a natural number of 2 or more) to perform the phase division, and the 2 ⁿ number of the plurality of the plurality of phase dividing ^means are provided. Phase switching means for generating a channel signal, and as the switching signal generating means, 2 ⁿ number of the phase output obtained by switching the phase output obtained by equally dividing the range of the phase 2π of the second input signal by 2 ⁿ number. 2. The frequency conversion circuit according to claim 1, further comprising switching signal generating means for generating a plurality of switching signals. 3. The switching signal generating means uses a Miller integrating circuit and various gate circuits for generating a plurality of switching signals, and uses the switching signal generating means corresponding to the fluctuating second input signal. The frequency conversion circuit according to claim 1 or 2, wherein