JPH08221297A - Program debugging device - Google Patents

Abstract

PURPOSE: To provide an inexpensive program debugging device in which memory data is easy to understand, and a program need not be stopped during the display of the memory data, and the display of the memory data of plural machine built-in type microcomputers is facilitated. CONSTITUTION: The microcomputer 10 is provided with a CPU 13, a ROM 14 in which an application program and a debugging program to be executed by this CPU 13 are stored, a communication interface 12, and a RAM 15. The CPU 13 executes the application program in response to a debugging command through the communication interface 12 from an external device 11, and executes debugging, and informs the external device 11 of this result, and also, rewrites the constant of the RAM 15 by the command of the external device 11. The external device 11 receives the memory data of the RAM 15 through the communication interface 12, and displays this memory data after converting it by the use of a conversion table.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program debug device for debugging a program written in a ROM (read only memory).

[0002]

2. Description of the Related Art In recent years, microcomputers have been used in a wide variety of fields as general-purpose electronic components that can be applied to various purposes by programs, such as being incorporated in machine tools and process control devices in factories, and even in home appliances. Has been applied to. Such a device-embedded microcomputer generally stores an application program in a ROM and executes the program to realize various functions together with the controlled device. Generally, the program development of such a device-embedded microcomputer is performed by an in-circuit emulator (IEC, In Circuit E) as a conventional program debug device.
mutator).

[0003]

However, in the program debugging in the program development using the in-circuit emulator as described above, the in-circuit emulator is expensive, and the CPU (central CPU) incorporated in the device-embedded microcomputer is used. Since there is a need to use a dedicated in-circuit emulator according to the type of processing device, there is a problem that the development cost rises. The in-circuit emulator uses the data in the memory of the microcomputer in decimal notation, 2
It was only displayed as numbers in base and hexadecimal, and it was not easy to understand the memory data. Further, the in-circuit emulator cannot read the memory data unless the program of the device-embedded microcomputer is stopped, and the execution of the program of the device-embedded microcomputer is stopped when the memory data is displayed on the in-circuit emulator. There was a need. Furthermore, in order to display the memory data of a plurality of device-embedded microcomputers, a plurality of in-circuit emulators are required.

The present invention has been made in consideration of the above circumstances, and an object thereof is to make it inexpensive, to easily understand memory data, and to prevent a program from being stopped while displaying memory data. To provide a program debug device capable of easily displaying memory data of a device-embedded microcomputer.

[0005]

In order to achieve this object, a program debug device according to claim 1 of the present invention comprises:
In a program debug device including a device-embedded microcomputer incorporated in various devices and an external device connected to the device-embedded microcomputer, the device-embedded microcomputer includes a CPU,
A ROM storing an application program executed by the CPU and a debugging program for debugging the application program, a communication interface for bidirectional data communication with an external device, and an RA capable of random access and data rewriting.
The CPU has M and executes the application program and the debug program in accordance with a debug command received from an external device via the communication interface, debugs the application program, and outputs the result of the application program debug. The external device is notified via the communication interface, and an arbitrary constant stored in the RAM is rewritten by a command from the external device received via the communication interface.
The memory data of AM is received, and the received memory data is converted by a preset conversion table and displayed.

According to a second aspect of the present invention, there is provided a program debug device comprising a device-embedded microcomputer incorporated in various devices and an external device connected to the device-embedded microcomputer, wherein the device-embedded microcomputer is , CPU
And a ROM storing an application program executed by the CPU and a debugging program for debugging the application program,
Communication interface for bidirectional data communication with external devices and R for random access and data rewriting
The CPU, which has an AM, executes the application program and the debug program in accordance with a debug command received from an external device via the communication interface, debugs the application program, and outputs the result of the application program debug. Notify the external device via the communication interface,
An arbitrary constant stored in the RAM is rewritten by a command from the external device received via the communication interface. The external device receives a plurality of memory data in the RAM via the communication interface and receives a plurality of received data. Each of the memory data is converted by a plurality of preset conversion tables and displayed.

A program debug device according to a third aspect is the program debug device according to the second aspect,
The device-embedded microcomputer comprises a plurality of devices, and a switching unit for switching and connecting the communication interfaces of the device-embedded microcomputers is provided. The external device is the memory data of the RAM of each of the device-embedded microcomputers. Is displayed at the same time.

[0008]

With this configuration, the application program can be debugged using a general personal computer without using an expensive in-circuit emulator, so that the configuration can be made inexpensive and the memory data can be transmitted. Since the memory data is converted and displayed by the conversion table of the external device, it is easy to understand the memory data, and the memory data of the device-embedded microcomputer is read by the external device in an extremely short time. , It is not necessary to stop the program of the device-embedded microcomputer while the memory data is displayed on the external device. Furthermore, since a plurality of device-embedded microcomputers can be switched by the switching unit, even memory data of a plurality of device-embedded microcomputers can be easily displayed.

[0009]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a program debug device according to an embodiment of the present invention. In FIG. 1, 1
0 is a device-embedded microcomputer to be incorporated in various devices, 11 is a device-embedded microcomputer 1
0 is an external device connected via a communication interface described later, 12 is a general communication interface such as RS232C, RS422, and synchronous serial communication, 13 is a CP
U and 14 are ROs for storing an application program executed by the CPU 13, a debug program for debugging the application program, and a communication program for communicating with the external device 11.
M and 15 are RAMs capable of random access and data rewriting, and 16 is an I for connecting to input / output devices.
/ O section.

Next, the function and operation of the program debug device having such a configuration will be described. First, the main function of the program debug device will be described. The device-embedded microcomputer 10 includes a communication interface 1
The external device 11 is controlled by the application program stored in the ROM 14 via the server 2. External device 1
1 performs data communication with the device-embedded microcomputer 10 via the communication interface 12, and reads the memory data of the RAM 15 of the device-embedded microcomputer 10 or writes it in the memory (RAM) 15. Further, the external device 11 controls the execution of the device-embedded microcomputer 10, converts the memory data of the device-embedded microcomputer 10 by a conversion table, and displays the converted data.

Next, the operation of the program debug device will be described. Built-in type microcomputer 10
After activating the application program, the program of the external device 11 is activated. The external device 11 repeatedly performs the data communication and the stop instruction, the stop release instruction, the conversion of the received memory data and the display thereof to the device built-in type microcomputer 10 at a constant time interval by the program. Since the device-incorporated microcomputer 10 performs data communication with the external device 11 by executing interrupt processing or the like while executing the application program, the external device 11 can display the memory data of the microcomputer at any time. Since the display of the memory data is not a number but is converted into an expression that is easy for the person who debugs, it is easy to determine whether or not it is operating according to the specifications, and it is easy to debug.

As described above, in this embodiment, the application program of the device-embedded microcomputer 10 can be debugged based on the result of the external device 11 without using an expensive in-circuit emulator. The external device 11 is, for example, a general personal computer. The device-embedded microcomputer 10 may be a one-chip microcomputer including the ROM 14, the RAM 15, and the I / O unit 16.

FIG. 2 is a block diagram showing the program debug device of FIG. 1 in more detail. In FIG. 2, 10
Is a device-embedded microcomputer, 11 is an external device, 13 is a CPU, 14 is a ROM, 15 is a RAM, 16
Is the I / O section, and these are the same as in FIG.
The same reference numerals are given and the description is omitted. Further, 17 is a serial I / O unit as a communication interface for performing data communication with a plurality of input / output devices (not shown) and the external device 11, and 18 is a serial I / O unit for switching and connecting a plurality of serial I / O units. A signal switching unit (hereinafter simply referred to as "switching unit"), 20 is a device-embedded microcomputer having the same configuration as the device-embedded microcomputer 10, 27 is a serial I / O unit of the device-embedded microcomputer 20, and 111 is a floppy disk. Disk drive, 112 CRT, 113 keyboard, 114 C
PU, 115 is a disk controller connected to the floppy disk drive 111, and 116 is a CRT 112
Is connected to the keyboard 113, an I / O unit connected to the keyboard 113, 118 is a RAM, 119
Is a ROM and 120 is a serial I / O for performing data communication with the device-embedded microcomputers 10 and 20.
It is a department.

In FIG. 2, the external device 11 is a general personal computer, and the general personal computer 11 has built-in hardware for data communication. The serial I / O units 17 and 27 of the device-embedded microcomputers 10 and 20 are connected to the switching unit 18, respectively. Further, the ROM 14 stores a debugging program as well as an application program. Further, the floppy disk drive 111 stores a RAM address setting file for debugging and a plurality of RAM data conversion files together with a program file for controlling the external device 11.

FIG. 3 is a block diagram showing the serial I / O units 17 and 27. In FIG. 3, 201 is a CPU data bus, 202 is a shift register, 203, 204, 2
Reference numeral 05 is a signal line, 206 is a counter, and 207 is a signal line. The circuit shown in FIG. 3 is an external clock synchronous serial communication circuit that is often used in embedded one-chip microcomputers. The CPU 13 shifts the CPU data bus 201 to the shift register 202 according to a program.
Write data to the signal line 205 and the external clock XC
The shift register 202 is shifted by inputting LK, and the serial signal SO is output to the signal line 204. The input signal SI is input to the shift register 202 via the signal line 203. The input signal SI is input to the shift register 202 by the input of the external clock XCLK, and the external clock XCLK is counted by the counter 206. When the bit width count is exceeded, the CPUs 13 and 11 are connected via the signal line 207.
4 generates an interrupt request. In the circuit of FIG. 3, transmission / reception is performed at the same time by a mechanism in which one byte is transmitted every time one byte is received. Further, the serial I / O unit of FIG. 3 does not operate unless an external clock XCLK is input, and no interrupt is generated.

FIG. 4 is a connection diagram showing an example of connection with the external device 11 by the serial I / O units 17 and 27 in the case where there is one built-in type microcomputer. In FIG. 4, the left signals CLK, SO, and SI are signals in the external device 11,
The signals XCLK, SIA, and SOA on the right are signals in the device-incorporated microcomputer 10. External device 1
The synchronous communication clock CLK output from 1 is the signal line 2
The serial signal SO, which is input as the clock XCLK to the device-embedded microcomputer 10 via 11 and is output from the external device 11, is transmitted to the device-embedded microcomputer 10 via the signal line 212.
A serial signal SOA input as A and output from the device-embedded microcomputer 10 is a signal line 213.
Is input as a serial signal SI to the external device 11 via.

FIG. 5 is a circuit diagram showing the switching unit 18 in the case where there are two device-embedded microcomputers. Figure 5
In the figure, 220 to 229 are signal lines, 230 is a logical sum circuit, 231 and 232 are logical product circuits. Signal line 220
The clock CLK input from the external device 11 via the signal line 221 by the selection signal SEL from the external device 11 via the two device-embedded microcomputers 1
0, 20 to the clock XC via signal lines 227, 224
It is input as LKA and XCLKB. A device-embedded microcomputer 1 input through a signal line 222
The serial signals SO to 0 and 20 are input to the device built-in type microcomputers 10 and 20 as serial signals SIA and SIB via the signal lines 228 and 225. Two device-embedded microcomputers 10, 2
The serial signals SOA and SOB from 0 are OR circuits 23.
It is logically ORed by 0 and becomes a serial signal SI via the signal line 223 and is input to the external device 11. (Table 1)
An example of the RAM address setting file stored in the floppy disk drive 111 is shown in FIG.

[0018]

[Table 1]

In the contents of the file shown in (Table 1), character string data is described in one variable and one line. From the beginning of the line, the variables of the program (label1, label2, ...) and the conversion file name (@ 1,
@ 2, @ 3), CPU chip number (chip1, chi)
p2), hexadecimal RAM address (b0h, b1h, ...
...), display format (DEC, HEX), and write permission instruction (r, w). DEC is 10 in display format
HEX and HEX represent hexadecimal notation, and in the write permission instruction, r represents only read and w represents write permission. Table 2 shows an example of the RAM data conversion file stored in the floppy disk drive 111.

[0020]

[Table 2] Each file shown in (Table 2) is RAM in (Table 1)
It is a conversion file specified in the address setting file. In the file, one value is described in one line and an arbitrary character string represented by the value. It is not necessary to describe all possible values for RAM data.

FIG. 6 is a flow chart showing the contents of the application program of the device-embedded microcomputers 10, 20. In FIG. 6, first, the serial I / O units 17 and 27 are initialized (step S
1) It is determined whether or not the stop flag is on (step S
2). If it is determined that the stop flag is on, no processing is performed to loop, and if it is determined that the stop flag is not on, the device's original processing continues (step S3).

FIG. 7 is a flow chart showing an interrupt routine from the external device 11 in the device-embedded microcomputers 10 and 20, that is, a routine of contents of a program for debugging. If there is serial communication (serial signal input) from the external device 11 during execution of the program of FIG. 6, an interrupt occurs from the serial I / O units 17 and 27 of FIG. In the routine executed by this interrupt, RAM read processing (steps S11 and S12), RAM write processing (steps S13 and S14), and stop processing (step S15, depending on the type of command)
S16) and stop release processing (steps S17 and S18) are performed. The interrupt routine is a debugging routine and has nothing to do with the original processing of the device, but the external device 11
It will not be executed unless there is a serial signal input from
There is no problem in finally leaving it in the product program.

FIG. 8 is a data diagram for explaining the communication procedure in the serial communication. In this serial communication, as shown in FIG. 8, 3 bytes are basically used, and the first byte is programmed to send / receive a command, the second byte is an address, and the third byte is data. 1
As for the command of the byte, 1 is a stop release command, 2 is a stop command, 3 is a read command, and 4 is a write command. The address of the second byte can be represented from 0 to 255, and the data of the third byte can be represented from 0 to 255. The 3 bytes are stored in the serial I / O unit 17 of FIG. 3 by the external device 11 and the device-embedded microcomputers 10, 20.
Communication is performed by simultaneously transmitting and receiving by 27. However, the command byte is output from the external device 11, and the numerical values for stop release, stop, read, and write are defined as described above. The second address byte is output from the external device 11 and specifies the RAM address of the device-embedded microcomputer 10 or 20.
The data byte of the third byte is effective when data is written from the external device 11 to the RAM of the device-embedded microcomputer 10 or 20, but when read, the data of the third byte is discarded, and the device-embedded microcomputer. Only the output data of 10 and 20 are valid.

FIG. 9 is a flow chart for explaining the program of the external device 11. In the above program, first, the RAM address specification file and RA of Table 1
M data conversion file to floppy disk drive 1
It is read from 11 (FIG. 2) and set in the RAM 118 (step S31). The conversion table character string array data set in the RAM 118 constitutes a conversion table.
The RAM address setting array data and the conversion table character string array data are described in the BASIC language as follows. DIM RAMDEF (10) (5) DIM TRANSBL $ (10) (256) Here, the RAM address setting array data is 10 RAs.
M data is handled, and variables have the following meanings. RAMDEF (I) (1) is the RAM address of the Ith RAM address variable RAMDEF (I) (2) is the conversion table number of the Ith RAM address variable RAMDEF (I) (3) is the Ith RAM address variable Display data format RAMDEF (I) (4) is the CPU selection number of the I-th RAM address variable RAMDEF (I) (5) is the write enable flag of the I-th RAM address variable Also, character string variable TRANSTBL $ (I) ( J) is I
It is a character string corresponding to the value J of the th conversion table.

Next, it is determined whether or not there is a key input command (step S32). When it is determined that there is no key input, the device-embedded microcomputer 10, 20 having the address specified in the RAM address setting array data
Reading the data from the RAM 15 (step S33),
From the conversion table character string array data of the conversion table number specified in the RAM address setting array data,
A character string corresponding to the value of the RAM data is retrieved (step S34) and displayed (step S35). If the conversion table number is not specified, it will be displayed in the display data format. Also, in the conversion table of the specified number,
If there is no character string equal to the read RAM data value, it is not displayed (step S35). By repeating this series of processing, the contents of the RAM data designated by the device-incorporated microcomputer 10 or 20 being executed are continuously displayed as numerical values and converted character strings on the CRT 112. An example of this display content is shown in (Table 3).

[0026]

[Table 3]

Label to DEC r in (Table 3)
Is as described above. Next RAM on same line = 1
Indicates that the address data "b0" of the RAM is "1", and the state A is a character string corresponding to RAM = 1 as shown in (Table 2). State A is, for example, the thermistor temperature t =
It is in a state of 60 ° C. When it is determined in step S32 that there is a key input command, the RAM writing process (steps S36 and S37) and the stop process (step S38, depending on the command character indicated by the key input).
S39), each command processing of stop release processing (steps S40, S41) is performed.

Next, the operation of the program debug device having such a hardware and software configuration will be described. First, a device-embedded microcomputer 10,
When 20 is activated, the stop flag is initialized to OFF at this point (step S1 in FIG. 6), and the original processing of the device is performed (steps S2 and S3). After that, when the external device 11 and its program are activated, the RAM data of the device-embedded microcomputers 10, 20 can be monitored by the CRT 112 with numerical values and character strings converted in an easily understandable manner by the program of FIG. This makes it possible to check whether or not the device is operating according to the original specifications while confirming the internal variable (memory data) stored in the RAM 15. When there is an abnormality in the device, a stop command is input from the keyboard 113 to stop the operation of the device-embedded microcomputers 10 and 20 (steps S38 and S39) to check the internal variables and set the internal variables. You can change it. Further, it is also possible to change the internal variables during operation of the device-embedded microcomputers 10 and 20 to set optimum constants (steps S36 and S37). Furthermore, even if the program of the external device 11 is stopped during the operation of the device-embedded microcomputers 10, 20, the computer 10,
The computer 10 or 20 can continue to operate without affecting 20 at all. In the present embodiment, the computer 10,
Although the case where 20 RAMs are one is shown, even if there are a plurality of RAMs, the external device 11 receives a plurality of RAM memory data via the communication interface 17, and receives each of the plurality of memory data. Is converted and displayed by a plurality of preset conversion tables, it becomes possible to cope with the plurality of memories.

As described above, in this embodiment, the device-embedded microcomputers 10 and 20 are connected to the external device 11 via the switching unit 18, that is, the general personal computer 11 in FIG. It is possible to debug the program stored in the ROM 14 of the device-embedded microcomputer 10, 20 based on the display content on the device 11. Further, it is not necessary to change the program of the external device 11, and it is possible to deal with a wide variety of device-embedded microcomputers simply by changing the debugging program installed in the device-embedded microcomputers 10 and 20. Further, since the serial I / O units 17 and 27 as the communication interface do not operate at the high frequency used in the in-circuit emulator, this device is resistant to noise and suitable for on-site debugging work. There is.

[0030]

As described above, the present invention provides a device-embedded microcomputer with a CPU, an application program executed by the CPU, and a ROM for storing a debugging program for debugging the application program. A CPU having a communication interface for bidirectional data communication with an external device and a RAM capable of random access and data rewriting.
Causes an application program and a debugging program to be executed in accordance with a debugging command received from an external device via the communication interface, debugs the application program, and outputs the result of the application program debugging to the external device via the communication interface. To the memory device, and rewrites an arbitrary constant stored in the RAM according to a command from the external device received via the communication interface, and the external device receives the memory data in the RAM via the communication interface and receives the data. By converting the displayed memory data using the conversion table set in advance and displaying it,
Since a general personal computer can be used as an external device to debug an application program without using an expensive in-circuit emulator, an inexpensive configuration can be obtained. In addition, since the memory data is converted and displayed by the conversion table of the external device to which the memory data is transmitted, the memory data can be easily understood. Furthermore, the reading of the memory data of the device-embedded microcomputer by the external device can be debugged. It is not necessary to stop the program of the built-in type microcomputer while the memory data is being displayed on the external device, because the program is executed in an extremely short time.

Further, the external device receives a plurality of memory data in the RAM through the communication interface, converts each of the plurality of received memory data by a plurality of preset conversion tables, and displays the converted data. It is possible to correspond to the memory of.

Furthermore, since a plurality of device-embedded microcomputers can be switched by the switching unit, it is possible to deal with a plurality of device-embedded microcomputers as if they were one unit, and the same as above. It is possible to exert an effect.

[Brief description of drawings]

FIG. 1 is a block diagram showing a program debug device according to an embodiment of the present invention.

FIG. 2 is a detailed block diagram of the program debug device of FIG.

3 is a block diagram showing a serial I / O unit in FIG. 2. FIG.

FIG. 4 is a connection diagram showing a serial I / O unit in the case where there is one device-embedded microcomputer.

5 is a circuit diagram showing a serial signal switching unit of FIG.

FIG. 6 is a flowchart for explaining an application program of a device-embedded microcomputer.

FIG. 7 is a flowchart showing an interrupt routine of a device-embedded microcomputer.

FIG. 8 is a data diagram for explaining a communication procedure in serial communication.

FIG. 9 is a flowchart illustrating a program of an external device.

[Explanation of symbols]

 10, 20 Device-embedded microcomputer 11 External device 12 Communication interface 13, 114 CPU 14, 119 ROM 15, 118 RAM 16, 117 I / O unit 17, 27, 120 Serial I / O unit 18 Serial signal switching unit 111 Floppy Disk drive 112 CRT 113 Keyboard 115 Disk controller 116 Display controller

Claims (3)

[Claims] 1. A program debug device comprising a device-embedded microcomputer incorporated in various devices and an external device connected to the device-embedded microcomputer, wherein the device-embedded microcomputer includes a CPU and the CPU. ROM for storing an application program executed by the above and a debugging program for debugging the application program, a communication interface for bidirectional data communication with the external device, and a RAM capable of random access and data rewriting And the CPU executes the application program and the debug program in response to a debug command received from the external device via the communication interface, and the application program is executed. An arbitrary program stored in the RAM in accordance with a command from the external device that is received via the communication interface and that notifies the external device of the result of the application program debug via the communication interface. A program for rewriting the constants in the external device, the external device receiving the memory data of the RAM through the communication interface, converting the received memory data by a preset conversion table, and displaying the converted data. Debug device. 2. A program debug device comprising a device-embedded microcomputer incorporated in various devices and an external device connected to the device-embedded microcomputer, wherein the device-embedded microcomputer includes a CPU and the CPU. ROM for storing an application program executed by the above and a debugging program for debugging the application program, a communication interface for bidirectional data communication with the external device, and a RAM capable of random access and data rewriting And the CPU executes the application program and the debug program in response to a debug command received from the external device via the communication interface, and the application program is executed. An arbitrary program stored in the RAM in accordance with a command from the external device that is received via the communication interface and that notifies the external device of the result of the application program debug via the communication interface. The external device receives a plurality of memory data of the RAM via the communication interface, and converts each of the received plurality of memory data by a plurality of conversion tables set in advance. A program debug device characterized by displaying. 3. The device-embedded microcomputer comprises a plurality of units, and a switching unit for switching and connecting each communication interface of the plurality of device-embedded microcomputers is provided, and the external device includes the plurality of device-embedded microcomputers. 3. The program debug device according to claim 2, further comprising a display control unit for simultaneously displaying memory data of each RAM of the microcomputer.