JPH082112B2 - Video signal processing device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing device used for a video signal recording / reproducing device such as a VTR, a time axis corrector (TBC), a frame synchronizer and the like.

2. Description of the Related Art When a video signal is recorded / reproduced by a video signal recording / reproducing apparatus such as a VTR, time axis fluctuation occurs due to various causes such as cylinder rotation irregularity and tape running irregularity. In VTRs used for broadcasting and professional use, it is necessary to remove this time axis fluctuation and send it out as a signal conforming to the standard, and especially for broadcasting, obtain an output completely locked to the reference signal in the station. Is required. A time base corrector (TBC) is used as a device for this purpose. In the TBC, various reference signals such as a read reference signal, a synchronization signal for switching to an output video signal, and a burst signal are created.

The playback signal of the VTR for broadcasting processed by TBC is completely locked to the reference signal in the station, but at EE (the state where the processed video signal is output through the circuit system), there is a delay in TBC. Occurs. Further, even if the input video signal and the reference signal are different from each other, the float V system TBC is used to establish vertical synchronization on the monitor screen. In such a case, EE
A method for making the color frames of the input video signal and the output video signal coincide with each other has been previously proposed by the applicant as Japanese Patent Application No. 63-39972.

Hereinafter, this conventional device will be described with reference to the drawings. FIG. 2 is a block diagram showing an example of a video signal processing device (NTSC) including TBC used in a broadcast VTR. In FIG. 2, 1 is a video signal input terminal, 2 is a recording circuit, 3 is a magnetic head, 4 is a reproducing circuit, 5 is an AD converter (A / D), 6 is a memory, and 7 is a DA converter (D / A), 8, 9 and 14 are adders, 10 is a sync generator, 11 is a video signal output terminal, 12 is a reference signal input terminal, 13 is a frame detector, 15 and 1
7 is a minute period, 16 and 19 are color frame detectors, 18 is a delay device, 20 is a comparator, 21 is a switch, 22 is a vertical sync signal separator, 23 is a horizontal sync signal separator, and 24 is a burst signal separator. , 40 is TBC.

 The operation will be described below based on the above configuration.

The video signal applied to the terminal 1 is processed for recording by the recording circuit 2 and recorded on the magnetic tape by the magnetic head 3. Then, the signal reproduced by the magnetic head 3 is subjected to reproduction processing by the reproduction circuit 4 and is guided to the TBC 40. In TBC40, the time base fluctuation is removed, and a normal composite video signal is obtained at terminal 11. When the reference signal is applied to the terminal 12, the output video signal is locked to the reference signal and output. When the reference signal is not applied, the output video signal generated by the sync generator 10 inside the TBC 40 and locked to the free-running reference is obtained.

Here, the TBC 40 will be described in detail. Reproduction circuit 4
The output reproduced video signal of 1 is guided to the AD converter 5, converted into a digital signal, and stored in the memory 6. The write clock (write clock) at this time is a signal synchronized with the reproduced video signal. On the other hand, the sync generator 10 creates a read clock (read clock), a vertical read reference signal 26, a burst signal 29, and a composite sync signal 30. During playback, switch 21 is connected to the P side and the terminal
When the reference signal is applied to 12, from the reference signal,
The sync generator 10 is controlled by the respective signals separated by the vertical sync signal separator 22, the horizontal sync signal separator 23, and the burst signal separator 24, and its output becomes a stable signal locked to the reference signal. The position of the vertical synchronizing signal is determined from the memory 6 by the timing of the vertical read reference signal 26, and the video signal is read according to the read clock. As described above, the time axis fluctuation is eliminated by writing to the memory with the write clock synchronized with the reproduced video signal and reading with the stable read clock. The position of the vertical sync signal is determined by the timing of the vertical read reference signal 26, and the TBC delay, that is, the accumulation time, is from the time when the vertical sync signal is written to the time 26 of the vertical read reference signal.

At the time of EE (this also represents the state where the other VTR outputs the video signal synchronized with the input video signal), the switch 21 is connected to the R side and the vertical synchronizing signal of the output signal of the sync generator 10 is , The frame signal detected by the frame detector 13 from the input video signal applied to the terminal 1 is divided by 2 by the frequency divider 15 and delayed by the delay device 18, and is determined by the signal 25 output from the VTR. It is about half the window behind. The delay device 18 is the sync generator 10
The output signal of the frequency divider 15 is counted by using the signal obtained by frequency-dividing the output horizontal information 27 of 2 by the frequency divider 17 as a clock. By doing so, when the positional relationship between the reference video signal and the VTR output video signal gradually deviates, the jump of the vertical synchronization signal of the TBC output video signal becomes in units of two lines, and the color frame is always I try to keep it constant. That is, the phase relationship between the vertical synchronizing signal and the color subcarrier is always constant. Further, the color frame information of the input video signal detected by the color frame detector 16 from the input video signal applied to the terminal 1, and the vertical information 26 and the horizontal information 27 output from the sync generator 10 by the color frame detector 19. , Color frame information of the TBC output signal detected using the color subcarrier 28 is compared by the comparator 20, if the two match, no output is output, if inverted, one pulse is output, Frame detector 13 with adder 14
Output frame signal. With this pulse,
The output signal of the frequency divider 15 is inverted. As a result, the vertical signal output from the sync generator 10 is shifted by one line, and the color frames of both signals match.

The signal read from the memory 6 is converted into an analog signal by the DA converter 7, and the sync generator 10 is added by the adders 8 and 9.
The output burst signal 29 and the composite synchronizing signal 30 are added and output.

However, in the configuration shown in FIG. 2, the color frame of the input video signal and the color frame of the TBC output signal are compared and
However, there is a problem in that the circuit configuration is complicated because the storage time of the video signal is controlled, and that the response is time-consuming and hunting is likely to occur due to the loop configuration.

The present invention provides a device that solves such problems.

Means for Solving the Problems In order to solve the above-mentioned problems, a video signal processing device of the present invention comprises a first means for continuously accumulating a reproduced or transmitted video signal, and an accumulation means for the first means. Second means for continuously reading the read video signal, third means for outputting the video signal read by the second means as a composite video signal, horizontal information of the output composite signal, and color sub A video signal based on a signal obtained by delaying the color frame information of the input video signal based on a signal obtained by dividing the horizontal information of the output composite video signal by 2n (n: integer), the polarity of which is defined by the phase relationship of the carrier wave. Fourth means for controlling the storage time of the video signal in the horizontal scanning time unit so that the color frames of the input video signal and the output video signal coincide with each other without shifting the color subcarrier at the horizontal position in half cycle units. More It is.

Action By taking the above measures, the input video signal is delayed by delaying it with a delay device that creates a vertical read reference signal for each horizontal line that should have a relationship in which the color frame of the input video signal and the color frame of the output video signal always match. The color frame of the signal and the color frame of the output video signal can be matched.

Embodiment FIG. 1 shows a block diagram of an embodiment of the present invention to explain the present invention.

In FIG. 1, the same components as those in FIG. 2 are represented by the same numbers and operate in the same manner.

31 to 38 represent details of the sync generator 10. 31 is a phase comparator, 32, 35, 36, 37 are frequency dividers, 33 is a variable crystal oscillator (VXO), 34 is a burst signal generator, and 38 is a composite synchronization signal generator.

Further, 39 is an SCH (phase relationship between the color subcarrier and the horizontal synchronizing signal) detector.

First, the details of the sync generator 10 will be described. The burst signal separated by the burst signal separator 24 from the reference signal applied to the terminal 12 is guided to the phase comparator 31. To the other input of the phase comparator 31, a continuous signal obtained by dividing the output of the VXO 33, which oscillates at a center frequency 4f _SC, which is 4 times the color subcarrier, by a frequency divider 32, is applied. Phase comparator
The output error signal of 31 controls the frequency and phase of VXO33, and a continuous wave of frequency 4f _SC synchronized with the reference signal is obtained. Output signal of frequency divider 32 (color subcarrier: frequency f _SC ) 2
The burst signal generator 8 generates 8 burst signals. Furthermore, the output signal of the VXO33 is divided by the divider 35 (4
55 division) and the frequency divider 36 (division by 2), and the horizontal information 27 is obtained at the output. At this time, the frequency dividers 35 and 36 are reset by the horizontal synchronizing signal separated by the horizontal synchronizing signal separator 23 from the reference signal, and a signal synchronously coupled with the reference signal is obtained at its output. The output signal of the frequency divider 35 (twice the frequency 2f _{H of the} horizontal synchronizing signal) is frequency-divided by the frequency divider 37 by 525, and vertical information (vertical reading reference signal) 26 is obtained.
At the time of reproduction, the switch 21 is connected to the P side, and the frequency divider 37 is
It is reset by the vertical sync signal separated by the vertical sync signal separator 22 from the reference signal, and its output is synchronously coupled to the reference signal. The output signal of the frequency divider 37 is supplied to the memory 6 as a vertical read reference signal. Furthermore, the frequency divider 35
Output signal (frequency 2 f _H ), horizontal information 27 which is the output of the frequency divider 36, and vertical information 26 which is the output of the frequency divider 37 are guided to the composite synchronization signal creation section 38, and the composite synchronization signal 30 is created. To be done.
When the reference signal is not applied to terminal 12, VXO33 oscillates by itself.

The essential point of the present invention according to the embodiment shown in FIG. 1 is that the timing of the vertical read reference signal 26, which is the output of the sync generator 10 at the time of EE, is controlled with a simple structure and stably, and the input video signal and the output video signal are controlled. To match the color frame of. At the time of EE, the switch 21 is connected to the R side. The color frame information of the input video signal is detected by the color frame detector 16 from the input video signal applied to the terminal 1, and is guided to the delay unit 18. A signal obtained by dividing the horizontal information 27, which is the output of the sync generator 10, by the frequency divider 17 by two is applied to the other input (clock input) of the delay unit 18. The frequency divider 17 uses the horizontal information 27 and the color subcarrier 28, which are also outputs from the sync generator 10, to detect the SCH detector 39.
It is reset by the signal indicating the SCH of the TBC output signal detected in. That is, the output of the frequency divider 17 always extracts a line in which the relationship between the horizontal synchronizing signal of the TBC output and the color subcarrier is constant. The signal 25 obtained by delaying the color frame information of the input video signal by the delay device (counter) 18 using the output signal of the frequency divider 17 as a clock always has a constant color frame of the input video signal and a constant SCH of the TBC output signal. Indicates the point in time of the relationship. Therefore, the vertical read reference signal 26 obtained by resetting the frequency divider 37 (525 frequency division) in the sync generator 10 with this signal 25 is always the color frame of the input video signal and the SCH of the TBC output signal. It indicates the time when there is a fixed relationship. The polarities of the output signal of the color frame detector 16 and the output signal of the frequency divider 17 are set so that the color frame of the input video signal and the color frame of the TBC output signal match.

In this way, the color frame information of the input video signal is delayed by counting the horizontal information of the TBC output video signal by 2 using the signal as a clock to delay it.
Even at times, the color frames of the input video signal and the output video signal can be matched.

In the embodiment of FIG. 1, in order to determine the polarity of the frequency divider 17, the horizontal information 27 and the color subcarrier 28 of the output of the sync generator 10 are determined.
However, regardless of this, any information indicating the SCH of the reference signal applied to the terminal 12 and other information indicating the SCH of the output video signal may be used.

Further, the present invention is not limited to the one in which the composite video signal is directly modulated and recorded, but the component signal (Y, RY, BY) is not limited.
Etc.) can be separately recorded and reproduced, and TBC can also be applied in the same manner to those to be applied in the component state. In this case, the output of the component TBC is encoded by the sync generator output color subcarrier to create an output composite video signal.

The present invention has been described above by taking the NTSC system as an example.
Even in the case of the system, it can be dealt with by changing the frequency divider 17 into a frequency divider 4 and using the TBC and the sync generator for PAL. The reason why the frequency divider 17 is the frequency divider 4 is that in the PAL system, the phase relationship between the horizontal synchronizing signal and the color subcarrier is almost restored to 4 lines.

Further, the present invention is not limited to the VTR, and is also effective for a device for accumulating a video signal such as TBC or a video signal transmission device.

As described above, according to the present invention, the input video signal and the output video signal can be stably recorded with a simple structure and stably at the time of VTR recording or EE, and at the time of video signal transmission or storage. The color frames can be matched, and the left and right positions of the image can be easily confirmed and adjusted. further,
There is no left / right shift of the screen when recording or reproducing from E-E with the VTR or vice versa, and good monitoring and editing / sending can be performed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a video signal processing device according to the present invention, and FIG. 2 is a block diagram of a conventional video signal processing device. 6 ... Memory, 10 ... Sync generator, 16 ... Color frame detector, 17,32,35,36,37 ... Minute cycle, 18 ...
Delay device, 26 …… Vertical reading reference signal, 31 …… Phase comparator, 33 …… Variable crystal oscillator, 34 …… Burst signal generator, 38 …… Composite synchronization signal generator, 39 …… SCH detector, 40
...... TBC.

Claims (3)

[Claims] 1. A first means for continuously storing a video signal obtained by removing a composite sync signal and a burst signal from an input composite video signal reproduced or transmitted, and a video signal stored in the first means. And a third means for continuously adding a composite sync signal and a burst signal to the video signal read by the second means and outputting the composite video signal as a composite video signal. The color frame information of the input composite video signal is based on the signal obtained by dividing the horizontal information of the output composite video signal by 2n (n: integer), the polarity of which is defined by the phase relationship between the horizontal information of the signal and the color subcarrier. On the basis of the delayed signal, the video signal is matched so that the color frames of the input composite video signal and the output composite video signal are matched without shifting the color subcarrier at the horizontal position of the video signal in half cycle units. And a fourth means for controlling the signal storage time in units of horizontal scanning time. 2. The video signal processing apparatus according to claim 1, wherein the fourth means controls the timing of the reference signal for reading the video signal from the storage element. 3. A reference signal for reading the video signal of the fourth means is based on a signal obtained by counting and delaying color frame information of an input composite video signal by dividing a horizontal signal of the output composite video signal by two. The video signal processing device according to claim 1, wherein the video signal processing device is created.