JPH08204762A - Demodulation circuit for data communication - Google Patents

Abstract

PURPOSE: To improve the reliability of a communication system by setting optimizingly a reference voltage for data demodulation in response to a level of a received input signal so as to allow the circuit to be in response to fluctuation of ambient environment. CONSTITUTION: A signal B obtained by applying envelope detection to an input received signal A at an envelope detector 2 is given to a peak hold means 5, in which the peak level is held and provides the output of a reference voltage Vref. A comparator 3 compares a detection signal B and the reference voltage Vref and gives a signal D obtained by applying arithmetic processing to a data signal C by a control circuit 6 to the peak hold means 5. Thus, the peak hold means 5 acquires a peak voltage being a detection output at that point of time and a detection signal is demodulated into a digital data signal C based on the reference voltage and optimum data demodulation is conducted by coping flexibly with a change/fluctuation in the transmission line and the ambient environment.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demodulation circuit for extracting an original signal from a carrier wave modulated by a signal, and more specifically, the present invention relates to a reception system in a communication system for transmitting a digital data signal. The present invention relates to a data communication demodulation circuit for extracting an original data signal from the generated signal.

More specifically, the present invention provides, for example,
Demodulation for data communication, such as for demodulating a data signal that is a modulated signal in an amplitude shift keying modulation method, or for demodulating a primary-modulated data signal after despreading in direct spread modulation of a spread spectrum communication method Regarding the circuit.

Amplitude Shift Ke (Amplitude Shift Ke)
The ying: ASK) system is a system in which a carrier wave is amplitude-modulated by a digital signal, and the carrier wave amplitude is shifted corresponding to the digital signal.

Further, a spread spectrum communication system (Spread S
What is pectrum Communication System (SS communication system)?
It is a communication method that spreads a signal over a much wider frequency bandwidth than the minimum frequency bandwidth required to transmit the signal, and the SS communication method includes various methods depending on the spread modulation method. is there.

Of these, direct diffusion (Spread Spectrum-D
The irect sequence (SS-DS) method is a method of modulating a carrier wave by a digital code sequence having a bit rate much larger than the signal bandwidth, for example.

[0006]

2. Description of the Related Art Conventionally, signals in the ASK system and SS
For demodulation of a signal after despreading in the -DS method, a demodulation circuit as shown in FIG. 3 in which an envelope detection means and a comparator means are combined is used.

To further explain FIG. 3, reference numeral 31 on the left side of the drawing is an input terminal for the received signal, for example, the received signal A as shown in the lower left of FIG. 3 is input. In the figure, P indicates the voltage level axis, Ps indicates the voltage level of the received signal A, and t indicates the time axis.

Reference numeral 32 denotes an envelope detector which receives the received signal A, detects the envelope curve of the amplitude of the received signal A, and outputs the detected signal B as shown in the lower center of FIG. In the figure, V indicates the voltage level axis, and Vs
Indicates the voltage level of the detection signal B.

Reference numeral 33 is a comparator means which inputs the detected signal B and the reference voltage Vref respectively and compares them, and by the comparison, demodulates and outputs the data signal C. This data signal C is shown in the lower right of FIG. 3, for example. Note that Vd
Indicates the voltage level of the data signal C. 34
Is a data output terminal for outputting a data signal C.

[0010]

In the case of the conventional example shown in FIG. 3, the comparator means 3 is clearly shown in the figure.
Since the reference voltage Vref of No. 3 is fixed, when the input level of the received signal A input to the envelope detection means 32 becomes low, that is, when the voltage level Ps of the signal decreases, as a result, data demodulation is performed. There was a drawback that it became impossible.

In other words, the envelope detecting means 32
When the input level of the received signal A input to the input signal becomes low, the voltage level Vs of the detection signal B which is the output of the envelope detection means 32 becomes equal to or lower than the level of the fixed reference voltage Vref, and the data signal C There was a drawback that demodulation would not be performed.

Further, in consideration of the level decrease of the received signal A inputted to the envelope detecting means 32, the reference voltage Vr
If ef is set low and fixed, on the contrary, there is a problem in that it becomes susceptible to noise and the like, and data errors increase.

The present invention was developed for the purpose of solving these problems.

[0014]

In order to solve the above-mentioned various drawbacks, the present invention provides an envelope detecting means for inputting a received signal, detecting an envelope of the received signal, and outputting a detected signal, Input detection of the detection signal and the reference voltage, respectively, the comparator means for demodulating and outputting the data signal, in the data communication demodulation circuit, at least, the detection signal is input, the peak value is held,
It is characterized in that a peak holding means for outputting the reference voltage is provided, and the level of the reference voltage is changed in accordance with the input level of the received signal.

Further, the demodulator circuit for data communication of the present invention is
The peak-holding means is resettable, and when the data signal is significant data, the peak-holding means is non-resettable until the series of the data signals ends. It is characterized by doing so.

[0016]

Therefore, the comparator means can demodulate the detection signal into a digital data signal based on the reference voltage corresponding to the peak voltage of the detection signal. In other words, even if the input level of the received signal input to the envelope detection means becomes low, the level of the reference voltage changes and decreases, and as a result, the voltage level of the detection signal becomes equal to or higher than the level of the reference voltage. Then, the data signal is completely demodulated.

In addition, even if the input level of the received signal input to the envelope detecting means is lowered, the reference voltage is changed and set low, in other words, the level of the input signal is changed. Accordingly, since the optimum reference voltage for data demodulation is set, it is not affected by noise and the like, and the data error is greatly reduced.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the accompanying drawings with reference to its embodiments.

FIG. 1 is a block circuit diagram showing an embodiment according to the present invention.

Reference numeral 1 on the left side of the drawing is an input terminal for inputting a received signal A. Reference numeral 2 is an envelope detection means, which receives the received signal A, detects the envelope of the signal, and outputs a detected signal B.

Reference numeral 5 is a peak hold means for detecting the detection signal B.
Is input, the peak value is held, and the reference voltage Vref is input.
Is output.

Reference numeral 3 is a comparator means, which inputs the detected signal B and the reference voltage Vref respectively and compares them, and outputs a data signal C. An output terminal 4 outputs a data signal C, for example.

Reference numeral 6 denotes an external control circuit, which is composed of, for example, a central processing unit (CPU), and receives the data signal C to perform arithmetic processing. In addition,
It goes without saying that the control circuit 6 may be another external circuit or another external device.

Reference numeral 7 is an input terminal for inputting the reset signal D from the control circuit 6 to the peak hold means 5, for example. It should be noted that the peak hold means 5 is reset by the reset signal D in a cycle longer than the unit data length and at regular time intervals. The input terminal 7 is
Of course, the reset signal D from another external circuit or external device may be input.

In this embodiment as described above, the detection signal B which is the output of the envelope detection means 2 is input to the comparator means 3 and at the same time the peak hold means 5 is supplied.
Is also entered.

Therefore, the peak hold means 5 captures the peak voltage of the detection output at that time, that is, the peak voltage at the time when the detection signal B is input,
A corresponding reference voltage Vref will be generated.

As a result, the comparator means 3 demodulates the detection signal B into the digital data signal C based on the reference voltage Vref corresponding to the peak voltage of the detection signal B.

Note that the peak hold means 5 may be reset by the reset signal D at a constant period with a cycle longer than the unit data length. For example, an external device receiving the output of the data signal C may be used. When the data signal C is significant data, the control circuit 6 may stop transmitting the reset signal D to the input terminal 7 until the series of data signals C ends. Of course.

FIG. 2 is a circuit diagram specifically showing one embodiment according to the present invention.

Reference numeral 21 on the left side of the drawing is an input terminal of the received signal, and 22 is an envelope detection circuit connected to the input terminal 21, which includes capacitors C1 and C2, diodes D1 and D2, and a resistor R.
One connection circuit, and constitutes one embodiment of the envelope detecting means of the present invention.

Reference numeral 23 is a comparator circuit, which is connected to the envelope detection circuit 22 and comprises a connection circuit of a comparator IC3 and resistors R6, R7 and R8, and constitutes one embodiment of the comparator means of the present invention. In addition, V in the figure
cc is the supply voltage.

A peak-hold circuit 25 is connected to the envelope detection circuit 22 and the comparator circuit 23, and has operational amplifiers (operational amplifiers) IC1 and IC2, a transistor Q1, diodes D3 and D4, a capacitor C3,
It comprises a connection circuit of a variable resistor VR1 and resistors R2, R3, R4, R5, and constitutes one embodiment of the peak hold means of the present invention.

In FIG. 2, 24 is a data signal output terminal and 27 is a reset signal input terminal.

[0034]

As described above, according to the present invention, the received signal is input, the envelope of the received signal is detected, and the envelope detecting means for outputting the detected signal, and the detected signal and the reference voltage. In the data communication demodulation circuit, which comprises input comparators for respectively comparing and demodulating and outputting the data signal, at least peak holding means is provided, the detection signal is input, and the peak value is held, Since the reference voltage is output,
The comparator means can demodulate the detection signal into a digital data signal based on the reference voltage corresponding to the peak voltage of the detection signal, and as a result, the received signal input to the envelope detection means is Even if the input level becomes low, the level of the reference voltage will change and drop, and the level of the detection signal will become higher than the level of the reference voltage, and the great effect that the demodulation of the data signal will be completed can be obtained. Become.

In addition, even if the level of the received signal input to the envelope detecting means is lowered, the reference voltage changes and is set to a low level. In other words, depending on the level of the input signal. Since the optimum reference voltage for data demodulation is set, the effect of not being affected by noise or the like is obtained, and the advantage of significantly reducing data errors is obtained.

Further, according to the present invention, the optimum reference voltage for data demodulation can be flexibly dealt with in response to changes and fluctuations in the space to which an input signal is sent, transmission lines such as cables, and the surrounding environment. Since it can be set, as a result, a great effect that the reliability of the data communication system is improved can be obtained.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing an embodiment according to the present invention.

FIG. 2 is a circuit diagram specifically showing one embodiment according to the present invention.

FIG. 3 is a block circuit diagram showing a conventional example.

[Explanation of symbols]

 A: Received signal B: Detection signal C: Data signal D: Reset signal Vref: Reference voltage 1, 7: Input signal 2: Envelope detection means 3: Comparator means 4: Output terminal 5: Peak hold means

Claims (3)

[Claims] 1. A received signal is input, an envelope of the received signal is detected, and an envelope detection means for outputting the detected signal and the detected signal and a reference voltage are respectively input-compared to demodulate a data signal. A demodulation circuit for data communication, comprising: a comparator means for outputting the received signal, a peak hold means for holding the peak value of the detected signal and outputting the reference voltage, and inputting the received signal. A demodulator circuit for data communication, wherein the level of the reference voltage is changed according to the level. 2. The demodulation circuit for data communication according to claim 1, wherein the peak hold means is resettable. 3. The peak hold means is non-resettable until the series of the data signals is completed when the data signals are significant data. The demodulation circuit for data communication described.