JPH08195435A - Manufacture of dielectric isolation type semiconductor substrate - Google Patents

Abstract

PURPOSE: To provide a manufacturing method of a dielectric isolation type semiconductor substrate whose flatness is excellent and to provide a method in which a polishing operation is automated. CONSTITUTION: A polysilicon layer which is to be used as an element formation region on a dielectric isolation type semiconductor substrate is polished by using a polishing liquid in which an alcohol-based amine is added to coloidal silica so as to be diluted and in which the concentration of the alcohol-based amine is within a range of 1 to 2% and by using a polishing cloth whose JIS standard hardness is at 85 or higher. At this time, the polysilicon layer is polished while the surface temperature of the polishing cloth or the temperature on the surface of a semiconductor substrate on a side to be polished is maintained so as not to exceed 60 deg.C without a cooling operation. In addition, after three minutes or more elapsed after the start of a polishing operation, the polishing operation is finished within three minutes after the temperature on the surface of the semiconductor substrate on the side to be polished reaches a highest temperature. By this method, it is possible to obtain the dielectric isolation type semiconductor substrate whose flatness is excellent, and the finish of the polishing operation can be automated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a dielectric isolation type semiconductor substrate, and is particularly suitable for preventing excessive polishing in the polishing step.

[0002]

2. Description of the Related Art In a bipolar device, except for I ² L, individual elements are formed in element forming regions electrically isolated from each other. The element isolation method includes a pn junction isolation method,
There are a selective oxidation separation method, a groove filling separation method, a selective epitaxial method, a dielectric separation method, and the like. In the pn junction isolation method, the selective oxidation isolation method, the groove filling isolation method, the selective epitaxial method, etc., the isolation breakdown voltage is determined by the breakdown voltage of the pn junction. Therefore, a dielectric isolation method for completely insulating and isolating an element formation region is used for element isolation for applications requiring a high breakdown voltage.

FIG. 5 is an explanatory view of a manufacturing process of a semiconductor substrate by a dielectric separation method. Each of the drawings (a) to (h) constituting FIG. 5 is a schematic cross-sectional view of the semiconductor substrate in one process in the manufacturing process. Further, FIG. 6 is an explanatory diagram showing a problem that occurs when a semiconductor substrate is manufactured by a dielectric separation method, and is a schematic cross-sectional view of the semiconductor substrate. Hereinafter, the steps of the dielectric separation method will be described with reference to these drawings.

First, as shown in FIG. 5A, a device-side wafer 30 on which oxide films 20 and 40 having a thickness of about 1 μm are formed, and a supporting substrate-side wafer 10 which holds the device-side wafer 30 and serves as a base. And (3) are bonded and integrated by a direct bonding method with the oxide film 20 having a thickness of about 1 μm formed on the surface of the element-side wafer 30 integrated (refer to the whole of FIG. 5A).
Then, the device-side wafer 30 is polished from the oxide film 40 side so as to have a thickness of about 50 μm. FIG. 5B shows about 50 μm on the supporting substrate side wafer 10 and the oxide film 20.
The element-side wafer 31 that has been polished is shown.

Next, as shown in FIG. 5C, an oxide film 5 is formed.
After forming 0, the separation groove forming portion 60 is opened. At this point, the oxide film 7 is also formed on the back surface of the supporting substrate side wafer 10.
0 is formed. The device-side wafer 31 is made of the oxide film 2
0 separates in the vertical direction, that is, separates from the wafer 10 on the supporting substrate side.
Since it is necessary to form the separation in the horizontal direction as well, the separation groove 80 reaching the oxide film 20 from the surface of the element side wafer 31 is formed by anisotropic etching, and the element side wafer 32 separated by the separation groove 80 is formed. (Fig. 5
(D)). Further, the oxide film 51 is formed on the sidewall of the isolation trench 80.
Are formed (FIG. 5E).

As shown in FIG. 5F, polysilicon 9 is used.
0 is deposited to a thickness of about 120 μm to fill the separation groove 80.
As shown in (g), the surface of the oxide film 50 is polished and flattened by a grinder process so that a polysilicon film 91a of about 10 μm remains.

Finally, as shown in FIG. 5H, a surface finish for completely removing the polysilicon film 91a by mechanochemical polishing is performed to complete a dielectric isolation type semiconductor substrate. When finishing the surface, it is necessary to reliably maintain the thickness of about 50 μm as it is without reducing the thickness of the element-side wafer 32. Therefore, utilizing the fact that the polishing rate of the oxide film 50 is lower than the polishing rate of the polysilicon film 91a, a mechanism for removing the polysilicon film 91a is used by using the oxide film 50 on the surface of the element side wafer 32 as a protective film of the element side wafer 32. The dielectric-isolated semiconductor substrate can be completed by flattening the substrate surface by chemical polishing, commonly called “selective polishing”.

When the dielectric isolation type semiconductor substrate is manufactured by the above-mentioned manufacturing process, the polishing agent usually used is ammonium hydroxide (NH ₄ OH) or sodium hydroxide (NaOH) as an alkali additive to colloidal silica. A polishing liquid prepared by diluting a polishing liquid (stock solution) containing at least one non-alcoholic amine within a range of about 20 times or less is used. The concentration of the alkaline additive in the diluted polishing liquid is about 4%.

Non-woven cloth (trade name "suba-
400 "/ JIS hardness standard 62) or a suede-based polishing cloth (trade name" surfine-018 "/ JIS hardness standard 75) is used. The temperature of the polishing cloth and the substrate is kept within the range of about 30 ° C. to about 40 ° C. by cooling means such as water cooling, and polishing is performed.

The completion of polishing was judged by visual inspection by the operator.

[0011]

However, in the selective polishing by the above-mentioned conventional mechanochemical polishing method, the selective polishing rate of polysilicon with respect to the oxide film is large,
Further, since the polishing cloth is soft, as shown in FIG. 6, the polysilicon 92 in the separation groove is excessively polished to form a recess (depth d [μm]), which is separated. Oxide film 5 on the corner of the substrate side of the device side wafer 32
There is a problem that a defect such as 0a is likely to occur.

The formation of the dent deteriorates the flatness of the substrate surface, causes various problems in the semiconductor element manufacturing process, and lowers the yield. For example, there is a step breakage of the aluminum electrode. Usually, it is said that when the depth of the recess of the separation groove is 5 μm or more, it adversely affects the element formation.

Further, although the accuracy of the unit of μm is required for the polishing, the operator judges the completion of the polishing by visual inspection after stopping the polishing. There were variations in sex.

The present invention has been made in view of the above-mentioned problems, and prevents the dielectric isolation type semiconductor substrate from being excessively polished so that the dielectric isolation type semiconductor substrate can be judged based on a predetermined condition even at the end of the work. It aims at providing the manufacturing method of.

[0015]

According to the present invention, a first silicon substrate on which a semiconductor element is formed is provided with a second silicon substrate which is a base for supporting the first silicon substrate. A silicon substrate bonding step of bonding by direct adhesion through a silicon oxide film, and a separation groove reaching the first silicon oxide film from the surface of the first silicon substrate to separately form an element formation region on the first silicon substrate. An isolation groove forming step of forming a polysilicon layer deposition step of depositing a polysilicon layer on the oxide film formed on the surface of the first silicon substrate and on the oxide film formed on the surface of the isolation groove at least to fill the isolation groove, Use a polishing liquid with alcohol amine concentration diluted to 1% to 2% by adding alcohol amine to colloidal silica, and a polishing cloth with JIS hardness standard of 85 or more. Te, characterized in that it comprises a polishing step of separating forming an element forming region by polishing the polysilicon layer deposited oxide film and separated on the groove.

The polishing step is performed at 60 ° C. without cooling the surface temperature of the polishing cloth or the surface of the semiconductor substrate to be polished.
It is advisable to carry out polishing while maintaining the following.

Further, in the polishing step, it is preferable to finish the polishing within 3 minutes after the temperature of the surface to be polished of the semiconductor substrate reaches the maximum temperature after 3 minutes or more have passed since the polishing was started.

Alternatively, a second silicon substrate, which supports the first silicon substrate and serves as a base, is bonded to the first silicon substrate on which a semiconductor element is formed by direct adhesion through a first silicon oxide film. In order to separately form the element formation region on the first silicon substrate,
A separation groove forming step of forming a separation groove reaching the first silicon oxide film from the surface of the first silicon substrate, and at least a separation groove on the oxide film formed on the surface of the first silicon substrate and the surface of the separation groove, respectively. A polysilicon layer deposition step of depositing a polysilicon layer to such an extent that it fills up with a colloidal silica, and an alcohol amine is added to the colloidal silica to dilute it, and the concentration of the alcohol amine is within the range of 1% to 2%; Using a polishing cloth having a JIS hardness standard of 85 or more, the surface temperature of the polishing cloth or the surface of the semiconductor substrate to be polished is maintained at 60 ° C. or lower without being cooled and deposited on the oxide film and the separation groove. Polishing step of polishing the polysilicon layer to separate and form the element formation region, and the polishing step includes the step of polishing the surface of the semiconductor substrate to be polished after 3 minutes or more have elapsed since the polishing was started. Degree is equal to or to terminate the polishing after reaching the maximum temperature within 3 minutes.

[0019]

[Function] Since the polishing liquid containing 1% to 2% of alcohol amine and the polishing cloth having JIS hardness standard of 85 or more are used, the depth of the recess of the separation groove is suppressed to a very small value, that is, an excessive amount. It is possible to prevent polishing and obtain a highly reliable dielectric-isolated semiconductor substrate of high quality.

Since the surface temperature of the polishing cloth or the temperature of the surface of the semiconductor substrate on the side to be polished is kept not to exceed 60 ° C. without cooling, excessive polishing is effectively prevented. be able to.

After 3 minutes or more have passed from the start of polishing,
Since the polishing is completed within 3 minutes after the temperature of the surface of the semiconductor substrate on the polishing side reaches the maximum temperature, the polishing process can be automatically completed.

A polishing liquid containing 1% to 2% of an alcohol amine and a polishing cloth having a JIS hardness standard of 85 or more were used, and the surface temperature of the polishing cloth or the temperature of the surface of the semiconductor substrate to be polished was not cooled. The polishing should be performed at a temperature not exceeding 60 ° C, and after 3 minutes or more have passed from the start of polishing, the polishing should be completed within 3 minutes after the temperature of the surface of the semiconductor substrate on the polishing side reaches the maximum temperature. Therefore, the depth of the recess of the separation groove can be suppressed to a very small value, that is, overpolishing can be prevented, and a reliable dielectric isolation type semiconductor substrate with excellent quality can be obtained, and the polishing process can be performed automatically. Can be ended automatically.

[0023]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a graph comparing the relationship between the polishing temperature (° C.) and the depth (μm) of the recess of the separation groove with respect to the amount (%) of alcohol amine contained in the polishing liquid when the polishing time is constant. FIG. 2 is a graph showing the relationship between the JIS hardness of the polishing cloth and the depth (μm) of the recess of the separation groove when the polishing time is constant, and FIG.
Is a graph showing the relationship between the amount of alcoholic amine contained in the polishing liquid (%) and the polishing rate of the silicon oxide film and the polysilicon film. FIG. 4 is a graph showing the polishing time (minutes) and the surface temperature of the polishing cloth ( It is a graph showing the relationship with (° C).

The first embodiment of the method for polishing a dielectric isolation type semiconductor substrate according to the present invention was performed as follows.

A polishing liquid containing 1% of alcohol amine in addition to the colloidal silica abrasive, and JIS hardness standard 85
Foam urethane polishing cloth (trade name "MH-S15A")
5 and without using cooling means such as water cooling.
Single-wafer polishing was performed on the substrate in the state of (g). About 7 minutes after starting polishing, the temperature of the substrate and polishing cloth was 57
It showed a peak temperature of ° C and then began to fall. Polishing was continued for about 2 minutes from the time of the peak temperature, and then the polishing was terminated.

When the surface of the substrate was observed after the polishing was completed, the polysilicon on the oxide film 50 on the surface of the substrate was completely removed, while the depth of the depression of the substrate (d in FIG. 6).
[Μm]) is as small as about 0.5 μm, and the oxide film 50 on the corner of the separated element-side wafer 32 on the substrate surface side.
There was no defect in a. Furthermore, when devices were formed on the dielectric isolation type semiconductor substrate manufactured by the first example, no particular problems occurred and the reliability was good.

The second embodiment of the method for polishing a dielectric isolation type semiconductor substrate according to the present invention was carried out by slightly changing the conditions from the first embodiment.

A polishing liquid containing 2% of alcohol amine in addition to the colloidal silica abrasive, and JIS hardness standard 95
Precise foam urethane polishing cloth (trade name "IC-100
0 ”), and single-wafer polishing was performed on the substrate in the state of FIG. 5G without using a cooling means such as water cooling.
About 8 minutes after the polishing was started, the temperature of the substrate and the polishing cloth showed a peak temperature of 58 ° C. and then started to decrease. After continuing polishing for about 2.5 minutes from the time of peak temperature,
Finished.

When the surface of the substrate was observed after the polishing was completed, the polysilicon on the oxide film 50 on the surface of the substrate was completely removed, while the depth of the depression of the substrate (d in FIG. 6).
[Μm]) was very small, about 1 μm, and no defects were generated in the oxide film 50a on the corners of the separated element-side wafer 32 on the substrate surface side. Further, when devices were formed also on the dielectric isolation type semiconductor substrate manufactured by the second example, no particular problems occurred and the reliability was good.

Polishing is performed on a large number of other substrates while changing some conditions.
Comparison of the relationship between the polishing temperature (° C.) and the depth (μm) of the groove of the separation groove with respect to the amount (%) of the alcoholic amine contained in the polishing liquid when the polishing time was constant, and the polishing time was constant. In the case, the relationship between the JIS hardness of the polishing cloth and the depth (μm) of the recess of the separation groove, the relationship between the amount of alcohol amine (%) contained in the polishing liquid and the polishing rate of the silicon oxide film and the polysilicon film, The graphs of FIGS. 1, 2, and 3 show the relationship between the polishing time (minutes) and the surface temperature (° C.) of the polishing cloth, respectively.

The surface temperature (° C.) of the polishing cloth and the separation groove at the time of polishing in the case of using the polishing liquid containing 1%, 2%, 3%, and 7% of alcohol amine shown in the graph of FIG. In view of the relationship with the depth (μm) of the dents, when a polishing liquid containing 1 to 2% of alcohol amine was used and the surface temperature of the polishing cloth during polishing was maintained at about 60 ° C. or less, the separation groove It can be seen that the depth of the recess is very small and a substrate of excellent quality is obtained.

From the relationship between the JIS hardness of the polishing cloth and the depth (μm) of the recess of the separation groove shown in the graph of FIG.
It can be seen that when a polishing cloth having a hardness of 85 or more is used, the depth of the recess of the separation groove is very small, and a substrate of excellent quality is obtained.

Based on the relationship between the amount (%) of alcohol amine in the polishing liquid and the polishing rate of the silicon oxide film and the polysilicon film shown in the graph of FIG.
It is considered that when a polishing liquid containing ˜2% is used, the depth of the recess of the separation groove is very small, and a substrate of excellent quality can be obtained. This is because when the polishing rate of the polysilicon film is higher than the polishing rate of the silicon oxide film and the difference is not so large, the depth of the recess of the separation groove is small and the silicon oxide film is less likely to be damaged. .

FIG. 4 is a graph showing the relationship between the polishing time and the surface temperature of the polishing cloth when polishing the dielectric isolation type semiconductor substrate in the first or second embodiment. here,
As the polishing liquid, a polishing liquid containing 1 to 2% of alcohol amine was used, and as the polishing cloth, a polishing cloth having JIS hardness of 85 or more was used.

From the state of temperature change, graphs A, B, C,
The progress of polishing in each of the five regions D and E will be described.

In the region A, since the surface of the polysilicon film after the grind processing is started immediately after the polishing is started, the frictional force between the surface of the polysilicon film and the polishing cloth is large and the temperature rises rapidly.

In the region B, the temperature gradually rises as the time for polishing the polysilicon elapses. At this stage, the polysilicon film is still thick.

In region C, the temperature rises at a slightly larger rate than in region B and reaches a peak as the polishing time progresses. At this stage, the polysilicon film is still quite thin.

In region D, the polysilicon film on the silicon oxide film partially disappears due to polishing, and the temperature reaches a peak when the silicon oxide film starts to be exposed, and then the exposed portion of the silicon oxide film is reached. The frictional force gradually decreases as the temperature increases, and the temperature also starts to decrease.

In the region E, the polishing is further progressed, the polysilicon film on the silicon oxide film is completely disappeared, the friction with the polishing cloth is drastically lowered, and the temperature is drastically lowered.

Based on the relationship between the polishing time and the temperature as described above, a predetermined time (about 3 minutes) after the temperature peak is detected.
The polishing of the substrate can be automated by terminating the polishing after the temperature falls sharply.

Further, as a result of adopting the polishing method according to the present invention, it is possible to obtain a substrate in which the polysilicon film on the surface of the silicon oxide film is completely removed and the recess of the polysilicon filling the isolation trench is extremely small. The yield was improved at the same time.

The predetermined time from the detection of the temperature peak to the end of polishing is as follows when a polishing liquid containing 1 to 2% of alcohol amine and a polishing cloth having JIS hardness of 85 or more are used.
The time during which the depth of the depression of the polysilicon in the separation groove can be suppressed to a small value was calculated from experiments or the like and was set to within 3 minutes.

[0044]

As described above, according to the method for manufacturing a dielectric isolation type semiconductor substrate according to the present invention, the depth of the recess of the isolation groove is suppressed to a very small level, that is, excessive polishing is prevented, It is possible to obtain a dielectric isolation type semiconductor substrate having excellent quality and high reliability.

Since the temperature conditions during polishing are limited,
Excessive polishing can be prevented more effectively.

Since the polishing end time is set based on the temperature change during polishing, the polishing process can be automatically ended.

Since a predetermined polishing liquid and a predetermined polishing cloth are used to carry out polishing while limiting the temperature conditions during polishing, and when the end of polishing is set based on the temperature change during polishing, separation is performed. It is possible to suppress the depth of the groove recess to a very small level, that is, prevent excessive polishing, obtain a dielectric isolation type semiconductor substrate of excellent quality and high reliability, and terminate the polishing process automatically. You can

[Brief description of drawings]

FIG. 1 is a graph comparing the relationship between the polishing temperature (° C.) and the depth (μm) of the recess of the separation groove with respect to the amount of alcohol amine (%) contained in the polishing liquid when the polishing time is constant.

[Fig. 2] J of polishing cloth when polishing time is constant
The graph which showed the relationship between IS hardness and the depth (micrometer) of the dent of a separation groove.

FIG. 3 is a graph showing the relationship between the amount (%) of alcoholic amine contained in the polishing liquid and the polishing rate of the silicon oxide film and the polysilicon film.

FIG. 4 is a graph showing the relationship between the polishing time (minutes) and the surface temperature (° C.) of the polishing cloth.

FIG. 5 is an explanatory diagram of a manufacturing process of a semiconductor substrate by a dielectric separation method.

FIG. 6 is an explanatory diagram showing a problem that occurs when a semiconductor substrate is manufactured by a dielectric isolation method.

[Explanation of symbols]

 10 Support substrate side wafer 20, 40, 50, 51, 70 Oxide film 30, 31, 32 Element side wafer 60 Oxide film opening 80 Separation groove 90, 91, 92 Polysilicon layer 91a Polysilicon film 50a Oxide film defect d Depth of depression of polysilicon layer in isolation trench

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H01L 27/12 F

Claims (4)

[Claims] 1. A second silicon substrate that supports the first silicon substrate and serves as a base is directly bonded to a first silicon substrate on which a semiconductor element is formed through a first silicon oxide film. Silicon substrate bonding step of bonding, and isolation groove formation for forming an isolation groove reaching the first silicon oxide film from the surface of the first silicon substrate to separately form an element formation region on the first silicon substrate A step of depositing a polysilicon layer on the oxide film formed on the surface of the first silicon substrate and on the oxide film formed on the surface of the isolation groove at least to fill the isolation groove; A polishing liquid having an alcohol amine concentration diluted within the range of 1% to 2% by adding an alcohol amine and a polishing cloth having a JIS hardness standard of 85 or more were prepared. There are, dielectric isolation semiconductor substrate manufacturing method which comprises a polishing step of the oxide film and polishing the polysilicon layer deposited on the separation on trench separating the element formation region formed. 2. The method for manufacturing a dielectric isolation type semiconductor substrate according to claim 1, wherein the polishing step is performed without cooling the surface temperature of the polishing cloth or the surface of the semiconductor substrate to be polished at 60 ° C. or less. A method for manufacturing a dielectric isolation type semiconductor substrate, comprising: polishing while maintaining 3. The method for manufacturing a dielectric isolation type semiconductor substrate according to claim 2, wherein in the polishing step, the temperature of the surface of the semiconductor substrate to be polished is the highest after 3 minutes or more have passed from the start of polishing. A method for manufacturing a dielectric isolation type semiconductor substrate, wherein polishing is completed within 3 minutes after reaching the temperature. 4. A second silicon substrate which supports the first silicon substrate and serves as a base is directly bonded to a first silicon substrate on which a semiconductor element is formed, through a first silicon oxide film. Silicon substrate bonding step of bonding, and isolation groove formation for forming an isolation groove reaching the first silicon oxide film from the surface of the first silicon substrate to separately form an element formation region on the first silicon substrate A step of depositing a polysilicon layer on the oxide film formed on the surface of the first silicon substrate and on the oxide film formed on the surface of the isolation groove at least to fill the isolation groove; A polishing liquid having an alcohol amine concentration diluted within the range of 1% to 2% by adding an alcohol amine and a polishing cloth having a JIS hardness standard of 85 or more were prepared. The surface of the polishing cloth or the surface of the surface to be polished of the semiconductor substrate is maintained at 60 ° C. or lower without being cooled, and the polysilicon layer deposited on the oxide film and the separation groove is polished to And a polishing step of separately forming an element forming region, wherein the polishing step is within 3 minutes after the temperature of the surface to be polished of the semiconductor substrate reaches the maximum temperature after 3 minutes or more have passed from the start of polishing. A method for manufacturing a dielectric isolation type semiconductor substrate, which comprises finishing polishing.