JPH08191120A - Power semiconductor element substrate and manufacture thereof - Google Patents

Abstract

PURPOSE: To obtain a power semiconductor element substrate, which inhibits thermal strain of ceramic chips while ensuring a high heat conductivity between the ceramic chips and a metal heat sink and makes the adhesion between both of the chips and the heat sink superior, by a method wherein AIN chips are buried in an Al/SiC base in such a way that the exposed surfaces of the AIN chips are on the same plane as the exposed surface of the base. CONSTITUTION: A power semiconductor element substrate is manufactured into such a structure that AIN chips 12 are buried in a base 13, which contains Al and SiC as its main component, by an injection molding method and the exposed surfaces (free surfaces) 12A of the chips 12 are on the same plane as the exposed surface 13A of the base 13. Power semiconductor elements 11 may be directly bonded to the surfaces of the chips 12, but are secured to the chips 12 via lower electrodes 17 as needed. In this case, a bridge-shaped electrode 18 is designed so that it is connected with the electrodes 17 of the elements 11 adjacent to the electrode 18 and ensures a current value requied for the several elements in all. As a result, the temperature rise of the power semiconductor elements is inhibited and a heat dissipation burden, which is applied to a heat sink, can be made small.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for mounting a power semiconductor element, which is excellent in heat dissipation and reliability, and a manufacturing method thereof.

[0002]

2. Description of the Related Art A power semiconductor device is driven by a large current to generate heat, and a mounting substrate excellent in heat dissipation is required to maintain device characteristics. In particular, in recent years, miniaturization and weight reduction have been promoted by high-density integration and integration with a control circuit, so that dissipation of high-density heat flow has become an important issue.

Conventionally, a heat sink made of metal having excellent heat dissipation has been used for a substrate of a power semiconductor element which generates a large amount of heat, and a power semiconductor element, other circuit elements and electric wiring are provided via a resin layer in order to maintain insulation. Is being done. However, since the resin layer has low thermal conductivity, a technique is disclosed in which only the power semiconductor element having a large amount of heat generation is fixed to the thermally conductive insulating ceramic plate locally arranged on the metal heat sink.

For example, in Japanese Unexamined Patent Publication No. 1-290279, an opening is provided at a predetermined position of a resin insulating layer applied on a metal heat sink to embed the ceramic insulating plate in an island shape, and the power is applied on the ceramic insulating plate. A technique is disclosed in which a semiconductor element is fixed and electric wiring is provided on a peripheral resin insulating layer. Further, Japanese Patent Laid-Open No. 59-123250 discloses that
There is disclosed a technique in which an opening is directly provided in a metal heat sink, thermal conductive insulating ceramics are embedded in the opening in an island shape and bonded by a metallizing process, and then a power semiconductor element or the like is arranged on the ceramics.

On the other hand, Japanese Patent Laid-Open No. 5-36872 discloses that
After the resin insulation layer is applied on the metal heat sink, the resin insulation layer is completely removed only from the installation site of the power semiconductor element, and aluminum nitride (AlN), which has good thermal conductivity, is used.
There is disclosed a technique in which the heat resistance is reduced to 1/2 or less of the conventional value by directly soldering the metal semiconductor on a metal heat sink and further soldering a power semiconductor element on the metal heat sink.

[0006]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
Both were developed for the purpose of combining the heat sink effect of the metal heat sink and the heat conductive insulating ceramics, and each is effective in reducing the thermal resistance of the power semiconductor element. However, the technique described in Japanese Patent Application Laid-Open No. 1-290279, which utilizes the processability and adhesiveness of the resin layer, is excellent in mass productivity, but the resin layer is thinly interposed between the metal heat sink and the ceramics, so that the thermal resistance is reduced. The effect is small, and it is insufficient in the case of a high output device or high density integration.

The technique described in Japanese Patent Laid-Open No. 59-123250, in which a metal heat sink and BeO ceramics are bonded with a metal, has a large effect of reducing the thermal resistance and the effect of blocking the parasitic capacitance, but the difference in the coefficient of thermal expansion between the metal and the ceramics. As a result, there is a problem of reliability that the heat application power is large and the adhesive strength and element characteristics are affected.

On the other hand, the technique described in Japanese Patent Laid-Open No. 5-36872, in which the resin layer is completely removed locally and the metal heat sink and AlN are joined, has a remarkable effect of reducing the thermal resistance, but on the other hand, it is highly effective after being fixed to AlN of the power semiconductor element. However, solid wiring, and therefore large-scale integration, is difficult because of the difference from the surrounding wiring portion, and there is a problem in that the adhesiveness due to thermal strain and the influence on device characteristics remain. Thermal strain is caused by the difference in the coefficient of thermal expansion between ceramics and metal. When the power semiconductor element is driven to generate heat, the temperature rises and the temperature decreases when the semiconductor element is at rest. The cracks are generated, and the thermal strain stress changes the junction characteristics of the semiconductor element to affect a predetermined function (pn junction characteristic).

To solve this problem, Japanese Patent Laid-Open No. 64-64-
In Japanese Patent No. 12559, thermal conductive ceramics, for example, A
An attempt is made to dispose a composite member made of a matrix metal in which a porous particulate filler is dispersed between 1N and a power semiconductor element, and to absorb thermal strain caused by a difference in thermal expansion coefficient by the voids of the filler. . However, this technique has a problem that the process of laminating a large number of layered materials and the adjustment of the composition are complicated, and mass production or high-density integration is difficult.

An object of the present invention is to solve the problem of thermal distortion while ensuring high thermal conductivity between a ceramics chip mounting a power semiconductor element and a metal heat sink, and to achieve high adhesiveness between them, mass productivity, and weight reduction. It is another object of the present invention to provide a substrate for a power semiconductor device and a method for manufacturing the same, which can achieve both of

[0011]

In the present invention, a base formed by dispersing SiC particles in an aluminum matrix and an exposed surface in the vicinity of the device loading side surface of the base are coplanar with the device loading side surface. Disclosed is a power semiconductor element substrate including an element mounting chip made of island-shaped AlN embedded as described above.

The base may have a heat-dissipating surface processed into a groove shape in order to enhance heat dissipation, or a coolant passage may be embedded in the base so as to be devised.

In the element mounting chip shape, the region embedded in the base can be larger than its free surface.

In these power semiconductor device substrates of the present invention, an AlN device mounting chip having a planar exposed surface is placed in a mold which is manufactured in a predetermined shape in advance, and an aluminum is formed by using an injection molding method. SiC in matrix
It can be manufactured by a method in which a raw material containing a dispersed base material is injected and filled into the mold, the raw material and the chip are brought into contact with each other in an area other than the exposed surface, and thereafter, solidification molding is performed by heating or cooling.

When the raw material contains an organic resin binder or an addition aid, the binder is evaporated by heat treatment to be sintered. When the raw material is a molten mixture of the base material, a power semiconductor device substrate is formed by cooling.

[0016]

[Function] AlN has a high thermal conductivity (about 150 W / m · k)
Which is used as a chip for a power semiconductor element, a power semiconductor element is directly fixed on the chip, and an AlN chip is embedded in an aluminum matrix leaving an exposed surface to prevent heat flow generated from the power semiconductor element. It can quickly lead to a heat sink with very low thermal resistance. Al with SiC dispersed
The base consisting of a matrix (hereinafter abbreviated as Al: SiC) has a high thermal conductivity similar to that of metal, and the heat dissipation surface is processed into a plurality of parallel grooves to increase the area, or forced flow inside the base. If heat exchange is performed by providing a flow path for the generated cooling medium, a good heat sink function is exhibited.

If the AlN chip is designed so as to have a wider shape in the inner region embedded than the exposed surface, the contact surface with the heat sink Al: SiC becomes wider, so that the heat dissipation becomes faster. Provoke.

AlN has a thermal expansion coefficient close to that of Si or GaAs, which is a constituent semiconductor of the power semiconductor element to be mounted (5.
6 × 10 ⁻⁶ K ⁻¹ ), and the thermal strain stress generated by the heat cycle is small, so there are few troubles. Also, Al:
The SiC base can have a thermal expansion coefficient close to that of an AlN chip by dispersing an appropriate amount of SiC particles having a small thermal expansion coefficient. The generated thermal strain can be absorbed to some extent by the pores of the dispersed SiC particles (filler).

An AlN chip is placed on a predetermined position of a mold manufactured based on a predesigned pattern, and then a raw material is filled into the mold by an injection molding method to form Al: S.
When the iC base is formed, AlN chips and Al: SiC
Even if the base has a complicated shape in consideration of heat dissipation characteristics, it is possible to easily bring them into close contact with each other and form a substrate having a flat free surface.

Since AlN and Al: SiC not only have similar thermal expansion coefficients but also share Al as the main component, mutual diffusion of components occurs in the boundary region during the thermal process of molding. Alternatively, there is a characteristic that the bonding strength becomes very high at the interface due to the occurrence of Al molecular bond. Therefore,
It is advantageous in terms of heat transfer characteristics and process simplification. Further, since AlN and Al: SiC have small specific gravity, they can contribute to weight reduction of the substrate.

[0021]

The present invention will be described in more detail based on the following. (Embodiment 1) FIG. 1 is a sectional view showing a state in which a power semiconductor element and peripheral circuits are mounted on a substrate according to an embodiment of the present invention. In the figure, 11 is an IGBT, for example.
Power semiconductor device such as (Insulated Gate Bipolar Transistor), 12 is an AlN chip, 13 is a base 13a
Is a metal matrix containing Al as a main component, and 13b is SiC
It is a filler composed of particles. Reference numeral 14 is a heat radiating portion, 15 is a wire, 17 is a lower electrode, 18 is a bridge electrode, 19 is a conductor circuit wiring, and 20 is an insulating layer having a conductor circuit wiring 19 arranged on the upper surface.

The AlN chip 12 is embedded in a base 13 whose main component is Al: SiC by an injection molding method described later, and its exposed surface (free surface) 12A is the base 1.
It is manufactured so as to be on the same plane as the exposed surface 13 </ b> A of No. 3.

The power semiconductor element 11 is an AlN chip 1
Although it may be directly bonded to the surface 2, it is fixed to the AlN chip 12 via the lower electrode 17 if necessary. In this case, the bridge-shaped electrode 18 is connected to the lower electrode 17 of the adjacent power semiconductor element 11 and is designed so as to secure a necessary current value for several elements (two elements in the case of FIG. 2). As a result, the temperature rise of each power element is suppressed,
It is possible to reduce the heat radiation load applied to the heat sink and thus the thermal strain. On the other AlN chip 12 in FIG. 1, elements other than the power semiconductor element 11, such as a control circuit element, are fixed, and are connected to each other or to the conductor circuit wiring 19 via wires 15.

The component of the base 13 has Al as a matrix, but Si, Mg, Zn, C are used for the purpose of improving the mixing characteristics with the SiC filler and adjusting the melting point and mechanical strength.
Alloying elements such as u, Fe and Cr can be added. The SiC particles of the filler 13b have a diameter of 10 to 100 μm.
Those of about m are usually used. The particle shape is preferably spherical from the viewpoint of moldability, but may be irregular or polygonal. The base 13 is manufactured by an indirect forming method or a direct forming method. Each method will be described below.

FIG. 2 is a flow chart showing the process of the indirect molding method. The subsequent kneading and drying steps after mixing the respective materials can be omitted. These two steps are effective in making the matrix of the raw material and each particle of the filler fit well to the binder and improving the moldability.

The binder is mainly an organic resin type,
The selection of the composition is important in determining the shape and dimensional accuracy of the green molded body 31 obtained in the injection molding process. The combination of materials shown in Table 1 was used in consideration of moldability and degreasing property.

[Table 1]

The degreasing process is performed at a relatively gentle temperature (15 ° C.) in order to suppress the rapid gas generation due to the dispersion of the binder.
/ Hr or less) The temperature is increased. The surface treatment and the drying step after degreasing are performed for the purpose of preventing the shape destruction in the impregnation step, but can be omitted.

In the surface treatment and drying steps, for example, an inorganic liquid binder such as water glass is sprayed on the surface of the degreased molded article and then dried and cured to enhance the bond between the inorganic binder particles. For the same purpose, a low softening temperature glass such as chalcogenide glass or a metal oxide may be previously used together with a raw material and an organic binder as an addition aid. In this case, it is necessary to heat above the melting points of these addition aids in the drying step. However, if these inorganic binders and addition aids are added in high concentrations, they will cause a decrease in thermal conductivity, so they must be kept to the minimum necessary amount.

The impregnation step is a step of filling the molten matrix between the particles of the molded body, and is typically performed as shown in FIG. 4 or 5.

FIG. 3 is a schematic view showing how the green molded body 31 is formed in the injection molding process of FIG. The mixed material 33 is press-fitted and filled into the cavity of the mold 32 processed into a predetermined shape by the pressurizing mechanism 34 driven by the motor 35 to form the green molded body 31.

FIG. 4 is a schematic view showing the process of molten matrix impregnation in the vacuum chamber. The degreased, surface-treated, and dried compact 41 is placed in the metal melter 43 and dipped in the molten metal 42. The metal bath container 43 is housed in the chamber 44, and the inside of the chamber 44 is depressurized by the exhaust pump 45.

On the other hand, FIG. 5 is a schematic diagram showing a method of accelerated impregnation of molten matrix metal. The molded body 41 is impregnated with the molten matrix metal which is pressurized by the atmospheric pressure. Since the formed body 41 is depressurized by the exhaust pump 45 via the filter portion 51, the molten matrix metal is filled between the particles of the formed body 41 more quickly than in the case of FIG.

FIG. 6 shows the principle of the direct molding method. The AlN chip 12 is placed in a mold 62 manufactured in a predetermined shape, for example, as shown in the figure, and a molten Al matrix 61 having SiC particles dispersed therein is made to flow into the mold 62 from below. A filter portion 51 is provided in the molten matrix outflow hole below the mold, and has a structure in which gas in the inside is released but molten salt is not outflowed. By operating the pressurizing shaft 64 and pressing the molten salt in the direction of 63, the AlN chip 1
Molten salt adheres to the bottom surface of No. 2 and fills the mold 62. If it is cooled as it is, a molded substrate is formed.
The surface of the SiC particles dispersed in the molten salt is preliminarily formed with N
If a metal film of i, Zn, Mg, etc. is deposited, Si
The wetting of the C particles with the matrix is improved and therefore the dispersibility in the Al matrix is increased.

A heat dissipation portion 14 provided on the lower surface of the base 13
As shown in FIG. 1, the heat radiation area can be increased by providing a plurality of parallel grooves. However, such a complicated base can be easily integrally formed by injection molding.

(Embodiment 2) FIG. 7 is a sectional view showing elements and the like arranged on a power semiconductor element substrate according to another embodiment of the present invention. In this embodiment, it is composed of a metal matrix 13a containing Al as a main component and a filler 13b made of SiC particles. Cooling pipe 2 in base 13
1 is provided. When the power semiconductor element generates heat due to energization, a coolant such as water is injected into the cooling pipe 21 from the outside by a pump (not shown), and the thermal energy propagating through the AlN chip 12 and into the base 13 is quickly exchanged. To cool the base 13. As a result, the thermal resistance of the base 13 drops to an extremely low level.

The power semiconductor device substrate as shown in FIG. 7 can be easily obtained by forming the base 13 by the direct molding method shown in FIG. The AlN chip 12 and the cooling pipe 21 are fixedly installed at predetermined positions in the mold 62 in advance, and the SiC filler-dispersed Al matrix melt is relatively slowly injected from the molten salt injection hole by the Accurad method to cool the pipe 21. And improve the contact with the melt. When the cavity of the mold 62 is completely filled with the molten salt, it is gradually cooled to obtain the substrate shown.

(Embodiment 3) FIG. 8 is a cross-sectional view showing a power semiconductor device substrate according to still another embodiment of the present invention and devices arranged on the upper surface thereof. In this embodiment, the shape of the AlN chip 12 embedded in the base 13 is stepwise in two stages. Since the Al: SiC of the base 13 is widely surrounded around the lower stage embedded in the deep position, and the contact area between AlN and Al: SiC is increased and the structure is hard to peel off mechanically, heat conduction and adhesion between the chip and the base. The strength is further improved.

(Example 4) The thermal resistance of the Al: SiC base substrate embedded with an AlN chip according to the present invention was investigated using the chip size as a parameter, and the conventional Al: SiC was used.
A comparison was made with a substrate in which an AlN chip was provided on a base via a resin layer.

FIG. 9 shows a power semiconductor device substrate of the present invention in which the AlN chip 12 is embedded and formed by injection molding the base 13 using the above-mentioned indirect molding method. In order to examine the thermal resistance of the power element, the power semiconductor element 11 was fixed on the AlN chip 12 via the lower electrode 17. An insulating layer 20 is provided around the power semiconductor element 11.
The conductor wiring 19a of the control circuit system and the conductor wiring 19b of the power circuit system are arranged in two layers via the wirings, and the conductor circuit wiring 19 and the power semiconductor element 11 are electrically connected by Al wire bonding. . The lower electrode 17 of the power semiconductor element 11 and the conductor wiring 19b of the power circuit system are further joined by a bridge-shaped conductor 17.

FIG. 10 shows a base 1 made of Al: SiC.
FIG. 3 is a cross-sectional view showing a conventional power semiconductor device substrate in which a recess is provided in an insulating layer 20 made of an epoxy resin applied on 3 and an AlN chip 12 is embedded in the recess, and a device mounted on the substrate. The space (resin layer thickness) between the bottom of the AlN chip 12 and the top of the base 13 is 0.15 mm. As shown in the drawing, the devices and wirings mounted are the same as those in FIG. 9 except that the state of the substrate is different. Also, the size of each element is exactly the same as in FIG.

In FIGS. 9 and 10, the power semiconductor device 11 is shown.
An IGBT having a rating of 600 V and 20 A was used as the. IG
The size of BT is 4.9 x 4.9 mm ² . The thermal resistance of the substrate was measured when the device was driven at 40 W for 100 ms. The obtained results are shown in FIG. FIG.
According to No. 1, it can be seen that the substrate according to the present invention shows almost no change in the thermal resistance value depending on the chip size, and is less than half that of the conventional product. When manufactured by the conventional method, the thermal resistance value decreases as the AlN chip size increases because of the heat dissipation effect of the AlN chip. When extrapolated, Al
In the N-chip method, in the region of 30 × 30 mm ² or more, almost the same thermal resistance value as in the case of the present embodiment can be obtained, but it is an unrealistic value in consideration of high-density mounting of devices on the substrate. is there.

The low thermal resistance value of the substrate according to the present invention is obtained by using the injection molding method to form the AlN chip 12 into Al: Si.
It is obtained by precisely embedding it in the C base 13, and FIG. 11 shows the excellent characteristics of the present invention.

FIG. 12 shows a control device for the motor 200 using the power semiconductor device of this embodiment. The power semiconductor unit 100 includes power transistors PT _{1 to} PT ₆ and diodes D _{1 to} D ₆ and is a three-phase U, V, W motor 200.
Rotation speed control and torque control are performed. 400 is a DC power supply,
Reference numeral 500 is a smoothing capacitor. Furthermore, the external control circuit unit 22 controls the gates (bases) A _{1 to} B ₃ of the power transistors PT _{1 to} PT ₆ . FIG. 13 is an embodiment diagram of the control circuit unit 22 and the power semiconductor unit 100 of FIG. 12, particularly the upper surface portion. Each symbol is as already shown in FIG. Reference numeral 23 is a driver IC.

The present invention has been described above with reference to the embodiments.
The present invention is not limited to these. For example, in order to strengthen the adhesive strength with the base 13, the interface of the AlN chip 12 may be previously metallized.
In this case, a groove of a predetermined size is provided on the surface of the base 13 by preparing a dummy of a ceramic cook chip during injection molding instead of contacting the chip / base by a single injection molding as described above. A method in which the metallized AlN chip 12 is fitted therein is preferable.

The power semiconductor element suitable for mounting on the substrate of the present invention may be a high output thyristor or a high current diode other than the above-mentioned IGBT. In addition to Si-based semiconductors, it can be applied to GaAs-based semiconductors.

[0046]

As described above, according to the present invention, the following effects can be obtained. 1. The difference in the coefficient of thermal expansion between the AlN chip that constitutes the substrate and the Al: SiC base is small, and because of the relationship that the main constituent Al atoms are shared during the heat treatment of the integration process by injection molding, mutual diffusion at the interface and Al A strong bond strength is obtained by inducing a chemical bond. Since the difference in the coefficient of thermal expansion between the AlN chip and the semiconductor element is also small, thermal strain during element driving is small and high reliability can be obtained. 2. Since a complicated base shape can be easily realized by forming the base by the injection molding method, the thermal resistance value of the substrate can be significantly reduced by embedding a cooling pipe in the base. 3. The power element / AlN chip / Al: SiC-based direct bonding structure enables large-capacity heat dissipation due to high thermal conductivity. Therefore, high-density mounting on the substrate and downsizing of the substrate are possible. 4. Since AlN and Al: SiC are lightweight, it is possible to form a small and lightweight substrate for power semiconductor elements.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing how a power semiconductor device is mounted on a substrate according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a process of manufacturing a base by an indirect molding method.

FIG. 3 is a schematic diagram showing how a green molded body is formed in the injection molding process of FIG.

FIG. 4 is a schematic diagram showing a state of molten matrix impregnation by an indirect formation method.

FIG. 5 is a schematic view showing a state of molten matrix impregnation by another method.

FIG. 6 is a schematic view showing a state of manufacturing a base by a direct molding method.

FIG. 7 is a sectional view showing a state in which a power semiconductor element is arranged on a substrate according to another embodiment.

FIG. 8 is a cross-sectional view showing a state in which a power semiconductor device is mounted on a substrate according to still another embodiment.

FIG. 9 is a cross-sectional view showing a state in which a power element and a driving circuit are mounted on a power semiconductor element substrate of the present invention including a base manufactured by using an indirect molding method.

FIG. 10 is a cross-sectional view showing a state where the same power element and drive circuit as in FIG. 9 are mounted on a substrate manufactured by a conventional method.

FIG. 11 is thermal resistance value measurement data of the substrate when each element of FIGS. 9 and 10 is driven.

FIG. 12 is a diagram showing an example of a motor control device of the present invention.

13 is an embodiment diagram of a part of the circuit of the motor control device of FIG.

[Explanation of symbols]

 Reference Signs List 11 power semiconductor element 12 AlN chip 13 base 13a metal matrix containing Al as a main component 13b filler composed of SiC particles 14 heat dissipation portion 15 wire 17 lower electrode 18 bridge electrode 19 conductor circuit wiring 19a control circuit system conductor wiring 19b power circuit Conductor wiring of system 20 Insulating layer 21 Cooling pipe 31 Green molded body 32 Mold 33 Mixed material 34 Pressing mechanism part 35 Motor 41 Degreased, surface treated, dried molded body 42 Molten metal 43 Metal bath container 44 Chamber 45 Exhaust pump 51 Filter Part 61 Molten Aluminum Matrix 62 Mold 64 Pressure Shaft

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁶ Identification number Internal reference number FI Technical indication location H05K 1/02 A H01L 23/46 Z (72) Inventor Koji Yamada 7 Omika-cho, Hitachi City, Ibaraki Prefecture 1-1-1, Hitachi, Ltd. Hitachi Research Laboratory

Claims (8)

[Claims] 1. A base in which SiC is dispersed in a metal matrix containing aluminum as a main component, and an exposed surface near the device loading side surface of the base is flush with the device loading side surface. A substrate for a power semiconductor element, which includes an element mounting chip made of island-shaped aluminum nitride (AlN) embedded therein. 2. The substrate for a power semiconductor element according to claim 1, wherein a surface (back surface) of the base opposite to the surface on the device loading side is grooved in parallel to increase a heat radiation area. 3. The substrate for a power semiconductor element according to claim 1, wherein a flow path for a cooling medium is arranged below an embedded region of the element mounting chip of the base. 4. The power according to claim 1, wherein the shape of the element mounting chip is designed so that the embedded cross section of the element mounting chip in the base becomes larger inside the base than on the device loading side surface. Substrate for semiconductor device. 5. A predetermined number of element mounting chips made of aluminum nitride (AlN), at least one surface of which has a planar shape, are manufactured in a predetermined shape in advance so that the one surface having a planar shape becomes an exposed surface. The exposure of the chip for mounting the device by using a first step of placing in a molded mold and an injection molding method of injecting and filling a raw material including a base material containing SiC dispersed in an aluminum matrix into the mold. A second step of forming the shape of the power semiconductor element substrate by contacting the raw material with a region other than the surface, and a third step of solidifying and molding a base in which SiC is dispersed in an aluminum matrix by a heating or cooling process. A method for manufacturing a substrate for a power semiconductor device, comprising: 6. The second step, wherein the raw material is a powder of a base material mixed with an organic resin binder and an addition aid, and the third step, which includes a debinding process and a sintering process. The method for manufacturing a substrate for a power semiconductor device according to claim 5, comprising. 7. The second step of filling a molten mixture of the base material into the mold, and the third step of solidifying the molten mixture by cooling. Manufacturing method of substrate for power semiconductor device. 8. A power semiconductor device having a power semiconductor element mounted on the chip of the power semiconductor element substrate according to claim 1.