JPH08186797A - Recording and reproducing device - Google Patents

Abstract

PURPOSE: To provide a recording/reproducing device which can perform the special reproduction such as searching, etc., and can quickly attain a shift between the special and normal reproduction modes when the predictive coded data are recorded and reproduced. CONSTITUTION: A tape 12 where the intra-frame and inter-frame coded data are recorded in a multiple way is reproduced. A PCR detection circuit 20 detects a time signal PCR from the reproduced signals. A PCR generation circuit 21 produces the next PCR value in a prescribed time based on the detected signal PCR. If the PCR signals are interrupted in a special reproduction mode or in a shift period to this mode, the PCR value generated by the changeover of a switch 24 is used. The discontinuous reproduction data obtained in the special reproduction mode are arranged in every frame by a sync block 26 via a switch 25. Therefore, the special reproduction of coded data is possible when the following PCR signals are always produced. At the same time, the delay of reproduction due to an inter-mode shift can be eliminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording / reproducing apparatus such as a digital video tape recorder to which high efficiency coding is applied.

[0002]

2. Description of the Related Art In recent years, digital processing of images has been studied. In particular, with regard to high-efficiency encoding for compressing image data, various methods have been proposed for standardization. The high-efficiency encoding technique encodes image data at a smaller bit rate in order to improve the efficiency of digital transmission and recording. As such a high-efficiency coding method, CCITT (Comite Consultafif I
nternational Telegraphique et Telelcphonique)
Proposed standardization recommendations for video conferencing / video telephony. 261,
JPEG (Joint photographic Exper) for color still images
t Group) and MPEG (Moving pitur) for moving images
e Expert) method is proposed. In the United States, ATV (Advanced Television), which is a next-generation television broadcasting system using the MPEG-2 system, is under study.

FIG. 4 is an explanatory diagram for explaining the MPEG encoding system. In the figure, the arrow indicates the direction of prediction in encoding. Further, FIG. 5 is an explanatory diagram showing an encoding process in the MPEG encoding system, an arrangement on a recording medium, and an order of image data by a decoding process. As shown in FIG. 4, the MPEG encoding system uses GOP (Group of Pictur) with a predetermined number of frame images.
compose e). At least one intra-picture coded image I is included in the GOP. Intra-picture coded image I is DCT
The image data of one frame is encoded by (discrete cosine transform). From the intra-picture coded image I, one frame of image data at every predetermined a frames is converted into a forward predictive coded image P. Further, the image data of each frame between the intra-picture coded image I or the first forward predictive coded image P1 and the second forward predictive coded image P2 is bidirectional using the forward and backward image data. It is converted into a bidirectional predictive coded image B by predictive coding.

As shown in FIG. 5, the intra-picture coded picture I is first coded. The intra-picture coded picture I is coded only by the information in the frame and does not include prediction in the time direction. Next, as shown in FIG. 5, a forward predictive encoded image P is created, and the bidirectional predictive encoded image B is encoded after the intra-picture encoded image I or the forward predictive encoded image P. The forward predictive coded image P and the bidirectional predictive coded image B utilize the correlation with other image data. As described above, due to the prediction method of each image data, the bidirectional predictive coded image B is recorded on the recording medium after the intra-picture coded image I or the forward predictive coded image P,
When decrypted, the original order is restored.

Since the intra-picture coded picture I is coded only by the information in the frame, it can be decoded only by a single coded data. On the other hand, the forward predictive coded image P and the bidirectional predictive coded image B are coded by utilizing the correlation with other image data, and cannot be decoded only by a single coded data. ing.

In the MPEG encoding system, the recording rate is regulated (standard 1.2 Mbps), but the data length is variable. Therefore, it is not possible to specify at which position the intra-picture coded image I included in the GOP is recorded, and it is not possible to specify the data length of one GOP. When the above MPEG encoding method is applied to a digital video tape recorder or the like, in normal reproduction, each encoded image I, B, P is sequentially reproduced, so that no particular problem occurs. However, when special reproduction such as fast-forward reproduction is performed, the encoded images I, B, and P are not sequentially reproduced. Also, when performing special playback, only a part of the recording track on the recording medium is played,
Since the position of the intra-coded image I on the recording medium is not specified, the intra-coded image I cannot always be reproduced. In this case, the forward predictive encoded image P and the bidirectional predictive encoded image B cannot be reproduced. Therefore, for example, in the technique disclosed in Japanese Patent Laid-Open No. 4-298802, the encoded image data is recorded at a predetermined position on a recording medium that can be reproduced during special reproduction, and this data is reproduced during special reproduction. The screen is reproduced by.

Next, in the MPEG-2 system, a coded image signal, audio signal, or other bit string is referred to as an elementary stream. A PES (Packctized Elementary Stream) packet is defined as a structure for carrying an elementary stream. This is PE after the PES header
It has a structure in which S payload continues. A set of elementary streams having a common time base in the MPEG-2 system is called a program.

Two formats are defined for encoding in the MPEG-2 system. One is a Transport Stream and the other is a Program Stream. The above definitions of both the transport stream and the program stream include a necessary and sufficient grammar for synchronizing the decoding and reproduction of video and audio. The program stream is a single bit string formed by combining one or more PES packets having a common time base. A transport stream is a combination of one or more programs that have one or more time bases and are combined into a single bit string. In the above-mentioned ATV system, the transport stream is used.

In the MPEG-2 system decoding system, in the case of a program stream, SCR (System C
lock reference) and in the case of a transport stream, PCR (Program Clock Reference) is used as a time signal for synchronization. FIG. 6 shows an example of an SCR or PCR decoding circuit. When performing special reproduction, 201 is an input terminal, 202
Is a subtractor, 203 is an LPF (Low Pass Filter), 2
04 is an amplifier, 205 is a VCO (Voltage Controlled O
scillator), 206 is a counter, and 207 is an output terminal.

The output of the counter 206 is the STC (System T
ime Clock) is called. When SCR or PCR arrives at the input terminal 201 of this decoding circuit, the subtracter 2
02 the current STC which is the output of the counter 206
And a comparison value with the arrived SCR or PCR is calculated. This comparison value is output as a control signal for the VCO 205 by the LPF 203 and the amplifier 204.
The VCO 205 outputs a clock signal. VCO205
The frequency of the clock signal which is the output of the clock signal changes according to the value of the control signal.

The output signal of VCO 205 is output terminal 207.
Is input to an MPEG decoder (not shown), used as a system clock, and output to a counter 206. The counter 206 counts the system clock and outputs the STC. This STC is input to the subtractor 202, and PLL (Phasc Locked Loop)
It constitutes the feedback group of the circuit. This P
The time interval between SCR and PCR inputs to the LL circuit is within 700 milliseconds in the case of the above SCR,
In the case of PCR, each is set within 100 milliseconds. In the case of the above-mentioned ATV system, the above-mentioned PCR is used to perform synchronization in the same manner as the above-mentioned decoder circuit.

In the MPEG system or the ATV system, as described above, PCR or S is used as a means for achieving synchronization.
Since it uses CR, the decoder uses PCR or SC.
R data must be input continuously. However, in the recording / reproducing apparatus disclosed in the above-mentioned Japanese Patent Laid-Open No. 4-298802, the above PCR or SCR is used as a decoder during the transition period from the normal reproduction to the special reproduction or the transition period from the special reproduction to the normal reproduction. It cannot be input, which causes a delay in the operation of the decoder.

[0013]

As described above, in the conventional recording / reproducing apparatus, when the predictive-encoded image data is recorded in the recording medium, the intra-coded image I is reproduced in the special reproduction. However, there is a problem that special playback cannot be performed. If special playback is enabled, the sync signal will be discontinuous, so there will be a delay in playback operation during the transition period from normal playback to special playback or transition period from special playback to normal playback. There was a problem that it would end up.

In view of the above problems, the present invention enables special reproduction in a recording / reproducing apparatus using predictive coding, or a recording / reproducing apparatus for recording given predictive encoded data, as well as special reproduction from special reproduction. An object of the present invention is to provide a recording / reproducing apparatus in which a reproducing operation is not delayed during a transition period to a reproduction period or a transition period from special reproduction to normal reproduction.

[0015]

According to a first aspect of the present invention, there is provided a recording / reproducing apparatus which is provided with encoded data in which intra-image encoded image data and inter-image encoded data are multiplexed. Coded data reconstructing means for selecting coded data and reconstructing the intra-coded data, and an output of the coded data reconstructing means are arranged at a predetermined position on a recording medium. Recording means for recording, reproducing means for reproducing the data recorded on the recording medium by the recording means at a predetermined speed and outputting reproduced data, and a synchronizing signal by a time signal included in the output of the reproducing means. , A time signal generating means for generating a signal having the same format as the time signal contained in the output of the reproducing means, the output of the reproducing means and the time. And a storage means for storing one or both of the output of No. generating means.

A recording / reproducing apparatus according to a second aspect of the present invention is the recording / reproducing apparatus according to the first aspect of the present invention, wherein the encoded data reconstructing means extracts a low frequency component from the encoded data. This is for reconstructing intra-image coded data.

A recording / reproducing apparatus according to a third aspect of the present invention is the recording / reproducing apparatus according to the first or second invention,
The time signal generating means generates a time signal during a transition period between the operation of the reproducing means having a double speed of 1 and the operation of having a double speed other than 1.

A recording / reproducing apparatus according to a third aspect of the present invention is the recording / reproducing apparatus according to the first, second or third aspect of the present invention, wherein the storage means has an operation of double speed 1 and double speed. The output of the reproducing means and the output of the time signal generating means are stored in the transition period of the operation other than 1.

[0019]

In the recording / reproducing apparatus according to the first aspect of the present invention, the reconstructing means reconstructs the intra-picture coded data, and the recording means reconstructs the reconstructed coded data at the predetermined speed. It is recorded at a position on the recording medium that can be reproduced at that time.
The reproducing means reproduces the encoded data on the recording medium at a predetermined speed, and the synchronizing signal generating means generates a synchronizing signal for reproducing from the time signal recorded on the recording medium. The storage means stores either one or both of the output of the reproducing means and the output of the time signal generating means. The time signal generating means generates a time signal such that the synchronizing signal generating means can continuously generate the synchronizing signal when the reproducing means changes the double speed of the reproducing. When the storage means stores the output of the reproducing means, the time signal generating means is arranged so that the synchronizing signal generating means can continuously generate the synchronizing signal from the time signal included in the output of the reproducing means. Generate a time signal. When the storage means stores the output of the time signal generation means, a time signal which enables the synchronization signal generation means to continuously generate the synchronization signal from the time signal currently input to the synchronization signal generation means. To occur.

In the recording / reproducing apparatus according to the second aspect of the present invention, when the coded data reconstructing means reconstructs the intra-picture coded data, the given intra-picture coded image data and inter-picture coded data are given. Is divided into the intra-picture coded data and the inter-picture coded data, and the intra-picture coded data is extracted or the picture is extracted from the intra-picture coded data and the inter-picture coded data. The intra-coded data is reconstructed, and the low-frequency component of this intra-coded data is extracted to create new intra-coded data.

In the recording / reproducing apparatus according to the third aspect of the present invention, the transition period between the case where the reproducing means performs the normal reproducing operation and the special reproducing operation, or the case where the reproducing means performs the special reproducing operation and the normal reproducing operation During the transition period when the operation is performed, the time signal is not input and the synchronization signal is not generated. Therefore, the time signal is interpolated by the output of the time signal generating means.

According to a fourth aspect of the present invention, in the recording / reproducing means, the storage means replaces the time signal in the output of the reproducing means or outputs the reproducing means when the time signal is discontinuous. The time signal is interpolated into.

[0023]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of a recording / reproducing apparatus according to the present invention. This embodiment is a case where the present invention is applied to a video tape recorder for recording an MPEG transport stream or an ATV bit stream.

In FIG. 1, 1 is an input terminal, 2 is a demultiplexer, 3 is a header detection circuit, 4 is a frame memory, 5 is a memory control circuit, 6 is a first buffer, 7 is a multiplexer, and 8 is a parity generation circuit. , 9 is a modulation circuit,
10 is a recording amplifier, 11 is a recording head, 12 is a magnetic tape, 13 is a reproducing head, 14 is a reproducing amplifier, 15 is a reproducing equalization circuit, 16 is a demodulation circuit, 17 is a sync detection circuit, 1
8 is an error correction circuit, 19 is a second buffer, 20 is a PC
R detection circuit, 21 PCR generation circuit, 22 control signal input terminal, 23 system control circuit, 24 first selector, 25 second selector, 26 sync block memory, 27 packetizing circuit, 28 is an output terminal.
Incidentally, two rotary magnetic heads are actually used as the recording head 11 and the reproducing head 13.

Next, the operation will be described. During recording, the MPEG transport stream or ATV bit stream input to the input terminal 1 is demultiplexed by the demultiplexer 2
Is input to the first buffer 6 and is delayed. The demultiplexer 2 extracts a bit string of image information from the multiplexed bit string. The output of the demultiplexer 2 is input to the header detection circuit 3 and the frame memory 4.

In the header detection circuit 3, the demultiplexer 2
Various header information is extracted from the bit string extracted by. The header detection circuit 3 outputs this header information to the memory control circuit 5. The image data extracted by the demultiplexer 2 is input to and stored in the frame memory 4. This image data is I frame data, and the memory control circuit 5 selects an I frame from the header information input from the header detection circuit 3 and inputs it to the frame memory 4.

In the multiplexer 7, the first buffer 6
The bit string delayed by and the bit string of the special reproduction data output from the frame memory 4 are multiplexed. The bit string multiplexed as described above is added with an error correction code by the parity generation circuit 8, modulated by the modulation circuit 9, amplified by the recording amplifier 10, and then recorded on the magnetic tape 12 via the recording head 11. To be done.

At the time of reproduction, the data recorded on the magnetic tape 12 is reproduced by the reproducing head 13. The data reproduced by the reproduction head 13 is amplified by the reproduction amplifier 14, and the reproduction equalization circuit 15 suppresses intersymbol interference. The output of the reproduction equalization circuit 15 is the demodulation circuit 1
6 and is demodulated. The output of the demodulation circuit 16 is input to the sync detection circuit 17, and the sync detection circuit 17 synchronizes the video tape recorder. Sync detection circuit 1
An error correction circuit 18 detects and corrects an error in data from the output of 7.

The output of the error correction circuit 18 is input to the second buffer 19 and delayed, and the PCR detection circuit 20 is also provided.
And the current PCR value is detected. The PCR generation circuit 21 generates the next PCR value from the PCR value detected by the PCR detection circuit 20. As mentioned above, the PCR must be input to the MPEG decoder or ATV decoder at least once every 100 milliseconds. Therefore, the PCR generation circuit 21 generates a PCR value having a maximum offset of 100 milliseconds with respect to the current PCR value detected by the PCR detection circuit 20 according to the time when the PCR detection circuit 20 detects the PCR. It is supposed to do.

A control signal for instructing special reproduction or normal reproduction is input to the control signal input terminal 22. This control signal is input to the system control circuit 23. The system control circuit 23 instructs the first selector 24 and the second selector 25 by the control signal to indicate the passage of signals, and instructs the PCR generation circuit 21 to generate PCR.

The system control circuit 23 connects the first selector to the a1 terminal which is the output of the second buffer 19 when the normal reproduction or the special reproduction is continuously performed. In the above case, MPEG decoder or ATV
The PCR sent to the decoder is the PCR on the magnetic tape 12.
Since it is recorded, it is a continuous value. However, when a control signal for instructing special reproduction is input to the control signal input terminal 22 during normal reproduction, the tape running system such as a reel or a capstan (not shown) cannot immediately shift to special reproduction, so the magnetic tape 12 The PCR recorded in (1) is not reproduced, so that the PCR is not output from the second buffer 19. This is also the case when a control signal for instructing normal reproduction is input to the control signal input terminal 22 during special reproduction, and PCR is not reproduced.

In the above case, the system control circuit 23 connects the first selector 24 to the b1 terminal in the case of shifting from normal reproduction to special reproduction or vice versa.
Based on the PCR value detected by the PCR detection circuit 20, the PCR generation circuit 21 continuously generates PCR. Even if the PCR cannot be reproduced by this operation, P
CR can be continuously sent to the circuit in the subsequent stage, and MPEG
The PCR can be output to the decoder or the ATV decoder.

The system control circuit 23 is connected to the second selector 25b2 terminal during normal reproduction. In the case of normal reproduction, the reproduced image data is processed by the packetizing circuit 27 in the MPEG or ATV.
Is packetized according to the packet format of
Output to the outside. Further, the system control circuit 23
When performing special reproduction, the second selector 25 is connected to the a2 terminal. Since the special reproduction image data is recorded at the discontinuous position of the magnetic tape 12, it is reproduced discontinuously. In the case of special reproduction, the image data reproduced discontinuously is input to the sync block memory 26 via the a2 terminal of the second selector 25 and reconstructed as I frame data. This I frame data is packetized by the packetizing circuit 27 and then output terminal 28.
Is output to the outside via.

The PCR detection circuit 20 is constructed, for example, as shown in FIG. In FIG. 2, 101 is an input terminal, 1
Reference numeral 02 is a sync byte detection circuit, 103 is a first counter, 104 is a comparator, 105 is a second counter, 106 is a shift register, and 107 is an output terminal.

The packet data input from the input terminal 101 is first input to the sync byte detection circuit, the 8-bit sync byte included in the packet data is detected, and the packets are synchronized. The packet data synchronized for each packet is stored in the first counter 10
3, input to the comparator 104 and the shift register 106.

The first counter 103 counts the number of bits of the packet. That is, this first counter 103
Resets the count value based on the output of the sync byte detection circuit 102 and starts counting from the bit next to the last bit in the sync byte. When the count value reaches 19 bits, the first counter 103 outputs the bit of the comparison permission signal to the comparator 104. This bit is used for adaptation field control (adap
The first bit of the Tation field control) and when this bit is 1, an adaptation field in which PCR may be included is present in the same packet. The comparator 104 compares this bit with 1, and when the bit is 1, instructs the first counter 103 to continue the bit counting. When the bit is zero, the comparator 10
No. 4 causes the first counter 103 to stop the bit count and waits for the next packet to be input.

When the count value reaches 36 bits, the first counter 103 outputs a comparison permission signal to the comparator 104. This bit is a PCR flag, and when this bit is 1, the PCR exists in the adaptation field in the same packet. The comparator 104 compares this PCR flag with 1, and when the CPR flag is 1, causes the first counter 103 to continue counting bits.
When the CPR flag is zero, the comparator 104 causes the first counter 103 to stop the bit count and waits for the next packet to be input. Further, when the count value reaches 40 bits, the first counter 103 permits the second counter 105 described later to count bits. By the above operation, the second counter 105 counts the data portion of PCR.

The second counter 105 counts the number of bits of PCR. The shift register 106 performs serial-parallel conversion on the PCR according to the control of the second counter 105 and outputs it. The PCR is extracted as time data from the packet data by the second counter 105 and the shift register 106. The PCR is a 42-bit bit field and is divided into two parts.
One is a 33-bit part called PCR base, and the other is PCR extension.
Is a 9-bit part called. A 6-bit field reserved by MPEG is inserted between the PCR base and the PCR extension.

The second counter 105 first detects the PCR.
In order to extract the base, the data input to the shift register 106 is shifted until the count value reaches 33 bits. When the count value reaches 33 bits, the shift register data is output from the output terminal 107 to the outside as 33-bit parallel data. Then 6
Since the bit is invalid data, the second counter 105 prohibits the shift register 106 from outputting the data and the shift operation until the count value reaches 39 bits. Then, the second counter 105 shifts the data input to the shift register 106 until the count value becomes 42 bits in order to extract the PCR extension. When the count value reaches 42 bits, the data in the shift register 106 is output to the outside from the output terminal 107 as 9-bit parallel data. By the above operation, the PCR base and the PCR extension, which are the components of the PCR, are extracted from the packet.

Next, FIG. 3 shows the PCR generation circuit 2 in FIG.
It is a figure which shows the structural example of 1. In FIG. 3, 151 is an input terminal, 152 is a first selector, 153 is a first counter, 154 is a second counter, 155 is a clock generator, 156 is a buffer, 157 is a second selector, and 158 is a shift register. 159 are output terminals.

From the input terminal 151, the PCR detected by the PCR detection circuit 20 is input. The first selector 152, the first counter 153, and the second counter 154 are controlled by a timing circuit (not shown). The PCR input from the input terminal 151 is selected by the first selector 152, the PCR base is selected by the first counter 153, and the PCR extension is selected by the second counter 154. The clock generator 155 generates a clock having a frequency of 27 MHz. The output of the clock generator 155 is input to the second counter 154. Second counter 15
Reference numeral 4 is a 9-bit counter. Second counter 154
After loading the PCR extension by the above operation, the PCR extension is increased by one for each clock output from the clock generator 155.

The first counter 153 is a 33-bit counter, and is incremented by 1 when the second counter 154 reaches a predetermined maximum value. The maximum value of the second counter is 299, and the value of the second counter, that is, the PCR extension is 2
When it reaches 99, the value of the second counter becomes zero and the first counter
The value of the counter of, i.e., the PCR base, increases by one. By the above operation, the first counter 153 is 90 MHz.
It shows an operation equivalent to increasing with the clock of z.

The output of the first counter 153 is input to the second selector 157. The output of the second counter 154 is input to the buffer 156, delayed and adjusted in output timing to the second selector 157, and
The 6-bit field reserved by the above-mentioned MPEG is inserted before the PCR extension, which is the output data of the second counter 154, and is output. This 6-bit field is called a reserved bit and usually has a value of “111111” in binary. The output of the second selector 157 is parallel-serial converted by the shift register 158 and output to the outside through the output terminal 159. With the above operation, the PCR generating circuit 21 generates and outputs PCR according to the grammar defined by MPEG or ATV.

According to the present embodiment, the MPEG transport stream or ATV capable of special reproduction and capable of outputting PCR to the decoder during the transition period between the special reproduction and the normal reproduction or the transition period between the normal reproduction and the special reproduction. A video tape recorder that records a bitstream can be configured. With this configuration, an MPEG decoder or A
The TV decoder can decode the bit stream output by the video tape recorder according to the present invention without delay.

Although the MPEG transport stream or the ATV bit stream has been described in this embodiment, it is needless to say that the MPEG stream can be applied to the MPEG program stream and other high efficiency coded bit streams with the same configuration.

[0046]

As described above, according to the present invention,
In a recording / reproducing apparatus using predictive coding, or in a recording / reproducing apparatus for recording / reproducing given predictive-coded data, special reproduction is enabled and a transition period from normal reproduction to special reproduction or special reproduction to normal It is possible to realize a recording / reproducing apparatus that does not cause a delay in the reproduction operation during the transition period to the reproduction.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing the PCR detection circuit of FIG.

FIG. 3 is a block diagram showing a PCR generation circuit of FIG.

FIG. 4 is an explanatory diagram for explaining an MPEG encoding method.

FIG. 5 is an explanatory diagram showing an order of image data for encoding processing, arrangement on a recording medium, and decoding processing in the MPEG encoding system.

FIG. 6 is a block diagram showing a PCR decoding circuit.

[Explanation of symbols]

 2 Demultiplexer 3 Header detection circuit 4 Frame memory 5 Memory control circuit 11 Recording head 12 Magnetic tape 13 Playback head 20 PCR detection circuit 21 PCR generation circuit 102 Sync byte detection circuit 103, 105, 153, 154 Counter 104 Comparator 106, 158 shift register 152, 157 selector 155 clock generator

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H04N 7/32 H04N 7/137 Z

Claims (8)

[Claims] 1. Coded data in which intra-coded image data and inter-coded data are multiplexed is input, and the intra-coded data is selected from the coded data to select the intra-coded data. Coded data reconstructing means for reconstructing, recording means for recording the output of the coded data reconstructing means so as to be arranged at a predetermined position on the recording medium, and the recording medium by the recording means. Reproducing means for reproducing the data recorded above at a predetermined speed and outputting the reproduced data, synchronizing signal generating means for generating a synchronizing signal by a time signal contained in the output of the reproducing means, and the reproducing means. Of the time signal generating means for generating a signal having a format equivalent to the time signal included in the output of, and either or both of the output of the reproducing means and the output of the time signal generating means. Recording and reproducing apparatus and a storage means for storing the. 2. The recording / reproducing apparatus according to claim 1, wherein the coded data reconstructing means reconstructs the intra-coded data by extracting a low-frequency component in the coded data. . 3. The recording according to claim 1, wherein the time signal generating means generates the time signal during a transition period between the operation of the double speed 1 and the operation of the double speed other than 1. Playback device. 4. The reproducing means in the storage means has a double speed 1
4. The recording / reproducing apparatus according to claim 1, 2 or 3, wherein the output of the reproducing means and the output of the time signal generating means are stored during a transition period between the operation of 1) and the operation of the speed other than 1. 5. The encoded data in which the intra-image encoded image data and the inter-image encoded data are multiplexed is MPE.
The recording / reproducing apparatus according to claim 1, wherein the recording / reproducing apparatus is encoded data according to the G system. 6. The encoded data in which the intra-image encoded image data and the inter-image encoded data are multiplexed is ATV.
5. The recording / reproducing apparatus according to claim 1, wherein the recording / reproducing apparatus is encoded data according to the method. 7. The time signal generating means generates PCR.
The recording / reproducing apparatus described. 8. The recording / reproducing apparatus according to claim 1, wherein the time signal generating means generates an SCR.