JPH08181605A - Phase control circuit - Google Patents

Abstract

PURPOSE: To make phase control stable by giving an output of a variable adder circuit whose plural input terminals receive an output signal of a subtractor circuit or an amplitude reduction circuit to an amplifier circuit so as to eliminate harmonics of an oscillating frequency. CONSTITUTION: One and other terminals of a resonance circuit RES1 provided to an external part are connected respectively to external terminals T0 , T1 and an input terminal of a band limit circuit BWC1 is substantially coupled with the terminals T0 , T1 . The phase control circuit is provided with a phase shift circuit PTR1 whose input terminal receives an output signal of the circuit BWC1, an amplitude reduction circuit ADC1, a subtractor circuit SUB1, a variable adder circuit VAD1, and an amplifier circuit AMP1. An output signal of the circuit PTR1 is given to an inverting input terminal (-) of the circuit SUB 1 and an output signal of the circuit ADC1 is given to its noninverting terminal (+). Furthermore, respective terminals of the circuit VAD1 receive outputs from the circuits SUB1, ADC1 and the result of the sum is given to the circuit AMP coupled with the terminals T0 , T1 . After the signal is amplified in the circuit AMP, from which the amplified signal is fed to a circuit RES1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a phase control circuit,
For example, the present invention relates to a technique which is particularly effective when applied to a phase control circuit mounted as a variable frequency oscillation circuit in a video signal processing integrated circuit device for a video tape recorder.

[0002]

2. Description of the Related Art A differential amplifier circuit that receives a control voltage obtained by, for example, phase detection, and a capacitor and a resistor that are respectively coupled to the non-inverting and inverting output terminals of the differential amplifier circuit via a pair of emitter follower circuits. A phase control circuit including a "NHK color television textbook (upper)", pages 208 to 2 issued by the Japan Broadcasting Corporation in October 1977.
It is described on page 10. This phase control circuit functions as a so-called VCO (voltage control type oscillation circuit), and the phase of the output signal, that is, the frequency, is changed in accordance with the DC voltage centering on the natural frequency of the externally attached crystal oscillator. .

[0003]

Prior to the present invention, the inventors of the present invention developed a video signal processing integrated circuit device for a video tape recorder, and based on the above phase control circuit as a variable frequency oscillation circuit thereof. A phase control circuit as shown in FIG. 6 was designed. In the figure, the phase control circuit PC
Includes a phase shift circuit PTR2 whose input terminal is coupled to an external terminal Ti, two subtraction circuits SUB3 and SUB4, and a variable addition circuit VAD2. Among these, the inverting input terminal − of the subtraction circuit SUB3 is coupled to the input terminal of the phase shift circuit PTR2, that is, the external terminal Ti, and the inverting input terminal − is coupled to the output terminal of the phase shift circuit PTR2. The inverting input terminal − of the subtraction circuit SUB4 is connected to the phase shift circuit P
A common constant voltage Vs is supplied to the non-inverting input terminal + of the TR2 which is commonly coupled to the output terminal of TR2. Further, one and the other input terminals of the variable adder circuit VAD2 are coupled to the output terminals of the subtraction circuits SUB3 and SUB4, respectively.
Its output terminal is coupled to the input terminal of the amplifier circuit AMP2. The output terminal of the amplifier circuit AMP2 is an external terminal To
Is combined with A resonance circuit R composed of a crystal oscillator having a predetermined natural frequency is provided between the external terminals To and Ti.
ES2 is provided.

Here, as shown in FIG. 7, the phase shift circuit PTR2 compresses the amplitude of the input signal na at the external terminal Ti to 1 / square root of 2 and delays its phase by 45 degrees to output the output signal nb. And Further, the subtraction circuit SUB3 is
Input signal na at external terminal Ti and phase shift circuit PTR2
Of the output signal nb of the phase shift circuit PTR2 and the output signal nc having the same amplitude as that of the output signal nb of the phase shift circuit PTR2 and having its phase advanced by 90 degrees. By taking the difference between the output signal nb and the constant voltage Vs, the output signal nd having the same amplitude as the output signal nb of the phase shift circuit PTR2 and having the phase inverted is formed. Further, the variable addition circuit VAD2 multiplies the output signal nc of the subtraction circuit SUB3 by K and the subtraction circuit SUB4 with respect to the coefficient K whose value is selectively designated in the range of 0 to 1 by the addition control signals C1 to Ck. The output signal nd of is multiplied by K-1 and added to be the output signal ne. As a result, the output signal ne of the variable addition circuit VAD2 has an amplitude substantially equal to the square root of 2 of the output signal nc of the subtraction circuit SUB3 and the output signal nd of the subtraction circuit SUB4, and its phase is shown by the dotted line in FIG. It becomes a variable frequency signal which is changed in the range.

However, in the phase control circuit PC of FIG.
Phase control circuit PC by the third harmonic component of the oscillation frequency
Since it was found that the phase control operation of the resonance circuit becomes unstable, the inventors of the present application have found that the resonance circuit RE between the external terminals To and Ti is
It is considered that a band limiting circuit BWC2 including a low pass filter including a capacitor and a resistor is provided in series with S2 to remove the third harmonic component of the oscillation frequency. However, when this method is adopted, most of the elements except the resonance circuit RES2 are integrated as a video signal processing integrated circuit device to reduce the cost, whereas the band limiting circuit B
An external component, which is WC2, is required, and there arises a problem that the cost reduction of the video signal processing integrated circuit device and thus the video tape recorder is restricted. The phase of the output signal ne of the variable adder circuit VAD2 is delayed by 45 degrees by the band limiting circuit BWC2 and the resonance circuit RES2, respectively, and the central phase thereof becomes the same as the phase of the input signal na at the external terminal Ti. The oscillation condition of the control circuit is satisfied.

An object of the present invention is to eliminate the third harmonic component of the oscillation frequency of the phase control circuit and to stabilize the phase control operation without the need for external parts other than the crystal oscillator which is the resonance circuit. To do. Another object of the present invention is to reduce the number of external components such as a video signal processing integrated circuit device including a phase control circuit, and to reduce the cost of the video signal processing integrated circuit device and eventually the video tape recorder.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0008]

The outline of the representative one of the inventions disclosed in the present application will be briefly described as follows. That is, a phase control circuit mounted on a video signal processing integrated circuit device for a video tape recorder is connected to a first external terminal whose input terminal is connected to one terminal of a resonance circuit provided outside. Band limiting circuit, a phase shifting circuit and an amplitude reducing circuit that receive the output signal of the band limiting circuit at its input terminal, and an amplitude reducing circuit that receives the output signal of the phase shifting circuit at its inverting input terminal and an amplitude reducing circuit at its non-inverting input terminal. A subtraction circuit that receives the output signal, a variable addition circuit that receives the output signal of the subtraction circuit at one of its input terminals, and an output signal of the amplitude reduction circuit at the other input terminal, and the output signal of the variable addition circuit at its input terminal And an amplifier circuit whose output terminal is coupled to a second external terminal to which the other terminal of the resonant circuit is coupled, and the band limiting circuit changes the operating current. And a bipolar transistor can be adjusted in its conductance by causing, constituting a capacitor means provided to the collector of the bipolar transistor as a base in an integrated circuit.

[0009]

According to the above-described means, the third harmonic component of the oscillation frequency of the phase control circuit is removed without the need for external parts other than the crystal oscillator, which becomes the resonance circuit, and the phase control operation is stabilized. Can be converted. As a result, the number of external components such as the video signal processing integrated circuit device including the phase control circuit can be reduced, and the cost of the video signal processing integrated circuit device and thus the video tape recorder can be reduced.

[0010]

1 shows a block diagram of a first embodiment of a phase control circuit PC to which the present invention is applied, and FIG. 2 shows an example of signals in respective parts of the phase control circuit PC of FIG. A vector diagram of the example is shown. Further, FIG. 3 shows a band limiting circuit BWC1 included in the phase control circuit PC of FIG.
FIG. 4 shows an equivalent circuit diagram of an embodiment of a crystal oscillator coupled to the phase control circuit PC of FIG. 1 as an external resonance circuit RES1. .
Based on these figures, the configuration and operation of the phase control circuit of this embodiment and its features will be described. The phase control circuit PC of this embodiment is mounted on a video signal processing integrated circuit device for a video tape recorder and functions as a variable frequency oscillating circuit thereof. The circuit elements forming each block in FIG. 1 are formed of a single crystal silicon such as single crystal silicon together with other circuit elements (not shown) of the video signal processing integrated circuit device.
It is formed on each semiconductor substrate.

In FIG. 1, the phase control circuit PC of this embodiment has a band limiting circuit BWC1 whose input terminal is coupled to an external terminal Ti (first external terminal) and its output terminal being an external terminal To (first terminal). And an amplifier circuit AMP1 coupled to the second external terminal). Of these, the external terminal Ti is
One terminal of the resonance circuit RES1 provided outside is coupled, and the other terminal is coupled to the external terminal To.

In this embodiment, the resonance circuit RES1 is composed of a crystal oscillator having a predetermined natural frequency. Equivalently, as shown in FIG. 4, an inductance Lx and a capacitance Cx and a resistance Rx are formed in series. expressed.
The crystal oscillator constituting the resonance circuit RES1 is an output signal having no phase delay with respect to the input signal, that is, the output signal n7 at the external terminal To, that is, the external terminal by appropriately selecting the cutting direction with respect to the crystal orientation. Form the input signal n1 at Ti.

On the other hand, as shown in FIG. 3, the band limiting circuit BWC1 includes NPN type differential transistors T3 and T3.
4 includes a pre-stage amplifier circuit, and a PNP-type differential transistor TD and a TE post-stage amplifier circuit that is mainly configured to receive the non-inverted and inverted output signals of the preceding stage amplifier circuit. Of these, the base of the transistor T3 that constitutes the pre-stage amplifier circuit is coupled to the input terminal n1 of the band limiting circuit BWC1. Further, the commonly coupled emitters of the differential transistors TD and TE forming the latter stage amplifier circuit have a power supply voltage VC via a PNP type transistor TC and a resistor R4 which receive a predetermined control voltage V2 at their bases.
Bound to C. Further, the collector of the transistor TE, which is the non-inverting output node of the latter-stage amplifier circuit, has a capacitance C1.
It is coupled to the ground potential VEE via (capacitance means) and is coupled to the output terminal n2 of the band limiting circuit BWC via an emitter follower circuit centered on the PNP type transistor TK, and further connected to the PNP type transistor TJ. It is coupled to the base of a transistor T4 forming a pre-stage amplifier circuit via a centered emitter follower circuit, that is, a feedback path centered on this emitter follower circuit.

As a result, the band limiting circuit BWC1 constitutes a low-pass filter whose cutoff frequency is determined by the gm of the transistor TE constituting the post-stage amplifier circuit, that is, the conductance and the capacitance value of the capacitance C1, and the input signal at the input terminal n1. It acts to remove the third harmonic. Needless to say, the band limiting circuit BWC1 including the capacitance C1 is formed on the semiconductor substrate on which the phase control circuit PC is formed as an integrated circuit. Further, the constant of each circuit element forming the band limiting circuit BWC1 is determined by the input terminal n1.
The amplitude of the input signal at is compressed to one square root of 2 and its phase is delayed by 45 degrees and is set to be transmitted to the output terminal n2. Further, the conductance of the transistor TE is selectively changed by changing the potential of the control voltage V2 at the base of the transistor TC, that is, its operating current, which allows the cutoff frequency of the band limiting circuit BWC1 to be adjusted. .

Returning to the explanation of FIG. The input signal n1 at the external terminal Ti has its third harmonic component removed by the band limiting circuit BWC1 designed based on the above conditions, and its amplitude is equal to the square root of 2 as shown in FIG. 1 and the phase thereof is delayed by 45 degrees and becomes the output signal n2 of the band limiting circuit BWC1. The output signal n2 of the band limiting circuit BWC1 is delayed in phase by 45 degrees by the phase shift circuit PTR1 and its output signal n2 is delayed.
3, and the amplitude reduction circuit ADC1 compresses the amplitude of the phase as it is to halve it to become its output signal n4.

The output signal n3 of the phase shift circuit PTR1 is supplied to the inverting input terminal-of the subtraction circuit SUB1 (first subtraction circuit). Also, the output signal n4 of the amplitude reduction circuit ADC1
Is supplied to the non-inverting input terminal + of the subtraction circuit SUB1 and also to the other of the variable addition circuit VAD1, that is, the lower input terminal. The output signal n5 of the subtraction circuit SUB1 is supplied to one of the variable adder circuits VAD1, that is, the upper input terminal. The variable adder circuit VAD1 is supplied with k-bit addition control signals C1 to Ck from a control circuit (not shown), and its output signal n6 is supplied to the input terminal of the amplifier circuit AMP1. Note that the addition control signals C1 to Ck are for designating the value of the coefficient K, and the value of the coefficient K is selectively between 0 and 1 depending on the combination of the addition control signals C1 to Ck. Can be set to the value of.

Here, the subtraction circuit SUB1 is a phase shift circuit P
The difference between the output signal n3 of TR1 and the output signal n4 of the amplitude reduction circuit ADC1 is calculated, and its non-inverted input signal, that is, the output signal having the same amplitude as the output signal n4 of the amplitude reduction circuit ADC1 and the phase advanced by 90 degrees. n5 is formed. Further, the variable adder circuit VAD1 is configured to add addition control signals C1 to Ck.
That is, when the value of the coefficient K is K, the output signal n5 of the subtraction circuit SUB1 supplied to the upper input terminal thereof is multiplied by K and the amplitude reduction circuit ADC supplied to the lower input terminal thereof.
The result obtained by multiplying the output signal n4 of 1 by K-1 and adding it is the output signal n6. From these facts, the output signal n6 of the variable addition circuit VAD1 has the center value of the amplitude of the output signal n5 of the subtraction circuit SUB1 and the amplitude reduction circuit ADC.
The square root of 2 times the output signal n4 of 1, that is, the external terminal Ti
Of the input signal n1 in FIG. 2, its phase is selectively changed in the range of the dotted line in FIG. 2 according to the value of the coefficient K, and the center of the phase is substantially coincident with the input signal n1. Becomes

The output signal n6 of the variable adder circuit VAD1 is
The phase is amplified by the amplifying circuit AMP1 as it is, and then the output signal n7 at the external terminal To is transmitted to the resonance circuit RES1. As described above, the crystal oscillator constituting the resonance circuit RES1 forms an output signal having no phase delay with respect to its input signal, that is, the output signal n7 at the external terminal To, that is, the input signal n1 at the external terminal Ti. Therefore, the center of the amplitude and phase of the output signal n7 at the external terminal To is at the external terminal Ti.
In this case, the input signal n1 is substantially the same as the input signal n1, and the oscillation condition of the phase control circuit PC is satisfied. Further, the oscillation signal formed by the phase control circuit PC and obtained as the output signal n6 of the variable addition circuit VAD1, for example, depends on the value of the coefficient K specified by the addition control signals C1 to Ck as described above. It is possible to intentionally switch within the range of the dotted line, which is the reason why the phase control circuit PC can function as a variable frequency oscillation circuit.

By the way, a band limiting circuit BWC1 for stabilizing the phase control operation of the phase control circuit PC by removing the third harmonic component of the oscillation frequency by the resonance circuit RES1.
Is mounted on the semiconductor substrate on which the phase control circuit PC, that is, the video signal processing integrated circuit device is formed as an integrated circuit as described above. As a result, in this embodiment, the third harmonic component of the oscillation frequency of the phase control circuit PC is removed without the need for external parts other than the crystal oscillator that becomes the resonance circuit RES1, and the phase control operation is stabilized. As a result, the number of external parts of the video signal processing integrated circuit device including the phase control circuit PC can be reduced, and the cost of the video signal processing integrated circuit device and by extension the video tape recorder can be reduced. .

FIG. 5 shows a block diagram of a second embodiment of the phase control circuit PC to which the present invention is applied.
It should be noted that this embodiment basically follows the embodiment of FIG. 1 described above, and therefore description will be added only to portions different from this.

In FIG. 5, the phase control circuit PC of this embodiment includes a subtraction circuit SUB2 (second subtraction circuit) whose inverting input terminal-is coupled to the external terminal Tx (third external terminal). One terminal of the resonance circuit RES1 is coupled to the external terminal Tx, and the other terminal of the resonance circuit RES1 is coupled to the ground potential VSS. Needless to say, the ground potential VSS is commonly coupled to the ground potential VSS of the phase control circuit PC, that is, the video signal processing integrated circuit device via a ground potential supply terminal (not shown).

The amplifier circuit AMP1 is connected to the non-inverting input terminal + of the subtraction circuit SUB2 via the resistor Ra (first resistor).
Output signal n7 is supplied to its inverting input terminal-
The output signal n7 of the amplifier circuit AMP1 is supplied via the resistor Rb (second resistor). The output signal of the subtraction circuit SUB2 is coupled to the input terminal of the band limiting circuit BWC1 as the input signal n1 in the embodiment of FIG.

Here, the resonance circuit RES1 is equivalently a series resonance circuit having an inductance L and a capacitance C, and the potential of the output signal n7 of the amplifier circuit AMP1 is V7 or the resistance Rb.
When the resistance value of R is R, the potentials Vi ⁺ and Vi ⁻ of the non-inverting and inverting input signals at the non-inverting input terminal + and the inverting input terminal − of the subtraction circuit SUB2 are Vi ⁺ = V7 Vi ⁻ = V7 ×, respectively. (JωL + 1 / jωC) / (R + jωL
+ 1 / jωC) = V7 × j (ωL−1 / ωC) / {R + j (ωL−1 /
ωC)}. Therefore, the output signal n1 of the subtraction circuit SUB2
Potential V1 ^{is, V1 = Vi + -Vi - =} V7 × [1-j (ωL-1 / ωC) / {R + j (ωL-1 / ωC)}] = V7 × R / {R + j (ωL-1 / ωC)} ... (1) This equation (1) is obtained by using the phase control circuit PC of FIG.
In, the resonance circuit RES1 is constituted by a crystal oscillator equivalently including an inductance Lx and a capacitance Cx, and a large resistance R is added between the external terminal Ti and the ground potential VSS so that the resistance component Rx of the crystal oscillator can be ignored. In this case, the voltage V1 of the input signal n1 corresponds to V1 = V7 × R / {R + j (ωLx−1 / ωCx)}. As a result, the phase control circuit PC of this embodiment has the same function as the phase control circuit PC of FIG.

By the way, the phase control circuit PC of this embodiment
Then, as described above, the resonance circuit RES1 is connected to the external terminal Tx.
And the ground potential VSS, ie, the ground potential supply terminal of the video signal processing integrated circuit device, the number of external terminals required as the video signal processing integrated circuit device is one in comparison with the embodiment of FIG. Be reduced. As is well known, the scale of semiconductor integrated circuits is steadily increasing, and the scale of semiconductor integrated circuits is increasing, which in turn increases the number of required external terminals, which in turn is a cause of limiting the scale. This also applies to the video signal processing integrated circuit device for a video tape recorder, and the resonance circuit RES1 is connected to the external terminal T as described above.
By reducing the number of required external terminals by one provided between x and the ground potential VSS, some restrictions on the large scale of the video signal processing integrated circuit device are relaxed and the chip area thereof is reduced. Will be things.

The operation and effect obtained from the above embodiments are as follows. That is, (1) a phase control circuit mounted on a video signal processing integrated circuit device or the like for a video tape recorder has a first terminal to which one terminal of a resonance circuit provided externally is coupled.
Band-limiting circuit coupled to the external terminal of the phase-shifting circuit and the amplitude reducing circuit that receives the output signal of the band-limiting circuit at its input terminal, and its non-inverting input terminal that receives the output signal of the phase-shifting circuit at its inverting input terminal A first subtraction circuit that receives the output signal of the amplitude reduction circuit at its terminal, and a variable addition circuit that receives the output signal of the first subtraction circuit at one of its input terminals and receives the output signal of the amplitude reduction circuit at the other input terminal And an amplifier circuit whose input terminal receives an output signal of the variable adder circuit and whose output terminal is coupled to a second external terminal to which the other terminal of the resonant circuit is coupled, A limiting circuit is integrated based on a bipolar transistor whose conductance can be adjusted by changing the operating current and a capacitance means provided on the collector side of this bipolar transistor. By configuring as a path, the effect that the third harmonic component of the oscillation frequency of the phase control circuit can be removed and the phase control operation can be stabilized without the need for external components other than the crystal oscillator is obtained. To be

(2) According to the above item (1), the number of external parts such as the video signal processing integrated circuit device including the phase control circuit can be reduced, and the cost of the video signal processing integrated circuit device and thus the video tape recorder can be reduced. The effect that it can be achieved is obtained. (3) In the above items (1) and (2), the resonance circuit is provided between the third external terminal and the ground potential supply terminal,
The phase control circuit is provided with a second subtraction circuit whose inverting input terminal is coupled to the third external terminal, and the output terminal of the amplification circuit is subjected to the second subtraction via the first and second resistors. Coupled to the non-inverting and inverting input terminals of the circuit respectively,
By coupling the output terminal of the second subtraction circuit to the input terminal of the band limiting circuit, it is possible to reduce the number of required external terminals of the video signal processing integrated circuit device including the phase control circuit and reduce the chip area. Is obtained.

The invention made by the present inventor has been specifically described above based on the embodiments, but the invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say. For example, in FIGS. 1 and 5 and 2, the amplitude ratio and the phase difference between the input signal and the output signal in each part of the phase control circuit PC are arbitrarily set as long as the oscillation condition of the phase control circuit PC is satisfied. it can. Further, the input terminal of the band limiting circuit BWC1 may be selectively connectable to a plurality of resonance circuits having different natural frequencies, for example, via a predetermined switch circuit. Resonance circuit RES
A vibrating element other than the crystal oscillator can be used for 1, and the block configuration of the phase control circuit PC is not restricted by this embodiment. In FIG. 3, the band limiting circuit BW
Various embodiments can be adopted for the specific configuration of C1, the polarity of the power supply voltage, the conductivity type of the transistor, and the like.

In the above description, the case where the invention made by the present inventor is mainly applied to a phase control circuit mounted in a video signal processing integrated circuit device for a video tape recorder, which is a field of application in the background, will be described. However, the present invention is not limited to this, and can be applied to various semiconductor devices including a single phase control circuit or a similar phase control circuit, for example. The present invention
It can be widely applied to a phase control circuit that requires at least a band limiting circuit for suppressing a harmonic component of an oscillation frequency, and an apparatus and a system including such a phase control circuit.

[0029]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. That is, a phase control circuit mounted as a variable frequency circuit in a video signal processing integrated circuit device or the like for a video tape recorder has a first external terminal to which one terminal of a resonance circuit having an external input terminal is coupled. , A phase-shift circuit and an amplitude reduction circuit that receive the output signal of the band-limiting circuit at its input terminal, and an amplitude signal at its non-inverting input terminal that receives the output signal of the phase-shift circuit at its inverting input terminal. A subtraction circuit that receives the output signal of the reduction circuit,
A variable adder circuit that receives the output signal of the subtractor circuit at one of its input terminals and the output signal of the amplitude reduction circuit at the other input terminal, and the output signal of the variable adder circuit at its input terminal A bipolar transistor which basically comprises an amplifier circuit which is coupled to a second external terminal to which the other terminal of the circuit is coupled, and whose conductance can be adjusted by changing the operating current of the band limiting circuit. And the capacitance means provided on the collector side of the bipolar transistor as a basic integrated circuit, the oscillation frequency of the phase control circuit can be controlled without the need for external parts other than the crystal oscillator that becomes the resonance circuit. It is possible to remove the third harmonic component and stabilize the phase control operation. As a result, the number of external components such as the video signal processing integrated circuit device including the phase control circuit is reduced,
It is possible to reduce the cost of the video signal processing integrated circuit device and eventually the video tape recorder.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of a phase control circuit to which the present invention is applied.

FIG. 2 is a vector diagram showing an example of a signal in each part of the phase control circuit of FIG.

3 is a circuit diagram showing an embodiment of a band limiting circuit included in the phase control circuit of FIG.

4 is an equivalent circuit diagram showing an embodiment of a crystal oscillator included as an external resonance circuit in the phase control circuit of FIG.

FIG. 5 is a block diagram showing a second embodiment of a phase control circuit to which the present invention is applied.

FIG. 6 is a block diagram showing an example of a phase control circuit developed by the inventors of the present application prior to the present invention.

7 is a vector diagram showing an example of a signal in each part of the phase control circuit of FIG.

[Explanation of symbols]

PC ... Phase control circuit, BWC1 to BWC2 ... Band limiting circuit, PTR1 to PTR2 ... Phase shift circuit, AD
C1 ... Amplitude reduction circuit, SUB1 to SUB4 ... Subtraction circuit, VAD1 to VAD2 ... Variable addition circuit, C1
~ Ck ... Addition control signal, AMP1 to AMP2 ...
Amplifier circuit, To, Ti, Tx ... External terminal, RES1
~ RES2 ... Resonance circuit. T1 to T8 ... NPN type bipolar transistor, TA to TK ... PNP type bipolar transistor, R1 to R9, Rx, Ra to Rb
... resistance, C1, Cx ... capacitance, Lx ... inductance.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Furu ▼ Makoto 5-20-1, Kamimizuhoncho, Kodaira-shi, Tokyo Inside the Semiconductor Division, Hitachi, Ltd. (72) Inventor Shigehisa Yamamoto Kodaira, Tokyo 5-22-1, Jousuihonmachi Inside Hitachi Microcomputer System Co., Ltd.

Claims (4)

[Claims] 1. A first and second external terminal to which one and the other terminals of an externally provided resonance circuit are respectively coupled, and an input terminal thereof is substantially coupled to the first external terminal. A band limiting circuit, a phase shift circuit and an amplitude reduction circuit that receive the output signal of the band limiting circuit at its input terminal, and an output signal of the phase shift circuit at its inverting input terminal and its amplitude reduction at its non-inverting input terminal. A first subtraction circuit for receiving the output signal of the circuit, and a variable addition circuit for receiving the output signal of the first subtraction circuit at one input terminal thereof and the output signal of the amplitude reduction circuit at the other input terminal thereof, A phase control circuit comprising: an amplifier circuit whose input terminal receives the output signal of the variable adder circuit and whose output terminal is coupled to the second external terminal. 2. A third external terminal provided externally, one terminal of which is coupled to the ground potential of the circuit, and the other terminal of the resonant circuit, which is coupled to the third external terminal, and its inverting input terminal being substantially the third terminal. Second subtracting circuit coupled to the external terminal of the band limiting circuit, a band limiting circuit receiving the output signal of the second subtracting circuit at its input terminal, and a phase shift circuit receiving the output signal of the band limiting circuit at its input terminal And an amplitude reduction circuit, a first subtraction circuit that receives the output signal of the phase shift circuit at its inverting input terminal and receives the output signal of the amplitude reduction circuit at its non-inverting input terminal, and the first subtraction circuit at one of its input terminals. Variable adder circuit which receives the output signal of the subtraction circuit of No. 1 and the output signal of the amplitude reduction circuit at the other input terminal, and the output terminal of which receives the output signal of the variable adder circuit at its input terminal Two
An amplifier circuit coupled to the non-inverting and inverting input terminals of the second subtraction circuit via the resistor of FIG. 3. The resonance circuit comprises a crystal oscillator, and both the band limiting circuit and the phase shift circuit set the amplitude of the input signal to 1 / square root of 2 and the phase thereof to 4
The output signal is delayed by 5 degrees, and the amplitude reduction circuit
The amplitude of the input signal is halved, and the output signal is obtained without changing the phase. The subtraction circuit advances the phase by 90 degrees without changing the amplitude of the non-inverting input signal to obtain the output signal. The variable adder circuit outputs a result obtained by multiplying one input signal by K and multiplying the other input signal by K-1 and adding the result to a coefficient K that selectively takes a value between 0 and 1 The phase control circuit selectively outputs, as an output signal of the variable adder circuit, a phase difference corresponding to the value of the coefficient K to the input signal of the band limiting circuit. 3. The phase control circuit according to claim 1, which constitutes a variable frequency oscillating circuit for forming the circuit. 4. The phase control circuit is mounted on a video signal processing integrated circuit device for a video tape recorder, and the band limiting circuit can adjust its conductance by changing an operating current. 4. A phase control circuit according to claim 1, further comprising a bipolar transistor and a capacitance means provided on the collector side of the bipolar transistor.