JPH08171081A - Watrix type display device - Google Patents

Abstract

PURPOSE: To equalize the display quality of repaired region to that of the residual region even when the disconnecting defect of a signal line is restored and to prevent electrostatic breakdown by absorbing static electricity entered from a connection wiring drawn around the peripheral part of a panel in a high definition liquid crystal display device with a large area using a TFT. CONSTITUTION: In a liquid crystal display device 21 being restorable by forming spare wirings 31, 32 orthogonal to signal lines 23, 24 as a source bus of a TFT 26 through an insulating film and bypassing the before and after parts of the signal line 24 by means of the spare wirings 31, 32 and connection wirings 33, 34 when the defective place of disconnection 60 is generated, the voltage drop by the spare wirings 31, 32 is compensated by using built-in buffers BL1, BL2, BR1, BR2 in driving circuits 1CL, 1CR when the spare wirings 31, 32 are utilized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matrix type display device suitable for use in a liquid crystal display device or the like, and more particularly to a matrix device capable of repairing a disconnection defect of a scanning line or a signal line for display drive in a large screen display device. Mold display device.

[0002]

2. Description of the Related Art In a display device in which picture element electrodes are arranged in a matrix, scanning lines and signal lines formed on a substrate have become narrower in line width as the display panel becomes higher in definition. In addition, as the screen becomes larger, the layout length on the panel is becoming longer. On the other hand, if a disconnection defect occurs in the scanning line or the signal line, it is not possible to drive a pixel beyond the location of the disconnection defect, and display quality is significantly deteriorated.

Therefore, the applicant of the present invention has previously disclosed the Japanese Patent Laid-Open No.
No. 23425 proposes a configuration that can be repaired even if the disconnection defect occurs. FIG. 6 is a simplified electric circuit diagram showing such a conventional liquid crystal display device 1.

This liquid crystal display device 1 has a plurality of TCPs (Tape Carri) at opposite ends of the panel 2.
er Package) dl1, dl2, ..., dln;
, drn (hereinafter referred to as reference numerals dl and dr when collectively referred to) are arranged, and TCPul1 to ulm; u are similarly provided at both ends of the other pair.
It is an active matrix type liquid crystal display device in which r1 to urm are arranged and capable of high-definition display. Each TC
Drive circuits icl and icr, which are realized by integrated circuits or the like, are mounted on Pdl and dr, respectively. To each drive circuit icl, icr, via the wiring pattern 8 of the common substrates cl, cr provided in common for each TCPdl, dr,
A video signal is input.

The panel 2 includes, for example, a pair of upper and lower glass substrates parallel to each other, polarizing plates formed on the outer surfaces of both glass substrates, and transparent electrodes formed on the inner surfaces of the glass substrates. And an alignment film formed on the transparent electrode, a spacer that hermetically seals the outer peripheral portions of both glass substrates, and a liquid crystal material enclosed in a space formed by the glass substrate and the spacer. It is configured. The transparent electrodes are commonly formed, for example, on the lower substrate, while on the other hand, the transparent electrodes are arranged in a matrix corresponding to each picture element.

Therefore, signal lines 3 and 4 are formed in parallel and alternately with each other on the upper substrate. A scanning line 5 is formed which is orthogonal to the signal lines 3 and 4 and is electrically insulated from the signal lines 3 and 4. Furthermore, at the intersection of each of the signal lines 3 and 4 and the scanning line 5, a thin film switching element TFT (Thin Fil) is formed.
m Transistor) 6 and capacitor 7 are formed.

The gate electrode of the TFT 6 is connected to the scanning line 5, the source electrode is connected to the signal line 3 or 4, and the drain electrode is connected to the capacitor 7 and the corresponding pixel electrode. Therefore, the TFT 6 has the scanning line 5
Conducts when selected by the selection pulse applied to
The liquid crystal and the capacitor 7 are charged with the gradation voltage corresponding to the duty pulse applied to the signal lines 3 and 4. The liquid crystal and the capacitor 7 retain the electric charge until the next scanning timing, and the image is displayed.

The signal line 3 is electrically connected to the corresponding wiring pattern 9 of TCPdl on one end side of the panel 2 by, for example, an anisotropic conductive tape.
Similarly, the signal line 4 is provided on the other end side of the panel 2 with T
It is electrically connected to the wiring pattern 10 of CPdr. Therefore, the signal lines 3 and 4 are respectively provided with the drive circuit ic.
A drive voltage corresponding to the video signal from l and icr is applied.

On the other hand, at both ends of the panel 2, a preliminary wiring which is perpendicular to the signal lines 3 and 4, that is, parallel to the scanning line 5 and electrically insulated from the signal lines 3 and 4 through an insulating film. 11 and 12 are formed respectively. Corresponding to this, two connection wirings 13 and 14 are formed on the common substrates cl and cr.

On the TCPdl side, the connection wiring 13 is connected to a communication line 15 which intersects the spare wiring 11 via the insulating film. Similarly, on the TCPdl side, the connection wiring 14 is connected to the communication line 16 intersecting with the spare wiring 11. On the other hand, on the TCPdr side, the connection wiring 13 is connected to the communication line 17 intersecting with the spare wiring 12, and the connection wiring 14 is connected to the communication line 18 intersecting with the spare wiring 12.

In the liquid crystal display device 1 configured as described above, when it is found in the inspection process that a disconnection defect such as that indicated by the reference numeral 19 has occurred in the signal line 4, the signal line 4 and the signal line 4 are detected. The intersection 20a with the preliminary wiring 12 is electrically connected by, for example, removing the insulating film by laser light irradiation. Corresponding to this, the intersection 20b between the spare wire 12 and the communication line 17, the intersection 20c between the communication line 15 and the spare wire 11, and the intersection 2 between the spare wire 11 and the signal line 4
0d is also electrically connected.

As a result, the TC from the disconnection defective portion 19
A driving voltage is directly applied to the TFT 6 near the Pdr via the TCPdr side portion of the signal line 4, whereas the TFT 6 on the TCPdl side from the disconnection failure portion 19 is spared from the signal line 4 on the TCPdr side. Wiring 12, communication line 1
A drive voltage is applied via 7, the connection wiring 13, the communication line 15, the auxiliary wiring 11, and the portion of the signal line 4 on the TCPdl side. In this way, the disconnection defective portion 19 is bypassed,
Both the picture elements before and after that can display images.

[0013]

In the above-mentioned prior art,
The voltage drop due to the spare wirings 11 and 12 and the connection wirings 13 and 14 is not considered, and the voltage applied to the signal lines 3 and 4 on the disconnected side is the output voltage as it is from the drive circuits icl and icr. .

Therefore, the connection lines 15, 16; 17, connected to the connection wirings 13, 14 at both ends in the arrangement direction of the wiring patterns 9, 10 of the drive circuits icl, icr, respectively.
18 is formed and the connecting lines 15, 17 or 16, 18 on the side close to the signal lines 3 and 4 in which the disconnection occurs are used, but when the panel 2 becomes large, There is a problem that the display quality is significantly reduced due to the voltage drop. In particular, the voltage drop is formed on the glass substrate, and the spare wiring 1 made of aluminum or the like is used.
1 and 12, and therefore TCP dl and dr are provided only on the one end side of the panel 2, the wiring length of the spare wiring on the other end side becomes long and the display quality deteriorates. Is remarkable.

Furthermore, since the connection wirings 13 and 14 are routed around the peripheral portion of the panel 2 over a long distance, electrostatic noise easily enters, and when the electrostatic noise enters,
There is also a problem that the picture elements such as the TFT 6 are destroyed.

An object of the present invention is to provide a matrix type display device which can improve the resistance to electrostatic noise without deteriorating the display quality when repairing a disconnection defect. is there.

[0017]

According to a first aspect of the present invention, there is provided a matrix type display device comprising a plurality of scanning lines arranged in parallel with each other and a plurality of signals electrically insulated from the scanning lines and orthogonally arranged. In a matrix type display device including lines, and a drive circuit that selectively applies a voltage to each scanning line and a signal line to drive a display, a spare line for at least one of the scanning line and the signal line And a buffer interposed in the protection line, and the scanning line or the signal line in which the disconnection failure occurs is connected to the protection line.

A matrix type display device according to a second aspect is characterized in that a thin film switching element is provided at an intersection of each scanning line and a signal line.

Further, in the matrix type display device according to a third aspect, the buffer is integrally provided in the drive circuit.

[0020]

According to the invention of claim 1, a plurality of scanning lines arranged in parallel with each other on the substrate and a signal line electrically insulated from the scanning lines are arranged orthogonally, and each scanning line is arranged. Display elements, which are picture elements formed at the intersections of the lines and the signal lines, are arranged in a matrix, and a driving circuit selectively applies a voltage to each of the scanning lines and the signal lines, so that, for example, light and shade of each of the picture elements. In a matrix type display device in which the desired display is changed by disconnection of at least one of the scanning line and the signal line outside the display area where the scanning line or the signal line is formed. A spare line is provided in advance in order to ensure a signal path by bypassing when there is a defect. In addition, a buffer for compensating for the voltage drop that occurs during the transmission of the signal is interposed in this backup line.

When a disconnection defect occurs in the scanning line or the signal line, among the scanning lines or signal lines extending from one end side to the other end side of the substrate, the portion closer to the drive circuit than the disconnection defect portion, that is, for example, the above-mentioned The voltage from the drive circuit is applied to the scanning line or the signal line on the one end side of the substrate, and the scanning line on the side opposite to the drive circuit from the defective disconnection point, that is, the scanning line on the other end side of the substrate. Alternatively, a spare line is connected to the signal line, and an output voltage from a drive circuit corresponding to the scan line or the signal line is applied. Further, the buffer is provided on the protection line as described above.

Therefore, the output voltage of the drive circuit corresponding to the scanning line or the signal line is applied from both the front and rear sides of the disconnection defective portion by using the backup line, and the signal through the backup line is buffered. Since the voltage drop due to the spare line is compensated, even if the disconnection defect is repaired by using the spare line, the display content of the display element driven by the repaired scanning line or signal line may have insufficient density, for example. It is possible to perform a display equivalent to that of a display element in which disconnection does not occur without causing display failure such as occurrence of a line.

Further, by disposing the buffer on the other end side of the substrate, that is, on the terminal side of the spare line formed on the outer periphery of the substrate, the scanning line or the signal line due to static electricity invading from the spare line or the like. It is possible to prevent the occurrence of overvoltage on the display element and prevent damage to the display element.

Preferably, according to the invention of claim 2,
Thin film switching elements such as so-called TFTs are formed at the intersections of the scanning lines and the signal lines. Therefore, in the case of a high-definition active matrix type display device including such a thin film switching element, the display device has a small line width of the scanning line and the signal line, and thus a disconnection easily occurs, Moreover, since the conductivity thereof is low, the present invention can be implemented particularly suitably.

Further preferably, according to the invention of claim 3, the buffer is integrally provided in the drive circuit.
The driving circuit decodes a video signal corresponding to an image to be displayed from a display register or the like and drives the scanning line or the signal line, and a decoding circuit and a buffer corresponding to each scanning line or the signal line. It has and. Therefore, by integrally providing the buffer for the protection line, it is possible to compensate for the voltage drop due to the protection line as described above without increasing the cost.

[0026]

【Example】

[Embodiment 1] An embodiment in which the present invention is applied to a liquid crystal display device will be described below with reference to FIGS.

FIG. 1 is a simplified electric circuit diagram showing a liquid crystal display device 21 according to an embodiment of the present invention. The liquid crystal display device 21 includes a plurality of TCPDL1, DL2, ..., DLn;
2, ..., DRn (hereinafter, when collectively referred to, reference numerals DL,
(Indicated by DR) are arranged respectively, and TCPUL1 to ULm; UR1 to URm are also provided at both ends of the other pair.
It is an active matrix type liquid crystal display device capable of high-definition display in which pixels are arranged. Each TCPDL, DR
Is a drive circuit IC realized by an integrated circuit or the like.
L and ICR are mounted. Each drive circuit ICL, IC
A video signal is input to R via the wiring patterns 28 of the common substrates CL and CR that are provided commonly to the TCPDLs and DRs. Similarly, TCPUL1 to ULm; UR1 to
Video signals are input to the URm from the common substrates EL and ER.

The panel 22 includes, for example, a pair of upper and lower glass substrates parallel to each other, a polarizing plate formed on the outer surface of each of the glass substrates, and a transparent electrode formed on the inner surface of each of the glass substrates. And an alignment film formed on the transparent electrode, a spacer that hermetically seals the outer peripheral portions of both glass substrates, and a liquid crystal material enclosed in a space formed by the glass substrate and the spacer. It is configured. The transparent electrodes are commonly formed, for example, on the lower substrate, while on the other hand, the transparent electrodes are arranged in a matrix corresponding to each picture element.

Therefore, signal lines 23 and 24 are formed in parallel with each other and alternately on the upper substrate. A scanning line 25 orthogonal to the signal lines 23 and 24 and electrically insulated from the signal lines 23 and 24.
Are formed. Furthermore, each of the signal lines 23, 2
A TFT 26 and a capacitor 27, which are thin film switching elements, are formed at the intersections of 4 and the scanning lines 25.

The gate electrode of the TFT 26 is the scanning line 25.
, The source electrode is connected to the signal line 23 or 24, and the drain electrode is connected to the capacitor 27 and the corresponding pixel electrode. Therefore, the TFT 26
Becomes conductive when selected by the selection pulse applied to the scanning line 25, and charges the liquid crystal 27 and the capacitor 27 with the gradation voltage corresponding to the duty pulse applied to the signal lines 23 and 24. The liquid crystal and the capacitor 27 retain the electric charge until the next scanning timing, and the image is displayed.

The signal line 23 has a wiring pattern 29 corresponding to TCPDL on one end side of the panel 22,
For example, it is electrically connected by an anisotropic conductive tape or the like. Similarly, the signal line 24 is electrically connected to the TCPDR wiring pattern 30 on the other end side of the panel 22. Therefore, the signal lines 23 and 24 respectively have
A drive voltage corresponding to the video signal from the drive circuits ICL and ICR is applied. In addition, the scan line 25 has a TCP
UL1 to ULm; drive voltages from UR1 to URm are applied.

On the other hand, at both ends of the panel 22,
Preliminary wirings 31 and 32 are formed perpendicular to the signal lines 23 and 24, that is, parallel to the scanning lines 25 and electrically insulated from the signal lines 23 and 24 via an insulating film. Correspondingly, on the common substrates CL and CR,
Two connection wirings 33 and 34 are formed. Two buffers B are provided in each of the drive circuits ICL and ICR.
L1 and BL2; BR1 and BR2 are integrally provided.

On the TCPDL side, the connection wiring 33 is connected to the input side of the buffer BL1 in the drive circuit ICL, and is also connected to the communication line 35 that intersects the spare wiring 31 through the insulating film. ing. Similarly TCPD
On the L side, the connection wiring 34 is connected to the input side of the buffer BL2 and is also connected to the communication line 36 intersecting with the spare wiring 31.

On the other hand, on the TCPDR side, the connection wiring 33 is connected to the input side of the buffer BR1 in the drive circuit ICR, and also connected to the communication line 37 intersecting the spare wiring 32, and the connection wiring. 34 is a buffer BR
2 is connected to the input side and is also connected to a connection line 38 that intersects with the auxiliary wiring 32.

FIG. 2 is a block diagram of the drive voltage output circuit 41 to the signal lines 23 and 24 in the drive circuits ICL and ICR. From the wiring patterns 28a of the common substrates CL and CR, data D ₀ , D ₁ , D ₂ , and D ₃ of, for example, 4 bits, that is, 16 gradations for each picture _element are input, and these data are D flip-flops. In the latch circuit 42 composed of a latch, the latch circuit 42 is latched in response to the timing of the clock signal Tsmp (i) from the wiring pattern 28b. The output from the latch circuit 42 is output to the wiring pattern 28 in the hold circuit 43 including a D flip-flop.
It is held at the timing of the latch signal OE via c, and the hold value is given to the output waveform forming circuit 44.

The output waveform forming circuit 44 has terminals d ₀ ,
Corresponding to the gradation data input to d ₁ , d ₂ and d ₃ ,
The five types of reference signal waveforms T ₀ , T ₄ , T ₈ , T ₁₂ , T ₁₆ input via the wiring pattern 28d are appropriately selected, and the interpolation data H ₀ input via the wiring pattern 28e. , H ₁ , H ₂ , and H ₃ are output to the output buffer 45 as duty waveforms. Output buffer 4
5 is a high level voltage V _SH , for example, a power supply voltage of 4. while the input duty signal is at a high level.
When 5V is output and is at a low level, a low level voltage V _SL , for example, 0V of the ground voltage is output. The output voltage O (i) from the output buffer 45 is output from the wiring patterns 29 and 30 to the signal lines 23 and 24.

In this way, a drive voltage having a duty corresponding to the gradation data of the picture element is applied to each of the signal lines 23 and 24 corresponding to the picture element to be display-driven, and the drive voltage is a resistance component up to the picture element and The voltage is smoothed to a voltage corresponding to the duty by the capacitance component and applied to each pixel electrode.

FIG. 3 is an electric circuit diagram of the buffer BL1. This buffer BL1 is the output buffer 45.
Output buffer 4 realized with a digital buffer similar to
6 and diodes 47 and 48 for protecting the input thereof. The diodes 47 and 48 respectively connect the input terminals of the output buffer 46 to the high-level power supply line 49 and the low-level ground line 50 with opposite polarities.

Therefore, the forward voltage drop of the diodes 47 and 48 is VD, and the voltage of the lines 49 and 50 is V _DD ,
When each and V _SS, input voltage V to the input terminal 51
The input voltage to the output buffer 46 is regulated so that V _SS −VD <VIN <V _DD + VD with respect to IN. The output buffer 46 outputs the high level voltage V _SH or the low level voltage V _SL to the output terminal 52 in accordance with the duty of the input voltage to the input terminal 51.

The buffers BL2; BR1, BR
2 is configured similarly to this buffer BL1. Further, these buffers BL1, BL2; BR1, BR2 may be configured as shown in FIG. That is, in this example, the analog output buffer 53 realized by a differential amplifier or the like is used instead of the output buffer 46 described above. The output buffer 53 forms a so-called voltage follower in which the output is fed back to one input,
Therefore, the input voltage to the input terminal 51 is the diode 4
After being regulated by 7, 48, it is applied to the output buffer 53, and a constant voltage output is derived from the output buffer 53 to the output terminal 52 regardless of the number of TFTs 26 to be driven.

The digital buffer shown in FIG. 3 is the same as that shown in FIG.
4 is particularly suitable for the binary multi-gray scale output circuit, and the analog buffer shown in FIG. 4 is an output circuit other than the binary multi-gray scale output circuit, for example, an analog drive circuit, a digital / digital output circuit. It is preferably implemented in an analog conversion type drive circuit, an oscillating voltage type drive circuit, and the like.

The liquid crystal display device 21 constructed as described above.
At, for example, when it is found in the inspection process that the signal line 24 has a disconnection defect as indicated by reference numeral 60, the intersection 61 of the signal line 24 and the spare wiring 32 becomes
Electrical connection is made by, for example, removing the insulating film by irradiation with laser light. Correspondingly, the buffer BL1 and the connecting line 37 are selected in order to shorten the use length of the auxiliary lines 31 and 32 made of aluminum or the like and having low conductivity, and the intersection of the auxiliary line 32 and the connecting line 37 is selected. 62, an intersection 63 between the output line of the buffer BL1 and the spare wire 31, and an intersection 64 between the spare wire 31 and the signal line 24 are similarly electrically connected.

As a result, the disconnection failure point 60 is transferred to the TC
In the TFT 26 near the PDR, the TCPDR of the signal line 24
The drive voltage is directly applied through the side portion, and the disconnection failure portion 60 to the TCPDL side TFT 26 is connected to the TCPDR side signal line 24 to the spare wiring 32.
A drive voltage is applied via the communication line 37, the connection wiring 33, the buffer BL1, the spare wiring 31, and the TCPDL side portion of the signal line 24.

Therefore, even for the TFT 26 on the TCPDL side of the disconnection defect portion 60, the spare wiring 32,
The voltage drop at 31 and the connection wiring 33 is caused by the buffer B.
The driving voltage is applied after being compensated by L1. As a result, the picture elements on the TCPDL side from the disconnection defect portion 60 are also
It is possible to display with the same shade as the picture element on the TCPDR side from the disconnection defect portion 60, without impairing the display quality.
A disconnection defect can be repaired. Even if electrostatic noise is captured by the connection wirings 33 and 34 that are routed around the peripheral edge of the panel 22, the noise is absorbed by the buffers BL1 and B.
L2: Since the diodes 47 and 48 of BR1 and BR2 remove the pixels, it is possible to reliably prevent destruction of picture elements such as the TFT 26 due to electrostatic noise.

[Second Embodiment] The second embodiment of the present invention will be described below with reference to FIG. For convenience of explanation, members (structures) having the same functions as the members (structures) shown in the drawings of the first embodiment will be designated by the same reference numerals, and the description thereof will be omitted.

It should be noted that the liquid crystal display device 7 of this embodiment
1, DTCPs D1, D2, ..., Dn (collectively denoted by reference numeral D) are arranged only at one end of the panel 72, and therefore the area of the panel 72 is different from that of the above-described embodiment. Can be suitably implemented when the value is small or the definition is low. Therefore, the signal line 73 is connected to the TCPD drive circuit IC at one end. This signal line 7
Around the both ends of 3, the signal line 73
Preliminary wirings 74 and 75 are electrically insulated from each other and are formed in the orthogonal direction, that is, in parallel with the scanning line 25.

Therefore, when a disconnection failure occurs as indicated by reference numeral 76, the signal line 73 in which the disconnection occurs is electrically connected to the spare wirings 74 and 75 at the intersections 77 and 78, respectively. The buffer B1 connected to the connection wiring 33 on the side where the path length of is shortened is selected, and the intersection 79 of the connection wiring 33 and the spare wiring 75 is selected.
Are electrically connected.

In this way, similarly to the above-described embodiment, the voltage drops in the spare wirings 74 and 75 and the connection wirings 33 and 34 can be compensated by the buffers B1 and B2. In this embodiment, of the connection wirings 33 and 34, the panel 72
33a and 34a formed on the other end side of the same are portions 33a and 34a formed on the remaining common substrates C and E and TCPD.
Since b and 34b are formed of copper or the like, they are formed of a material having a low electric conductivity such as aluminum, so that the present invention capable of compensating for a voltage drop can be particularly suitably implemented.

In the above embodiment, the two connection wirings 3
3 and 34 are formed, but the conductivity of the spare wirings 31, 32; 74, 75 formed on the glass substrate is high, or the buffers BL1, BL2; BR1, BR
2; When it is possible to sufficiently compensate for the voltage drop at B1 and B2, the number of the connection wirings may be one, and in order to enable the disconnection repair at a plurality of locations, both ends of the panel 22 may be repaired. A plurality of spare wires may be formed in each case, and a corresponding connection wire may be formed. Furthermore, it goes without saying that the present invention can be applied to the scanning line 25.

[0050]

As described above, the matrix type display device according to the first aspect of the present invention has a protection line which is orthogonal to at least one of the scanning lines and the signal lines and electrically insulated in advance. When the disconnection is defective, the disconnection defective portion is bypassed to ensure the signal path by using the protection line, and the protection line has a buffer for compensating the voltage drop due to the protection line. Set up.

Therefore, even if the disconnection defect is repaired by using the spare line, the display content of the display element driven by the repaired scanning line or signal line may cause a display defect such as insufficient density. Without doing so, it is possible to perform a display equivalent to that of a display element in which disconnection has not occurred. Further, by providing the buffer on the terminal side of the protection line,
It is possible to prevent the occurrence of overvoltage on the scanning line or the signal line due to static electricity or the like that has entered from the backup line, and prevent damage to the display element.

The matrix type display device according to the invention of claim 2 is an active matrix type display device in which thin film switching elements such as TFTs are formed at the intersections of the scanning lines and the signal lines as described above. is there. Therefore, in the display device, the line widths of the scanning lines and the signal lines are small, and thus the disconnection is likely to occur, and the conductivity thereof is low, so that the present invention can be particularly suitably implemented.

Furthermore, in the matrix type display device according to the invention of claim 3, the buffer is integrally provided in the drive circuit as described above. Therefore, the buffer for driving the scanning line or the signal line and the buffer for the backup line can be integrally formed at the same time, and the voltage drop can be compensated without increasing the cost. .

[Brief description of drawings]

FIG. 1 is a simplified electric circuit diagram showing a liquid crystal display device of an embodiment of the present invention.

FIG. 2 is a block diagram showing an electrical configuration of a drive voltage output circuit in a TFT drive circuit in the liquid crystal display device.

FIG. 3 is an electric circuit diagram of an embodiment of a buffer that is integrally incorporated in the drive circuit and that compensates for a voltage drop when using a preliminary wiring, which is a feature of the present invention.

FIG. 4 is an electric circuit diagram of another embodiment of the buffer.

FIG. 5 is a simplified electric circuit diagram showing a liquid crystal display device of another embodiment of the present invention.

FIG. 6 is an electrical circuit diagram on a panel in a typical prior art liquid crystal display device.

[Explanation of symbols]

 21 liquid crystal display device (matrix type display device) 22 panel 23 signal line 24 signal line 25 scanning line 26 TFT (switching element) 27 capacitor 31 spare wiring (spare line) 32 spare wiring (spare line) 33 connection wiring (spare line) 34 Connection wiring (spare line) 35 Communication line (spare line) 36 Communication line (spare line) 37 Communication line (spare line) 38 Communication line (spare line) 45 Output buffer 46 Output buffer 53 Output buffer 60 Broken disconnection point 71 Liquid crystal Display device (matrix type display device) 72 Panel 73 Signal line 74 Preliminary wiring (preliminary line) 75 Preliminary wiring (preliminary line) 76 Faulty disconnection line BL buffer BR buffer B1 buffer B2 buffer DL TCP DR TCP D D TCP IC drive circuit

Claims (3)

[Claims] 1. A plurality of scan lines arranged in parallel with each other,
In a matrix type display device comprising a plurality of signal lines electrically insulated from the scanning lines and arranged orthogonally to each other, and a drive circuit for selectively applying a voltage to each scanning line and the signal line to perform display drive, A spare line for at least one of the scan line and the signal line, and a buffer interposed in the spare line, wherein the scan line or the signal line in which a disconnection defect occurs is connected to the spare line. Matrix display device. 2. The matrix type display device according to claim 1, wherein a thin film switching element is provided at an intersection of each scanning line and a signal line. 3. The matrix type display device according to claim 1, wherein the buffer is integrally provided in the drive circuit.