JPH08168242A - Synchronous rectifying converter - Google Patents

Abstract

PURPOSE: To obtain a synchronous rectifying converter of which the synchronous rectifying FET and commutation FET are not operated by a reverse current from a DC power source when the converter is used by connecting the converter in parallel with the DC power source. CONSTITUTION: A synchronous rectifying converter applies an input DC voltage across the primary winding of a transformer after converting the voltage into a rectangular wave pulse voltage by means of a semiconductor switch 2 and rectifies and smoothes the voltage pulse fetched from the secondary winding of the transformer by means of a synchronous rectifying FET 4, a commutation FET 5, a choke coil 6, a capacitor 7, etc. The converter is constituted so that the FET 4 cannot be operated by an external DC power source 12 connected in parallel with the coverter. Therefore, a switch circuit 23 which detects the voltage drop across the source and drain of the FET 4 and, when the detected voltage value becomes higher than a prescribed value, sets the commutation FET 5 to an operating state is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a synchronous rectification converter, and more particularly to a synchronous rectification converter that can be used in parallel with another DC power source.

[0002]

2. Description of the Related Art Conventionally, a D using a synchronous rectification circuit of this type is used.
As a C-DC converter, as shown in FIG. 3, the DC voltage of the DC input power supply 1 is converted into a rectangular wave pulse voltage by the switching operation of the semiconductor switch 2, and this rectangular wave pulse voltage is desired by the transformer 3. Rectified and smoothed by the rectification circuit of the semiconductor rectification elements (synchronous rectification FET) 4 and (commutation FET) 5 and the smoothing circuit by the choke coil 6 and the capacitor 7, and the average value voltage is obtained. I try to take it out. The control of the switching operation of the semiconductor switch 2 is controlled by the voltage detection control circuit 8 which detects the output voltage of the synchronous rectification converter, based on the detection condition. (2)

Generally, in the case of a synchronous rectification circuit, a semiconductor switch is used as the rectification elements 4 and 5 for synchronous operation as shown in FIG. 3, and a synchronous switch is used only for the synchronous rectification element 4. However, in the present invention, the former circuit that emphasizes the improvement of conversion efficiency, that is, the synchronous rectifying elements 4 and 5 are both field-effect type semiconductor switches (F.
It is intended for circuits using ET). Therefore, the semiconductor rectifying element 4 is referred to as a synchronous rectifying FET 4 and the semiconductor rectifying element 5 is referred to as a commutating FET 5. Since the commutation FET 5 cannot obtain a gate signal over the entire commutation period, a commutation diode 9 is usually added. Such synchronous rectification converters are available from small capacity to large capacity, and the synchronous rectification converter according to the load capacity is selected and used.

[0004]

However, preparing a synchronous rectification converter according to the load capacity means increasing the number of models, which requires inventory for each model. Therefore, it is desired to reduce the number of models from the viewpoint of design, production and article management, and it is considered to cope with a large capacity load by connecting the same model in parallel. However, the conventional synchronous rectification shown in FIG. The following problems occur when the converters are connected in parallel or when another DC power source (battery or the like) is connected in parallel. That is, when another synchronous rectification converter of the same kind or an external DC power supply 12 such as a battery is connected in parallel to the output terminals 10 and 11 as described above, this other power supply connected in parallel is more preferable. ,
When the voltage becomes relatively higher than the output voltage of the synchronous rectification converter and the voltage detection control circuit 8 detects this and stops the operation of the semiconductor switch 2, or when the synchronous rectification converter outputs the voltage. When the power supply is stopped due to the operation of the protection device or the like, the external DC power supply 12 is output from the output terminals 10 and 11.
Is supplied to the synchronous rectification FET 4 and the commutation FE.
Since it is applied to the gate of T5, both FETs 4, 5
Will continue to be conductive. This is because when the FET (3) is used as a rectifying element and the gate bias is normal with respect to the source potential, the drain-source of both FETs 4 and 5 is
Current can flow in either direction between the gaps, so that current may flow back from the output terminal and eventually be destroyed.

In order to solve the above-mentioned problems, we have previously proposed a gate signal circuit of a synchronous rectification FET and a commutation FET shown in FIG. 2 (Japanese Patent Application No. 5-148410). This content converts a DC input voltage into a rectangular wave pulse voltage by a switching element, applies it to the primary winding of a transformer, and outputs the desired voltage pulse extracted by the secondary winding of the transformer to synchronous rectification FET and commutation. A synchronous rectification converter that rectifies and smoothes by a FET, a choke coil, a capacitor, etc., and outputs a DC voltage. The synchronous rectification FET operates depending on an external DC power supply connected in parallel to the synchronous rectification converter. In the synchronous rectification converter configured so as not to operate, the current value on the primary side or the secondary side of the transformer is detected, and the commutation FET is operated when the detected current value exceeds a predetermined value. A switching circuit is provided to prevent the commutation FET from operating due to an external DC power source connected in parallel with the synchronous rectification converter.

In the configuration of FIG. 2, the pulse current on the primary side of the transformer is converted into a voltage by means of a resistor connected to the current transformer 13 and its output side as a means for detecting the current. The current transformer 13 may be inserted in the secondary side pulse circuit, and other current detecting means may be replaced by a low resistance in place of the current transformer. Since it causes a descent, the increase in loss is inevitable.

[0007]

It is an object of the present invention to make the voltage of an external DC power supply 12 connected in parallel to the output terminals 10 and 11 higher than the output voltage of the synchronous rectification converter of the main body. Even if the converter becomes inoperative, the synchronous rectification FET 4 and the commutation FET 5 are prevented from being turned on by the external DC power source 12 (4), and the gate signal circuit of the commutation FET 5 with less loss is provided. The present invention provides a synchronous rectification converter equipped with.

[0008]

According to the present invention, a direct current input voltage is converted into a rectangular wave pulse voltage by a semiconductor switch 2 and applied to a primary winding of a transformer, and a voltage pulse extracted by the secondary winding is A synchronous rectification converter which rectifies and smoothes by a synchronous rectification FET 4, a commutation FET 5, a choke coil 6, and a capacitor 7, wherein the synchronous rectification FET 4 is connected by an external DC power supply 12 connected in parallel to the synchronous rectification converter. Is a synchronous rectifier converter configured not to operate.
And a switch circuit 23 for detecting a voltage drop generated between the source and the drain of the synchronous rectification FET 4 and activating the commutation FET 5 when the detected voltage value exceeds a predetermined value. It is a thing.

[0009]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.
FIG. 4 is an operation waveform diagram of each part, and the same parts as those in the conventional example are represented by the same reference numerals. First, the operating state of the synchronous rectification FET 4 in this embodiment will be described. Synchronous rectification F
Since the gate of the ET4 is connected to the output side of the choke coil 6 connected to the negative polarity line, a normal rectangular wave pulse is output to the secondary side of the synchronous rectification converter. If so, the synchronous rectification FET 4 operates normally. However, since the voltage of the external DC power supply 12 connected in parallel becomes relatively higher than the output voltage of the synchronous rectification converter, the synchronous rectification converter is connected.
If the external DC power supply 12 is connected to the output terminals 10 and 11 when the power supply stops operating, the synchronous rectification FET 4 does not receive an appropriate positive voltage to its gate, and therefore the external DC power supply 12 is used. Is not working.

Next, the operation of the commutation FET 5 will be described. In FIG. 1, the voltage shown in FIG. 4A appears on the secondary side of the transformer 3 as the semiconductor switch 2 is turned on and off. (5) The synchronous rectification FET 4 is turned on by the positive polarity voltage of FIG. 4 (a). At this time, the voltage between the source and the drain of the synchronous rectification FET 4 is immediately after being turned on as shown in FIG. 4 (b). A relatively large voltage drop in the form of a spike occurs, and thereafter, the voltage drop due to the on-resistance between the source and drain of this FET settles down. The cause of this spike-like voltage is that the voltage is applied to the source before the gate voltage of the synchronous rectification FET is sufficiently applied. Normal N channel F
It is well known that a P-n junction is formed inside the FET between the source and drain of the ET, but in the synchronous rectification FET it is connected so that a current flows from the source to the drain. , Even if there is no signal at the gate, the internal P-n
Current flows through the junction. However, since the voltage drop of this P-n junction is much larger than that due to the on-resistance between the source and drain of the FET, as shown in FIG. 4 (b) until a sufficient voltage is applied to the gate. It appears as a spike voltage.

Since the spike-like voltage shown in FIG. 4 (b) is large enough to allow a current to flow through the base of the transistor 28, the transistor 2 is generated during the generation of the spike.
8 becomes conductive and sets the voltage across the capacitor 27 of the switch circuit 23 to zero. The resistor 25 charges the electric charge of the capacitor 27, and its value is the gate of the switch element 26 (P-channel FET in the example in the figure) for almost one cycle.
Are selected so that they remain fully on. The voltage of the capacitor 27 at this time is shown in FIG. Thus, when the semiconductor switch 2 is turned on, the flyback voltage of the transformer is directly applied to the gate of the commutation FET 5. This state is shown in FIG. The voltage drop of the synchronous rectification FET 4 shown in FIG. 4B is a transistor because the spike-shaped voltage disappears as shown in FIG. 4E due to a capacitance component between the source and drain when the circuit current becomes small. Two
8 cannot operate. Therefore, the voltage of the capacitor 27 remains charged as shown in FIG. 4 (f), and the switch element 26 remains in the off state. Commutation F at this time
The voltage applied to the gate of ET5 remains off as shown in FIG. The purpose of the diode 24 is to prevent the voltage charged in the capacitor 27 from (6) being discharged through the resistor 25.

In this state, the operation of the synchronous rectification converter is detected by the voltage detection control circuit 8 that the voltage of the external DC power supply 12 becomes relatively high,
Since the sending of the switching pulse to the semiconductor switch 2 is stopped, the secondary side pulse current of the transformer 3 also disappears and the voltage drop between the source and drain of the synchronous rectification FET 4 does not occur. As a result, the switch circuit 23 that controls the operation of the commutation FET 5 is turned off. in this way,
Control of the on / off state of the commutation FET 5 is a synchronous rectification FET
Since it is performed by the voltage drop between the source and drain of No. 4, even if the external DC power supply 12 is connected to the output terminals 10 and 11, the commutation F from the output terminals 10 and 11 is performed.
The backflow phenomenon in which current flows into ET5 does not occur. When the load of the synchronous rectification converter is no load or when the commutation load is present, the gate signal of the commutation FET 5 is turned off and no current flows in the commutation FET 5, but the commutation diode 9 Commutation rectification flows in the forward direction. Also, the resistor 1 in FIG.
8 is a commutation FE when no voltage is generated in the transformer 3.
The gate circuit of T5 is provided for the purpose of preventing malfunction due to high impedance.

[0013]

As described above, according to the present invention, the commutation FET is detected only when the voltage drop of the synchronous rectification FET of the synchronous rectification converter is detected and the detected voltage is equal to or higher than a predetermined value. The synchronous rectification FET is operated by other means to block the reverse current of the external DC power supply. The synchronous rectification FET and the commutation FET are not operated by the external DC power supply connected in parallel to the synchronous rectification converter. It enables parallel operation of external DC power supplies, and in particular, enables parallel connection of synchronous rectification converters of the same type according to the load capacity. This has the effect of reducing the number of converter models.

[Brief description of drawings]

 (7)

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 Conventional circuit diagram

FIG. 3 Conventional circuit diagram

FIG. 4 is an operation waveform diagram of each part of the embodiment circuit of the present invention.

[Explanation of symbols]

 1 DC input power supply 2 Semiconductor switch 3 Voltage conversion transformer 4 Synchronous rectification FET 5 Commutation FET 6 Choke coil 7, 21, 27 Capacitor 8 Voltage detection control circuit 9 Commutation diode 10, 11 Output terminal 12 External DC power supply 13 Current transformer 14 Current detection control circuit 15,23 Switch circuit 16,28 Transistor 17,26 Control FET 18,19,22,25,29 Resistor 24 Diode

Claims (1)

[Claims] 1. A synchronous rectification FET for converting a DC input voltage into a rectangular wave pulse voltage by a switching element, applying the rectangular wave pulse voltage to a primary winding of a transformer, and applying a desired voltage pulse extracted by the secondary winding of the transformer. A synchronous rectification converter for rectifying and smoothing by a commutation FET, a choke coil, a capacitor, etc., and outputting a DC voltage.
Is a synchronous rectification converter configured so as not to be operated by an external DC power supply connected in parallel to the synchronous rectification converter, and detects a voltage drop between the source and drain of the synchronous rectification FET, A synchronous rectification converter, characterized in that a switch circuit is provided which activates the commutation FET when the detected voltage value exceeds a predetermined value.