JPH08162681A - Superconducting circuit - Google Patents
Superconducting circuitInfo
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- JPH08162681A JPH08162681A JP6303769A JP30376994A JPH08162681A JP H08162681 A JPH08162681 A JP H08162681A JP 6303769 A JP6303769 A JP 6303769A JP 30376994 A JP30376994 A JP 30376994A JP H08162681 A JPH08162681 A JP H08162681A
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、段差部を有する絶縁体
上に超電導薄膜を形成し、この段差部が超電導弱結合部
として機能する段差型ジョセフソン接合を用いた超電導
回路の構成に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a superconducting circuit using a step type Josephson junction in which a superconducting thin film is formed on an insulator having a step portion and the step portion functions as a superconducting weak coupling portion.
【０００２】[0002]
【従来の技術】段差型ジョセフソン接合を用いた応用に
ついては，たとえばアップライド フィズィックス レ
ターズ 第６０巻 １９９２年 第３０４８頁から第３
０５０頁（Applied Physics Letters 60 (1992) 3048-3
050）等に記載されている。2. Description of the Related Art For applications using step-type Josephson junctions, for example, Upride Physics Letters, Vol. 60, 1992, pp. 3048 to 3
050 (Applied Physics Letters 60 (1992) 3048-3
050) etc.
【０００３】この文献に示された技術は段差型ジョセフ
ソン接合を用いてｄｃ−ＳＱＵＩＤ（Superconducting
Quantum Interference Device；超電導量子干渉素子）
を作製した例が開示されている。The technique disclosed in this document uses a step-type Josephson junction to form a dc-SQUID (Superconducting).
Quantum Interference Device)
An example of making the is disclosed.
【０００４】すなわち、ＳｒＴｉＯ3またはＬａＡｌＯ3
からなる絶縁性基板上に高さ０．３〜０．４μｍの段差
が形成され、この基板上に前記段差高さより低い値の膜
厚１５０ｎｍでＹＢａ2Ｃｕ3Ｏxからなる酸化物超電導
体の超電導薄膜が形成され、この超電導薄膜は環状のパ
ターンからなり前記段差部を２箇所で乗り越えている。
これらは前記段差部において超電導弱結合部、すなわち
ジョセフソン接合として機能している。That is, SrTiO 3 or LaAlO 3
A step having a height of 0.3 to 0.4 μm is formed on an insulating substrate made of, and a superconducting oxide superconductor made of YBa 2 Cu 3 Ox having a film thickness of 150 nm having a value lower than the step height is formed on the substrate. A thin film is formed, and this superconducting thin film has an annular pattern and crosses over the step portion at two places.
These function as weak superconducting portions, that is, Josephson junctions in the step portion.
【０００５】この従来例はジョセフソン接合を２つ含む
例を示すものであり、しかも超電導薄膜はこれらのジョ
セフソン接合を通る直線により２つの領域に分けられる
が、これ以上の多くのジョセフソン接合を用いたりある
いはこれら２つの超電導薄膜の領域をジョセフソン接合
を介さずに接続するという、より複雑な超電導回路を作
製する試みはなされていない。従って多数のジョセフソ
ン接合を含む超電導回路を作製する際の問題点が考察さ
れていなかった。This conventional example shows an example including two Josephson junctions, and the superconducting thin film is divided into two regions by a straight line passing through these Josephson junctions, but many more Josephson junctions than this. No attempt has been made to fabricate a more complicated superconducting circuit by using or connecting these two regions of the superconducting thin film without interposing a Josephson junction. Therefore, no problems have been considered in manufacturing a superconducting circuit including a large number of Josephson junctions.
【０００６】すなわち、段差型ジョセフソン接合を用い
た超電導回路では、段差部は高さの異なる２つの半平
面、上面と下面の境界に形成されるため、元々任意の位
置にジョセフソン接合を配置することが困難であるとい
う問題を有するが、さらに超電導薄膜が段差部を乗り越
えるときに常にジョセフソン接合が形成されるため段差
部を形成する上面と下面とをジョセフソン接合を含まな
い超電導配線で接続することがむずかしく、従って段差
型ジョセフソン接合を用いた複雑な超電導回路を実現す
るためにはレイアウト設計上大きな制約を受けるという
問題を有する。That is, in a superconducting circuit using a step type Josephson junction, the step portion is formed on two half-planes having different heights and a boundary between the upper surface and the lower surface, so that the Josephson junction is originally arranged at an arbitrary position. However, since the Josephson junction is always formed when the superconducting thin film gets over the step, the upper and lower surfaces forming the step are formed by superconducting wiring not including the Josephson junction. It is difficult to connect them, and therefore, there is a problem that layout design is greatly restricted in order to realize a complicated superconducting circuit using a step-type Josephson junction.
【０００７】[0007]
【発明が解決しようとする課題】段差部を境界として絶
縁体表面は高さの高い上面と高さの低い下面の２つの領
域に分けられるが、段差部を乗り越える超電導薄膜の性
質は、段差の高さ、段差の角度に依存する。すなわち、
段差の高さが高く、角度が急峻であるほどその超電導性
は弱められ、超電導弱結合部が形成され、従ってこの箇
所はジョセフソン接合として機能する。一方、２つの超
電導領域間を超電導配線で接続するためには、接合部の
超電導性を強める必要がある。従って段差部で分けられ
た上面、下面の２つの領域をある箇所ではジョセフソン
接合として、また、ある箇所では超電導配線として接続
するためには、段差の高さ、段差の角度を接続箇所によ
って変え、結合の強さを調整しなければならないが、こ
のようにした場合、段差作製のために多数の工程を要し
てしまうことになる。The surface of the insulator is divided into two regions, an upper surface having a high height and a lower surface having a low height, with the step portion as a boundary. Depends on height and step angle. That is,
The higher the height of the step and the steeper the angle, the weaker the superconductivity becomes, and the superconducting weak coupling portion is formed. Therefore, this portion functions as a Josephson junction. On the other hand, in order to connect the two superconducting regions with superconducting wiring, it is necessary to enhance the superconductivity of the joint. Therefore, in order to connect the two regions, the upper surface and the lower surface, which are separated by the step portion, as a Josephson junction at a certain place and as a superconducting wire at a certain place, the height of the step and the angle of the step are changed depending on the connecting portion. However, it is necessary to adjust the strength of the bond, but in this case, many steps are required for forming the step.
【０００８】段差部を境界として形成された上面、下面
の領域を超電導配線として接続する他の方法は、接続の
配線幅を広くし、最大超電導電流値を他のジョセフソン
接合部よりも大きくし、これより弱結合特性が現れない
ようにすることであるが、このようにした場合、配線の
占める面積が大きくなり、集積性が劣化するという問題
が生じることになる。Another method of connecting the upper and lower regions formed with the stepped portion as a boundary as superconducting wiring is to widen the wiring width of the connection and make the maximum superconducting current value larger than that of other Josephson junctions. It is to prevent the weak coupling characteristic from appearing, but in such a case, the area occupied by the wiring becomes large and the problem of deterioration of the integration occurs.
【０００９】本発明はこのような事情に基づいてなされ
たものであり、その目的は、レイアウト設計上の制約を
緩和し、かつ工程数や集積性を著しく損なわずに、多数
の段差型ジョセフソン接合を用いた回路構成の複雑な超
電導回路を提供することにある。The present invention has been made under such circumstances, and an object of the invention is to ease restrictions on layout design, and to prevent a large number of steps and integration from being significantly impaired, and to provide a large number of step type Josephson devices. An object of the present invention is to provide a complicated superconducting circuit having a circuit configuration using a junction.
【００１０】[0010]
【課題を解決するための手段】本願において開示される
発明のうち、代表的なものの概要を簡単に説明すれば、
以下のとおりである。Of the inventions disclosed in the present application, a representative one will be briefly described below.
It is as follows.
【００１１】手段１．段差が形成された絶縁基板面に該
段差を跨って被着された超電導薄膜によって超導電素子
が形成されたものであって、段差を跨い少なくともこの
段差部にその段差の高さ以上の膜厚を有して被着されて
いる超電導薄膜を配線層として用いることを特徴とする
ものである。 Means 1. A superconducting element is formed of a superconducting thin film deposited on a surface of an insulating substrate on which a step is formed, the film having a thickness of at least the height of the step over the step. It is characterized in that the superconducting thin film deposited with the above is used as a wiring layer.
【００１２】手段２．前記手段１において、前記超電導
素子を含む超電導薄膜と前記配線層を含む超電導薄膜と
をそれぞれ別工程で膜厚を異ならしめて形成することを
特徴とするものである。 Means 2. In the means 1, the superconducting thin film including the superconducting element and the superconducting thin film including the wiring layer are formed in different steps with different film thicknesses.
【００１３】手段３．前記手段１において、絶縁基板面
に形成された段差は複数備えるとともに、それらの各段
差は全て異なる高さの２つの面のみから構成されている
ことを特徴とするものである。 Means 3. The means 1 is characterized in that it is provided with a plurality of steps formed on the surface of the insulating substrate, and each of these steps is composed of only two surfaces having different heights.
【００１４】[0014]
【作用】手段１のように構成した場合、超電導素子の形
成のために構成した段差の個所に拘らず自由に配線層と
して機能させることのできる超電導薄膜を形成すること
ができるようになる。In the case of the construction of the means 1, it becomes possible to form the superconducting thin film which can freely function as a wiring layer irrespective of the position of the step formed for forming the superconducting element.
【００１５】このように段差の個所に拘束されることな
く配線層を形成できることによって、多数の段差型ジョ
セフソン接合を含む複雑な回路構成を採用することがで
きるようになる。Since the wiring layer can be formed without being restricted by the position of the step as described above, it becomes possible to adopt a complicated circuit configuration including a large number of step type Josephson junctions.
【００１６】手段２のように構成した場合、その製造と
してわずか一工程分増加するだけで、上述した複雑な回
路構成を達成することができるようになる。When the means 2 is used, the complicated circuit structure described above can be achieved by increasing the number of manufacturing steps by just one step.
【００１７】手段３のように構成した場合、回路構成の
複雑化にともない段差の数も多くしなければならなくな
るが、高さの異なる２つの面のみで構成されていること
から、基板の表面形状を複雑にする必要がなくなるとい
う効果を奏する。When the means 3 is used, the number of steps must be increased as the circuit structure becomes complicated. However, since it is composed of only two surfaces having different heights, the surface of the substrate This has the effect of eliminating the need to complicate the shape.
【００１８】[0018]
【実施例】以下本発明を実施例を用いて詳細に説明す
る。まず図１ないし図３を用いて一実施例を説明する。
本実施例は、超電導回路としてＱＦＰ（Quantum Flux P
arametron；量子磁束パラメトロン）を用いて多数決論
理回路を作製した例である。EXAMPLES The present invention will be described in detail below with reference to examples. First, an embodiment will be described with reference to FIGS.
In this embodiment, a QFP (Quantum Flux P) is used as a superconducting circuit.
This is an example of making a majority logic circuit using arametron (quantum magnetic flux parametron).
【００１９】図１は平面図である。ＳｒＴｉＯ3基板か
らなる絶縁体１の主表面に半直線Ｏ−Ａ、Ｏ−Ａ’、Ｏ
−Ｂ、Ｏ−Ｂ’に沿って高さｈ＝０．３μｍの段差が形
成されている。段差は通常の有機レジスト、光リソグラ
フィ、Ａｒイオンビームエッチングを用いて作製した。
図中、半平面Ａ−Ｏ−Ｂ’、Ａ’−Ｏ−Ｂが段差の上面
であり、半平面Ａ−Ｏ−Ｂ、Ａ’−Ｏ−Ｂ’が段差の下
面である。FIG. 1 is a plan view. Half lines OA, OA ′, O are formed on the main surface of the insulator 1 made of a SrTiO 3 substrate.
A step having a height h = 0.3 μm is formed along −B and OB ′. The step was formed using a normal organic resist, photolithography, and Ar ion beam etching.
In the figure, the half-planes A-O-B 'and A'-O-B are the upper faces of the steps, and the half-planes A-O-B and A'-O-B' are the lower faces of the steps.
【００２０】この絶縁体１の上に酸化物超電導体ＹＢａ
2Ｃｕ3Ｏxからなる超電導薄膜２が形成されている。こ
の超電導膜２の形成方法としては、まず、段差高さ以上
（たとえば０．４μｍ）の厚さの超電導薄膜を全面に成
膜後、選択エッチングにより加工してジョセフソン接合
部以外の超電導配線部を形成した。次に、段差高さの１
／２の厚さ（たとえば０．１５μｍ）の超電導薄膜を全
面に成膜後、同様に選択エッチングにより加工してジョ
セフソン接合部のパターンを形成した。An oxide superconductor YBa is formed on the insulator 1.
A superconducting thin film 2 made of 2 Cu 3 Ox is formed. As a method of forming the superconducting film 2, first, a superconducting thin film having a step height or more (for example, 0.4 μm) is formed on the entire surface and then processed by selective etching to form a superconducting wiring portion other than the Josephson junction. Was formed. Next, step height 1
A superconducting thin film having a thickness of / 2 (for example, 0.15 μm) was formed on the entire surface, and then similarly processed by selective etching to form a Josephson junction pattern.
【００２１】このような形成方法ではジョセフソン接合
部のパターンを後の工程で作製したので、エッチング加
工の際の膜質の損傷を抑えることができ、これよりバラ
ツキの少ない特性の優れたジョセフソン接合が得られる
ことが判った。According to such a forming method, since the pattern of the Josephson junction is produced in a later step, it is possible to suppress the damage of the film quality during the etching process, and the Josephson junction excellent in the characteristics with less variation than that. It was found that
【００２２】超電導薄膜２は乗り越え部分３ないし８で
段差を乗り越える。そのうちの乗り越え部分３における
図中ａ−ａ’に沿った断面図を図２に示す。同図におい
て段差から離れたところでは膜厚ｔ’＝０．４５μｍと
段差高さより厚いが、段差の近傍では超電導薄膜の膜厚
ｔ＝０．１５μｍと段差高さの１／２であり、また段差
の角度θ＝６０°と十分急峻な角度であるので、この箇
所は超電導弱結合部，すなわちジョセフソン接合として
機能する。同様に、乗り越え部分４、６、７もジョセフ
ソン接合として機能するようになっている。The superconducting thin film 2 gets over the step at the overrunning portions 3 to 8. FIG. 2 shows a cross-sectional view taken along the line aa 'in the overpass portion 3 among them. In the figure, the film thickness t ′ = 0.45 μm at a distance from the step is thicker than the step height, but in the vicinity of the step, the film thickness t = 0.15 μm of the superconducting thin film is ½ of the step height. Since the angle θ of the step is a steep angle of 60 °, this portion functions as a superconducting weak coupling portion, that is, a Josephson junction. Similarly, the overriding portions 4, 6 and 7 also function as Josephson junctions.
【００２３】そして、乗り越え部分５における図中ｂ−
ｂ’に沿った断面図を図３に示す。超電導薄膜の膜厚は
ｔ’＝０．４５μｍと段差高さよりも厚いのでジョセフ
ソン接合は形成されず、超電導配線として機能する。Then, b-in the figure in the overcoming portion 5
A cross-sectional view along b'is shown in FIG. Since the thickness of the superconducting thin film is t ′ = 0.45 μm, which is thicker than the step height, no Josephson junction is formed and it functions as a superconducting wiring.
【００２４】超電導薄膜の膜厚を段差以上とすることに
よって配線層としての機能を有する理由としては以下の
ように考えられる。The reason why the superconducting thin film has a function as a wiring layer when the thickness of the superconducting thin film is not less than the step is considered as follows.
【００２５】図４に示すように、超電導素子が段差部に
おいて粒界２０がその厚さ方向全てに形成されてしまう
ことに対して、超電導配線層の場合は、図５に示すよう
に、厚さ方向の一部にしか形成されないことにある。As shown in FIG. 4, the grain boundary 20 is formed in the step portion of the superconducting element as shown in FIG. 4, whereas in the case of the superconducting wiring layer, as shown in FIG. It is formed only in a part of the vertical direction.
【００２６】そして、酸化物超電導体ＹＢａ2Ｃｕ3Ｏx
の磁場侵入長はλ＝０．１４μｍであるので、条件ｔ’
＞２λが満足され，十分な磁場遮蔽効果が得られること
になる。けだし、超電導薄膜の膜厚に関し、十分な磁場
遮蔽効果を得るという立場からは膜厚は磁場侵入長以
上、表面と裏面の２面を考慮すれば磁場侵入長の２倍以
上とすることが望ましいことが判明しているからであ
る。The oxide superconductor YBa 2 Cu 3 Ox
Since the magnetic field penetration length of is λ = 0.14 μm, the condition t ′ is
> 2λ is satisfied, and a sufficient magnetic field shielding effect can be obtained. However, regarding the film thickness of the superconducting thin film, from the standpoint of obtaining a sufficient magnetic field shielding effect, it is desirable that the film thickness is at least the magnetic field penetration length, and considering the two surfaces, the front surface and the back surface, at least twice the magnetic field penetration length. This is because it is known.
【００２７】このように構成された超電導回路は、その
乗り越え部分３、４、５と、絶縁膜を介して形成された
酸化物超電導薄膜ＹＢａ2Ｃｕ3Ｏxからなる励振線１４
とともにＱＦＰを形成するようになっている。The superconducting circuit having the above-mentioned structure is provided with the excitation line 14 made of the oxide superconducting thin film YBa 2 Cu 3 Ox formed through the overcoming portions 3, 4, 5 and the insulating film.
Together with this, it forms a QFP.
【００２８】入力端子９、９’、入力端子１０、１
０’、入力端子１１、１１’には電流の向きで論理値"
０"、"１"を表す入力電流Ａ、入力電流Ｂ、入力電流Ｃ
がそれぞれ入力されるようになっており、ＱＦＰはこれ
ら３入力信号の多数決を演算するようになっている。Input terminals 9, 9 ', input terminals 10, 1
0 ', input terminals 11 and 11' are logical values depending on the direction of current "
Input current A, input current B, and input current C representing 0 "and" 1 "
Are inputted respectively, and the QFP is adapted to calculate the majority decision of these three input signals.
【００２９】乗り越え部分６、５、８、７は２つのジョ
セフソン接合を含む超電導閉ループでありｄｃ−ＳＱＵ
ＩＤが形成されている。出力端子１２、１２’間には直
流定電流が印加されるようになっており、前記ＱＦＰに
おける出力を出力端子１３、１３’間の電圧として取り
出せるようになっている。The overriding portions 6, 5, 8 and 7 are superconducting closed loops containing two Josephson junctions and are dc-SQU.
ID is formed. A DC constant current is applied between the output terminals 12 and 12 ', and the output of the QFP can be taken out as a voltage between the output terminals 13 and 13'.
【００３０】なお、上述した実施例では、段差は半直線
Ｏ−Ａ、Ｏ−Ａ’、Ｏ−Ｂ、Ｏ−Ｂ’に沿って形成さ
れ、これにより領域において異なる２つの凹陥部が形成
された構成になる。すなわち、回路構成の複雑化にとも
ない段差の数も多くしなければならなくなるが、このよ
うに高さの異なる２つの面のみで構成することによっ
て、基板の表面形状を複雑にする必要がなくなるという
効果を奏する。In the above-described embodiment, the step is formed along the half lines OA, OA ', OB and OB', whereby two different recesses are formed in the area. It will be a different configuration. That is, the number of steps must be increased as the circuit configuration becomes more complicated, but it becomes unnecessary to make the surface shape of the substrate complicated by forming only two surfaces having different heights. Produce an effect.
【００３１】以上、説明したことから明らかとなるよう
に、本実施例のように多数のジョセフソン接合を含む複
雑な超電導回路では、レイアウト設計上、超電導配線部
が段差を乗り越えることが起こり得る。従来の段差型ジ
ョセフソン接合を用いた超電導回路では段差を乗り越え
る時必ずジョセフソン接合が形成されてしまうので、こ
のような場合、段差部の乗り越え部分の配線幅を広くす
る等の必要があり、集積性を損ねたりレイアウト設計上
問題が生じることになる。しかし本実施例に示したよう
に乗り越え部の超電導薄膜の膜厚を厚くすることによ
り、ジョセフソン接合としてではなく超電導配線として
機能できるので、レイアウト設計上の制約を緩和して複
雑な超電導回路を実現できることになる。As is clear from the above description, in the complicated superconducting circuit including a large number of Josephson junctions as in this embodiment, the superconducting wiring portion may get over the step due to the layout design. In a conventional superconducting circuit using a step-type Josephson junction, a Josephson junction is always formed when getting over a step.In such a case, it is necessary to widen the wiring width at the step-over portion. This may impair the integration and cause a layout design problem. However, by increasing the film thickness of the superconducting thin film at the crossover portion as shown in this example, it can function not as a Josephson junction but as a superconducting wiring, so that restrictions on layout design can be relaxed and a complicated superconducting circuit can be formed. It will be possible.
【００３２】[0032]
【発明の効果】以上説明したように本発明の段差型ジョ
セフソン接合を用いた超電導回路は、膜厚の異なる超電
導薄膜を用いることにより、超電導薄膜の段差乗り越え
部分をジョセフソン接合としても超電導配線としても活
用できる。したがって、レイアウト設計上の制約を緩和
し、集積性や工程数を著しく損ねることなく、多数のジ
ョセフソン接合を含む複雑な超電導回路を提供できる。As described above, in the superconducting circuit using the step type Josephson junction of the present invention, by using the superconducting thin films having different film thicknesses, the superconducting wiring can be formed even when the step-over portion of the superconducting thin film is used as the Josephson junction. Can also be used as Therefore, it is possible to provide a complicated superconducting circuit including a large number of Josephson junctions without loosing layout design restrictions and significantly impairing the integration and the number of steps.
【図１】本発明による超電導回路の一実施例を示す平面
図である。FIG. 1 is a plan view showing an embodiment of a superconducting circuit according to the present invention.
【図２】図１のａ−ａ’線における断面図である。FIG. 2 is a cross-sectional view taken along the line aa ′ of FIG.
【図３】図１のｂ−ｂ’線における断面図である。3 is a cross-sectional view taken along the line b-b 'of FIG.
【図４】超電導素子としての機能を有する理由を示す図
である。FIG. 4 is a diagram showing the reason for having a function as a superconducting element.
【図５】超電導配線としての機能を有する理由を示す図
である。FIG. 5 is a diagram showing a reason for having a function as superconducting wiring.
１…絶縁体、２…超電導薄膜、３〜８…乗り越え部分、
９〜１１，９’〜１１’…入力端子、１２〜１３，１
２’〜１３’…出力端子、１４…励振線。1 ... Insulator, 2 ... Superconducting thin film, 3-8 ... Overcoming part,
9-11, 9'-11 '... Input terminals, 12-13, 1
2'-13 '... Output terminal, 14 ... Excitation line.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 深沢 徳海 東京都国分寺市東恋ケ窪１丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 杉井 信之 東京都国分寺市東恋ケ窪１丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 ▲高▼木 一正 東京都国分寺市東恋ケ窪１丁目280番地 株式会社日立製作所中央研究所内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Tokumi Fukasawa, Tokumi Fukasawa, 1-280 Higashi Koikekubo, Kokubunji, Tokyo (72) Central Research Laboratory, Hitachi, Ltd. (72) Nobuyuki Sugii 1-280 Higashi Koikeku, Kokubunji, Tokyo Hitachi Ltd. Central Research Laboratory of the Works (72) Inventor ▲ Kazumasa Takagi 1-280, Higashi Koikekubo, Kokubunji City, Tokyo Inside the Central Research Laboratory of Hitachi, Ltd.
Claims (3)
跨って被着された超電導薄膜によって超導電素子が形成
されたものであって、 段差を跨い少なくともこの段差部にその段差の高さ以上
の膜厚を有して被着されている超電導薄膜を配線層とし
て用いることを特徴とする超電導回路。1. A superconducting element is formed by a superconducting thin film deposited on a surface of an insulating substrate having a step formed over the step, and the superconducting element is formed over the step at least at the step portion. A superconducting circuit characterized by using as a wiring layer a superconducting thin film having a film thickness of not less than that.
配線層を含む超電導薄膜とをそれぞれ別工程で膜厚を異
ならしめて形成することを特徴とする請求項１記載の超
電導回路の製造方法。2. The method for manufacturing a superconducting circuit according to claim 1, wherein the superconducting thin film including the superconducting element and the superconducting thin film including the wiring layer are formed with different film thicknesses in different steps.
るとともに、それらの各段差は全て異なる高さの２つの
面のみから構成されていることを特徴とする請求項１記
載の超電導回路。3. The superconducting circuit according to claim 1, wherein a plurality of steps are formed on the surface of the insulating substrate, and each of the steps is composed of only two surfaces having different heights.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6303769A JP2740460B2 (en) | 1994-12-07 | 1994-12-07 | Superconducting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6303769A JP2740460B2 (en) | 1994-12-07 | 1994-12-07 | Superconducting circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08162681A true JPH08162681A (en) | 1996-06-21 |
| JP2740460B2 JP2740460B2 (en) | 1998-04-15 |
Family
ID=17925068
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6303769A Expired - Fee Related JP2740460B2 (en) | 1994-12-07 | 1994-12-07 | Superconducting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2740460B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19629583A1 (en) * | 1996-07-23 | 1998-01-29 | Dornier Gmbh | Emitter and / or detector component for submillimeter-wave radiation and method for its production |
| US6348699B1 (en) | 1996-07-23 | 2002-02-19 | Oxxel Oxide Electronics Technology Gmbh | Josephson junction array device, and manufacture thereof |
| KR100517496B1 (en) * | 2002-01-04 | 2005-09-28 | 삼성전자주식회사 | Cantilever having step-up structure and method for manufacturing the same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03297177A (en) * | 1990-04-16 | 1991-12-27 | Shimadzu Corp | Ic adjusting method of squid device |
| JPH05160448A (en) * | 1991-12-03 | 1993-06-25 | Sumitomo Electric Ind Ltd | Abrupt josephson device |
| JPH05251769A (en) * | 1991-12-05 | 1993-09-28 | Sumitomo Electric Ind Ltd | Connection structure of superconducting current path |
-
1994
- 1994-12-07 JP JP6303769A patent/JP2740460B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03297177A (en) * | 1990-04-16 | 1991-12-27 | Shimadzu Corp | Ic adjusting method of squid device |
| JPH05160448A (en) * | 1991-12-03 | 1993-06-25 | Sumitomo Electric Ind Ltd | Abrupt josephson device |
| JPH05251769A (en) * | 1991-12-05 | 1993-09-28 | Sumitomo Electric Ind Ltd | Connection structure of superconducting current path |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19629583A1 (en) * | 1996-07-23 | 1998-01-29 | Dornier Gmbh | Emitter and / or detector component for submillimeter-wave radiation and method for its production |
| DE19629583C2 (en) * | 1996-07-23 | 2001-04-19 | Oxxel Oxide Electronics Techno | Emitter and / or detector device for submillimeter-wave radiation with a multiplicity of Josephson contacts, method for its production and uses of the device |
| US6348699B1 (en) | 1996-07-23 | 2002-02-19 | Oxxel Oxide Electronics Technology Gmbh | Josephson junction array device, and manufacture thereof |
| KR100517496B1 (en) * | 2002-01-04 | 2005-09-28 | 삼성전자주식회사 | Cantilever having step-up structure and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2740460B2 (en) | 1998-04-15 |
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