JPH08161475A - Display controller - Google Patents

Abstract

PURPOSE: To realize video capture without special addition of a memory for attribute and without decreasing number of simultaneously displayed colors. CONSTITUTION: A CPU writes '0' to luminance data parts corresponding to a head and an end position of a video capture image display range and display mode and attribute data to color data parts of a video capture RAM 22 for each line. When the state is detected by a Y=0 & C≠0 detection circuit 24, the color data are set to an attribute set register 26. When a black/white level mode is set based on the set content, a C=0 circuit 28 sets C data to '0' and then the resulting data are converted into a video signal for CRT display. A multiplexer 34 provides selectively an output of a converted video signal or a video signal from a graphic memory according to the display mode in the set content in the register 26.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display control device that captures a restrained image or a moving image in a personal computer, synthesizes it with other data such as text, and displays it. Regarding attribute specification such as black and white / color.

[0002]

2. Description of the Related Art In recent years, personal computers have come to be able to handle not only text and graphics but also so-called multimedia information such as stopped images and moving images, voice and music.

In such a personal computer, in order to realize a video capture for capturing a stopped image or a moving image, generally, a video capture board is connected to a CRT board of the main body.
That is, as shown in FIG. 2, a desired portion of the data of the video capture memory 100, on which the data converted from the NTSC signal is written, which is registered on the video capture board, is cut out, and the text and the text recorded on the CRT board are recorded. The display data such as graphics is combined with the data in the graphic memory 102 written by the CPU and displayed on the display screen 104 of the CRT.

In this case, the video capture memory 100
The designation of the display area or the designation of its attributes (monochrome / color, negative / positive, etc.) is performed by one of the following two methods.

That is, the first technique is to prepare a memory for attributes in addition to the video capture memory 100 on the video capture board, and to designate the attribute for each pixel of the video capture memory 100 there. .

The second method is the video capture memory 1
Some bits of the color information of each pixel in 00 are assigned to the attribute, and the attribute is designated for each pixel.

[0007]

However, the above-mentioned first method has a problem in that a memory dedicated to an attribute must be separately prepared, the circuit becomes complicated, and the cost is increased.

On the other hand, the second method has an advantage that it can be realized by a simple modification of the circuit, but color information is deleted by 1 bit each time 1 bit is allocated for attribute designation. Since the number of simultaneous display colors is reduced to half each time 1 bit is removed, there is a problem that the function becomes insufficient. For example, while 24 bits can display 16.7 million colors, 22 bits in which 2 bits are allocated for attribute designation results in 4.19 million colors.

An object of the present invention is to realize video capture without adding a memory for an attribute and reducing the simultaneous display color.

[0010]

The means of the present invention are as follows. The fetching means fetches the NTSC signal as digitized luminance and color data, and includes, for example, an A / D converter and a Y / C separation circuit. The video capture memory means stores the luminance and color data captured by the capturing means. The data writing unit sets the luminance data corresponding to the head position of the range where the captured image is to be displayed to 0 among the luminance and color data of each line stored in the video capture memory unit by the CPU, for example. The predetermined bit of the color data is set to data indicating the head position, the attribute data is written to the remaining bits, and the brightness data corresponding to the end position of the range where the captured image is to be displayed is set to 0. Data indicating the end position is written in a predetermined bit. The detecting means detects that the luminance data is 0 and the color data is not 0 in the data read from the video capture memory means. The attribute data holding means is a register that holds the color data as attribute data when the detecting means detects that the luminance data is 0 and the color data is not 0. The data processing means processes the data read from the video capture memory means (for example, sets the color data to 0) according to the attribute data held in the attribute data holding means, and converts the processed data into a video signal. For example, it includes a C = 0 circuit, a Y / C → RGB conversion circuit, and a D / A converter. The selecting means receives a video signal input from an external circuit such as a graphic memory on a CRT board and a video signal from the data processing means, and selects the predetermined one of the data held in the attribute data holding means. It is a multiplexer that selectively outputs one of the video signals according to data corresponding to bits.

[0011]

The operation of the means of the present invention is as follows. The NTSC signal to be captured is captured by the capturing means as digitized luminance and color data and stored in the video capture memory means. Further, the data writing means sets the luminance data corresponding to the head position of the range where the captured image is to be displayed among the luminance and color data of each line stored in the video capture memory means to 0, and the color data. Is set to the data indicating the head position, the attribute data is written to the remaining bits, the brightness data corresponding to the end position of the range where the captured image is to be displayed is set to 0, and the predetermined bit of the color data is set. Write the data indicating the end position to. When the data is read from the video capture memory means and output to the CRT, if the detecting means detects that the luminance data is 0 and the color data is not 0 in the read data, the color data is read. The attribute data is held in the attribute data holding means. Then, the data processing unit processes the data read from the video capture memory unit according to the attribute data held in the attribute data holding unit, and sets the color data to 0 if the monochrome mode is set as the attribute data. Then, the processed data is converted into a video signal. The selection means receives a video signal input from an external circuit and a video signal from the data processing means, and according to the data corresponding to the predetermined bit of the data held in the attribute data holding means,
One of the video signals is selectively output. That is, the video signal from the data processing means is output from the data indicating the start position of the predetermined bit to the input of the data indicating the end position, and at other times, the video signal from the external circuit is output. Output.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIG. In video capture, the memory configuration is generally Y: U: V = 2: 1: 1, and this system will be described in this embodiment as well (where U = R). -Y, V = BY)).

FIG. 1A is a diagram showing a configuration of a video capture board connected to a CRT board of a personal computer as an embodiment of the present invention. In the figure, reference numeral 10 is an input of an NTSC signal. Video input terminal. 12 is an A / D converter for converting the input NTSC signal into a digital signal, and 14 is a Y for separating and converting this digital signal into a luminance (Y) signal and a color (C) signal (actually, U / V signal). / C separation circuit. 16 is Y = for detecting that the Y signal is 0.
The 0 detection circuit, 18 normally passes the C signal from the Y / C separation circuit 14 and sets the C signal to 0 when the Y = 0 detection circuit 16 detects that the Y signal is 0. C = 0 circuit. Reference numeral 20 is a video capture of the Y signal from the Y / C separation circuit 14 and the C signal from the C = 0 circuit 18, and the data from the CPU, in response to an R / W request from a CPU (not shown). A multiplexer (MPX) for writing in the memory (RAM) 22. Here, in the video capture RAM 22, as shown in (B) of FIG.
Data is stored as 8-bit data.

Reference numeral 24 is a Y = 0 & C ≠ 0 detection circuit for detecting that the Y data is 0 and the C data is not 0, and 26 is the Y = 0 & C ≠ 0 detection circuit and the Y data is 0. It is an attribute set register in which the content of the C data is set when it is detected that the C data is present and the C data is not 0.

Reference numeral 28 normally passes through the Y data and C data read from the video capture RAM 22, but when the monochrome / color mode indicates a monochrome mode among the attribute contents set in the attribute set register 26. Sets only C data to 0 C =
It is 0 circuit. Reference numeral 30 denotes Y / C → RGB for converting Y / C data which is output data of the C = 0 circuit 28 into an RGB signal.
A conversion circuit 32 is a D / A converter for converting the converted RGB signal into an analog signal.

Numeral 34 indicates the D / D according to the switching signal from the attribute set register 26.
A video (VIDEO) signal from the A converter 32,
VI from graphic memory on CRT boat not shown
A multiplexer (MPX) for selectively supplying the DEO signal to the CRT.

Next, the operation of the video capture board having such a configuration will be described.

NTS input from the video input terminal 10
The C signal is converted from an analog signal to a digital signal by the A / D converter 12, and Y = 8 by the Y / C separation circuit 14.
Bits, C (U / V) = 8 bits, are converted and stored in the video capture RAM 22 via the multiplexer 20 as shown in FIG. At this time, Y = 0
When Y = 0 (pure black) is detected by the detection circuit 16, the color information is completely set to 0 by the C = 0 circuit 18 and written in the video capture RAM 22.

When it is desired to apply an attribute from the CPU, Y = 0 and its attribute mode are written to the beginning of the line via the multiplexer 20, and Y = to the end of the line. Write 0 and the end bit.

For example, as shown in FIG. 1C, when the video capture image display range 36 is displayed in black and white mode, the line 38 displays the data in the video capture RAM 22 corresponding to the beginning position, that is, the position A. , Y = 0, C = display mode data O, as shown in FIG.
N (10 indicating display start), data for turning on / off the black and white mode is written, and data corresponding to the end position, that is, the position of B is set to Y as shown in (E) of FIG.
= 0, C = Display mode data OFF (“01” indicating the display end) is written. By instructing this for each line, the display range 36 and the attributes are fixed.

Such a bit is a video capture RA
When written to M22, this video capture RAM
When data is read from C22 at CRT timing,
When the Y = 0 & C ≠ 0 detection circuit 24 detects that the Y data is 0 and the C data is not 0, the content of the C data is set in the attribute set register 26. The content set in the attribute set register 26 is that each bit is an instruction bit of the attribute, and in the example of FIG. 1D, the bit indicating the monochrome / color mode is set to the monochrome mode. In this case, the C = 0 circuit 28 masks the C data to make it black and white. Further, since the bit indicating the display mode is set to display start, the multiplexer 34 is switched to output the video signal from the video capture. As a result, the output data of the C = 0 circuit 28 becomes
Y / C → RGB conversion circuit 30 and D / A converter 32
Is converted into a video signal by the multiplexer 34 and supplied from the multiplexer 34 to a CRT (not shown).

Then, C data as shown in FIG. 1E is set in the attribute set register 26,
When the display mode reaches the display end, the multiplexer 34
Are switched to output the video signal from the graphic memory on the CRT board.

As described above, the unit of attribute is
Paying attention to two points, it is common that a continuous line unit is sufficient instead of pixels, and that the attribute boundary is outlined in black. No brightness (Y
= 0, pure black) and the type of attribute is performed by using color information (U or V) data, without adding a memory for the attribute, and
Video capture can be realized without reducing the simultaneous display colors.

Although not particularly shown, since the C data has 8 bits, the remaining bits other than the bits for the display mode and the black / white / color mode are used, for example, negative / positive. Other attributes are possible as well.

The present invention also provides the Y data 8 as described above.
Of course, the bit and C data are not limited to 8 bits.

[0026]

According to the present invention, various attributes can be set freely for each line by a simple method, so that the video can be displayed without adding a memory for the attribute and reducing the simultaneous display color. Capturing can be realized.

[Brief description of drawings]

FIG. 1A is a block configuration diagram of an embodiment, FIG. 1B is a diagram showing a storage structure of a video capture RAM, FIG. 1C is a diagram showing a video capture image display range, and FIGS. ) Are diagrams showing actual data structures in the case of attribute start and end, respectively.

FIG. 2 is a diagram for explaining video capture.

[Explanation of symbols]

10 ... Video input terminal, 12 ... A / D converter,
14 ... Y / C separation circuit, 16 ... Y = 0 detection circuit, 1
8, 28 ... C = 0 circuit, 20, 34 ... Multiplexer (MPX), 22 ... Video capture memory (RA
M), 24 ... Y = 0 & C ≠ 0 detection circuit, 26 ... Attribute set register, 30 ... Y / C → RGB conversion circuit, 32 ... D / A converter, 36 ... Video capture image display range, 38 ... Line.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H04N 5/66 B 9/12 Z

Claims (1)

[Claims] 1. A capturing means for capturing an NTSC signal as digitized luminance and color data, a video capture memory means for storing the luminance and color data captured by the capturing means, and a video capture memory means for storing the luminance and color data. Of the brightness and color data of each line, the brightness data corresponding to the start position of the range where the captured image is to be displayed is set to 0, and a predetermined bit of color data is set to the data indicating the start position, and the remaining bits are attribute Write data,
In addition, the brightness data corresponding to the end position of the range where the captured image is to be displayed is set to 0, and the data writing unit that writes the data indicating the end position in the predetermined bit of the color data, and read from the video capture memory unit Detecting means for detecting that the luminance data is 0 and the color data is not 0, and when the detecting means detects that the luminance data is 0 and the color data is not 0, the color Attribute data holding means for holding data as attribute data, and data for processing the data read from the video capture memory means according to the attribute data held in the attribute data holding means, and converting the processed data into a video signal Input from processing means and external circuit Received video signal and the video signal from the data processing means, and selectively selects one of the video signals according to the data corresponding to the predetermined bit of the data held in the attribute data holding means. A display control device comprising: a selection unit for outputting.