JPH08153763A - Method for measuring semiconductor device - Google Patents

Method for measuring semiconductor device

Info

Publication number
JPH08153763A
JPH08153763A JP6296106A JP29610694A JPH08153763A JP H08153763 A JPH08153763 A JP H08153763A JP 6296106 A JP6296106 A JP 6296106A JP 29610694 A JP29610694 A JP 29610694A JP H08153763 A JPH08153763 A JP H08153763A
Authority
JP
Japan
Prior art keywords
electrode
voltage
semiconductor device
measurement
measuring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6296106A
Other languages
Japanese (ja)
Inventor
Kazuhiko Yoshida
和彦 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP6296106A priority Critical patent/JPH08153763A/en
Publication of JPH08153763A publication Critical patent/JPH08153763A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To accurately measure the voltage between the drain electrode and source electrode of a vertical semiconductor device, such as the MOSFET, etc., in a semiconductor wafer when a large current is made to flow to the MOSFET by providing a measurement electrode on the surface of an n<-1> -layer so as to measure the potential at the drain electrode. CONSTITUTION: In a MOSFET, a measurement element 12 is formed on the surface of an N<+> -area 11 provided so that the area can make ohmic contact with an n<-> -layer 4 and drain-side and source-side measurement probes 17 and 15 are respectively connected with the electrode 12 and a source electrode 9. A conducting probe 13 and stage 14 are electrically connected to each other by press-contacting the probe 13 with a semiconductor wafer. An electric current is made to flow between the probe 13 and stage 14 and the voltage across the drain and source electrodes of the MOSFET is detected with the probes 17 and 15.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、パワーMOSFE
T、IGBT、パワートランジスタ、サイリスタおよび
ダイオードなどの縦形半導体装置のオン電圧などの電気
的特性を半導体ウエハの状態で測定する半導体装置の測
定方法に関する。
This invention relates to a power MOSFE.
The present invention relates to a semiconductor device measuring method for measuring electrical characteristics such as on-voltage of a vertical semiconductor device such as a T, an IGBT, a power transistor, a thyristor, and a diode in a semiconductor wafer state.

【0002】[0002]

【従来の技術】図4は半導体ウエハ内の半導体装置のオ
ン電圧などの電気的特性を測定する場合の従来の測定方
法の例をMOSFETを使って説明する図である。n+
層3上にn- 層4が形成され、n- 層4の表面層にpウ
エル領域5とこのpウエル領域5内にn+ 領域6が形成
され、n+ 領域6表面にはソース電極9が、pウエル領
域5の表面にはゲート絶縁膜7を介してゲート電極8
が、n+ 層3表面にはドレイン電極10が形成され、縦
形MOSFETを構成する。主電流I0 を通電するた
め、ソース電極9には通電プローブ13、ドレイン電極
10にはステージ14が接触し、通電プローブ13とス
テージ14とは電源18に接続している。ここでステー
ジ14の外径は半導体ウエハ1(図2(a)後述)とほ
ぼ同径であるが、半導体ウエハ1を吸着するための吸着
溝を設けており、また半導体ウエハ1が歪んでいるた
め、半導体ウエハ1との接触は局部的であり、この接触
部を模式的に示している。また電圧を測定するため、ソ
ース電極9にはソース側測定プローブ15、ドレイン電
極10にはドレイン側測定プローブ16が接続し、これ
らのプローブは電圧計19に接続している。また通電プ
ローブ13、ステージ14、ソース側測定プローブ15
およびドレイン側測定プローブ16は半導体ウエハと加
圧接触により電気的に接続している。主電流I0 を流す
通電プローブ13およびステージ14と別に測定用プロ
ーブを設けるのは主電流I0 による接触抵抗等の電圧降
下V0 を測定から除去するためである。主電流I0 はド
レイン電極10からソース電極9に向かって流れる。
2. Description of the Related Art FIG. 4 is a diagram for explaining an example of a conventional measuring method for measuring an electrical characteristic such as an on-voltage of a semiconductor device in a semiconductor wafer by using a MOSFET. n +
An n layer 4 is formed on the layer 3, a p well region 5 and an n + region 6 are formed in the surface layer of the n layer 4, and a source electrode 9 is formed on the surface of the n + region 6. However, the gate electrode 8 is formed on the surface of the p-well region 5 via the gate insulating film 7.
However, the drain electrode 10 is formed on the surface of the n + layer 3 to form a vertical MOSFET. In order to pass the main current I 0 , the source electrode 9 is in contact with the conducting probe 13 and the drain electrode 10 is in contact with the stage 14, and the conducting probe 13 and the stage 14 are connected to the power supply 18. Here, the outer diameter of the stage 14 is substantially the same as that of the semiconductor wafer 1 (described later in FIG. 2A), but a suction groove for sucking the semiconductor wafer 1 is provided, and the semiconductor wafer 1 is distorted. Therefore, the contact with the semiconductor wafer 1 is local, and this contact portion is schematically shown. Further, in order to measure the voltage, a source side measurement probe 15 is connected to the source electrode 9, a drain side measurement probe 16 is connected to the drain electrode 10, and these probes are connected to a voltmeter 19. Further, the energization probe 13, the stage 14, the source side measurement probe 15
The drain side measurement probe 16 is electrically connected to the semiconductor wafer by pressure contact. In order to eliminate the voltage drop V 0 which such contact resistance due to the main current I 0 is to provide a separate measuring probe energized probe 13 and the stage 14 flow the main current I 0 from the measurement. The main current I 0 flows from the drain electrode 10 toward the source electrode 9.

【0003】[0003]

【発明が解決しようとする課題】しかし主電流I0 が矢
印の方向にドレイン電極10からソース電極9に向かっ
て流れるとき、ソース領域6を形成するn+ 領域6直下
のドレイン電極10から離れたドレイン電極10にステ
ージ14およびドレイン側測定プローブ16が通常接触
するために、主電流I0 が極めて薄い金属膜でできたド
レイン電極10を矢印のように横方向に流れ電位降下V
0 を生じ、この電位降下V0 を含めてソース電極9とド
レイン電極10間の電圧を測定するため、精度よく測れ
ない。
However, when the main current I 0 flows from the drain electrode 10 toward the source electrode 9 in the direction of the arrow, it separates from the drain electrode 10 immediately below the n + region 6 forming the source region 6. Since the stage 14 and the drain side measurement probe 16 normally contact the drain electrode 10, the main current I 0 flows laterally in the drain electrode 10 made of an extremely thin metal film as shown by the arrow V.
Since 0 occurs, and the voltage between the source electrode 9 and the drain electrode 10 is measured including this potential drop V 0 , it cannot be measured accurately.

【0004】つぎに、このことを詳細に説明する。主電
流を例えばMOSFETに通電した場合の電位分布を点
線で図3に示す。主電流I0 はステージと接触した箇所
からドレイン電極10に流入し、ドレイン電極10内を
矢印のように横方向に流れてからn+ 層3に入る。ドレ
イン電極10は数μm程度の金属膜で形成されるため、
横方向の抵抗は大きく、そのためこの横方向にながれる
数Aから100A程度の主電流I0 による電圧降下V0
がドレイン電極10とソース電極9の電圧の測定に誤差
を生じる元になっている。つまり従来のようにドレイン
電極10のドレイン側測定プローブ16を接触させてソ
ース電極とドレイン電極間の電圧を測定すると、この電
圧降下V0 を加算することになり、しかもこの電圧降下
0 は半導体ウエハ内の半導体装置毎で異なり、精度の
よい電圧を測定できない。
Next, this will be described in detail. The potential distribution when the main current is applied to the MOSFET, for example, is shown by the dotted line in FIG. The main current I 0 flows into the drain electrode 10 from a position in contact with the stage, flows laterally in the drain electrode 10 as indicated by an arrow, and then enters the n + layer 3. Since the drain electrode 10 is formed of a metal film having a thickness of several μm,
Since the resistance in the lateral direction is large, the voltage drop V 0 due to the main current I 0 of several A to 100 A running in the lateral direction.
Is a source of error in the measurement of the voltages of the drain electrode 10 and the source electrode 9. That is, when the voltage between the source electrode and the drain electrode is measured by bringing the drain side measuring probe 16 of the drain electrode 10 into contact as in the conventional case, this voltage drop V 0 is added, and this voltage drop V 0 is semiconductor. It is different for each semiconductor device in the wafer, and accurate voltage cannot be measured.

【0005】この発明は、前記欠点を除去し、ソース電
極とドレイン電極間の電圧を精度よく測定することがで
きる半導体装置の測定方法を提供することにある。
An object of the present invention is to provide a method for measuring a semiconductor device which eliminates the above-mentioned drawbacks and can measure the voltage between the source electrode and the drain electrode with high accuracy.

【0006】[0006]

【課題を解決するための手段】この発明は前記の目的を
達成するために、半導体ウエハの一主面に、主電流を通
電する一方の第一電極を有し、他主面に、他方の第二電
極を有する複数個の縦形半導体装置が並設されている半
導体ウエハの各半導体装置に主電流を通電した時の第一
電極と第二電極間の電圧を測定する方法において、一主
面に第二電極の電位を測定する測定電極を設けて、第一
電極と該測定電極とで第一電極と第二電極間の電圧に相
当する電圧を測定する。またこの測定電極を半導体装置
の第一電極近傍に設けるか、又は半導体装置を形成しな
い領域上に形成して、第一電極と該測定電極とで第一電
極と第二電極間の電圧に相当する電圧を測定すると効果
的である。さらにこの測定電極を半導体装置を形成しな
いスクライブライン上もしくは半導体ウエハの外周部に
設けて、第一電極と該測定電極とで第一電極と第二電極
間の電圧に相当する電圧を測定するとよい。
In order to achieve the above-mentioned object, the present invention has one first electrode for passing a main current on one main surface of a semiconductor wafer and the other main surface for the other. A method for measuring a voltage between a first electrode and a second electrode when a main current is applied to each semiconductor device of a semiconductor wafer in which a plurality of vertical semiconductor devices having a second electrode are arranged in parallel, A measurement electrode for measuring the potential of the second electrode is provided on the first electrode, and the voltage corresponding to the voltage between the first electrode and the second electrode is measured by the first electrode and the measurement electrode. Further, this measurement electrode is provided in the vicinity of the first electrode of the semiconductor device, or is formed on a region where the semiconductor device is not formed, and the voltage between the first electrode and the second electrode is equivalent to the voltage between the first electrode and the measurement electrode. It is effective to measure the applied voltage. Further, this measurement electrode may be provided on a scribe line not forming a semiconductor device or on the outer peripheral portion of a semiconductor wafer, and a voltage corresponding to the voltage between the first electrode and the second electrode may be measured by the first electrode and the measurement electrode. .

【0007】[0007]

【作用】半導体装置に主電流I0 が通電したときの電位
分布は図3のようになる。この発明のようにn- 層の表
面にn+ 領域11を介して測定電極12を設け、ドレイ
ン側測定プローブ17とソース側測定プローブ15を介
して電圧計でドレイン電極10とソース電極9間の電圧
を測定すると、この測定電極12の電位はn+ 層3とド
レイン電極10の境界での電位VD となり、ドレイン電
極10を横方向に流れる電流による電位降下V0 の影響
を除去できる。そのため測定電極12とソース電極間9
の電圧を主電流I0 が大きい場合でも精度よく測定でき
る。もし従来例のように、ドレイン電極10に接触する
ドレイン側測定プローブ16とソース側測定プローブ1
5で電圧を測定すると電圧降下V0 が加わり精度が悪
い。
The potential distribution when the main current I 0 is applied to the semiconductor device is as shown in FIG. As in the present invention, the measuring electrode 12 is provided on the surface of the n layer via the n + region 11, and the drain side measuring probe 17 and the source side measuring probe 15 are used to connect the drain electrode 10 and the source electrode 9 with a voltmeter. When the voltage is measured, the potential of the measuring electrode 12 becomes the potential VD at the boundary between the n + layer 3 and the drain electrode 10, and the influence of the potential drop V 0 due to the current flowing laterally through the drain electrode 10 can be removed. Therefore, between the measurement electrode 12 and the source electrode 9
Can be accurately measured even when the main current I 0 is large. If the drain side measurement probe 16 and the source side measurement probe 1 are in contact with the drain electrode 10, as in the conventional example.
When the voltage is measured at 5, the voltage drop V 0 is added and the accuracy is poor.

【0008】[0008]

【実施例】図1は測定電極を設けたMOSFETの断面
図を示す。図4の従来例と符号は同一であり、ここでは
従来例と異なる点について説明する。測定電極12はn
+層11の表面に形成され、測定電極12にドレイン側
測定プローブ17が接触している。また測定電極12と
- 層4がオーミック接触するようにn+ 領域11を形
成している。その他の箇所は図4と同一である。このド
レイン側測定プローブ17とソース電極9に接続するソ
ース側測定プローブ15とは電圧計19に接続する。ま
た従来例と同様に、通電プローブ13、ステージ14、
ソース側測定プローブ15およびドレイン側測定プロー
ブ17は半導体ウエハと加圧接触により電気的に接続し
ている。この測定方法により、数Aから100A程度ま
で主電流を通電したときのドレイン電極10内を横方向
に流れる電流による電圧降下V 0 を測定から除去でき、
従って、半導体ウエハ1内のMOSFETのドレイン電
極10とソース電極9間の電圧を高精度で測定でき、正
確なMOSFETのオン抵抗値を求めることができる。
EXAMPLE FIG. 1 is a cross section of a MOSFET provided with a measuring electrode.
The figure is shown. The reference numerals are the same as those in the conventional example of FIG.
Differences from the conventional example will be described. The measurement electrode 12 is n
+It is formed on the surface of the layer 11 and is connected to the measurement electrode 12 on the drain side.
The measuring probe 17 is in contact. In addition, with the measurement electrode 12
n-N so that layer 4 is in ohmic contact+Shape region 11
Is made. Other parts are the same as those in FIG. This
The rain side measuring probe 17 and the source electrode 9 are connected to each other.
The source side measurement probe 15 is connected to a voltmeter 19. Well
Similarly to the conventional example, the energization probe 13, the stage 14,
Source side measurement probe 15 and drain side measurement probe
The bump 17 is electrically connected to the semiconductor wafer by pressure contact.
ing. Depending on this measuring method, from several A to 100 A
Lateral direction inside the drain electrode 10 when main current is applied
Voltage drop V due to current flowing through 0Can be removed from the measurement,
Therefore, the drain voltage of the MOSFET in the semiconductor wafer 1 is
The voltage between the pole 10 and the source electrode 9 can be measured with high accuracy, and
An accurate on-resistance value of MOSFET can be obtained.

【0009】図2は一実施例の測定電極を設ける位置を
示す平面図である。同図(a)は半導体ウエハ1にMO
SFETなどの半導体装置2が並設された平面図を示
し、測定電極12は半導体装置2内、スクライブライン
20上および半導体ウエハ1の半導体装置2が形成され
ていない外周部21に配置されている。同図(b)は半
導体装置2を拡大した図で測定電極12はソース電極9
の近傍に配置されている。またゲート電極パッド22は
ゲート電極8(図1)と接続する集電電極であり、ボン
ディングワイヤーと結ばれる。同図(c)は同図(a)
の円内の拡大図でスクライブライン20上に測定電極1
2を配置した図である。
FIG. 2 is a plan view showing the positions where the measuring electrodes of one embodiment are provided. FIG. 1A shows the MO on the semiconductor wafer 1.
A plan view showing the semiconductor devices 2 such as SFETs arranged in parallel is shown, and the measurement electrodes 12 are arranged in the semiconductor device 2, on the scribe line 20 and on the outer peripheral portion 21 of the semiconductor wafer 1 where the semiconductor device 2 is not formed. . FIG. 2B is an enlarged view of the semiconductor device 2, and the measurement electrode 12 is the source electrode 9
It is located near. The gate electrode pad 22 is a current collecting electrode connected to the gate electrode 8 (FIG. 1) and is connected to a bonding wire. The same figure (c) is the same figure (a)
The measurement electrode 1 on the scribe line 20 is an enlarged view in the circle
It is the figure which arranged 2.

【0010】また実施例ではMOSFETで説明した
が、IGBT、パワートランジスタ、サイリスタおよび
ダイオードなどの縦形半導体装置が半導体ウエハに配置
されている場合の測定に同様の方法が適用できる。
Although the MOSFET has been described in the embodiment, the same method can be applied to the measurement when the vertical semiconductor device such as the IGBT, the power transistor, the thyristor and the diode is arranged on the semiconductor wafer.

【0011】[0011]

【発明の効果】この発明によると、半導体ウエハに配置
された縦形MOSFETにおいて、ドレイン電極の電位
を測定する測定電極をソース電極のある半導体ウエハ表
面上に設けることで、大きな主電流を通電したときで
も、ドレイン電極とソース電極間の電圧を精度よく測定
できる。またMOSFET以外にIGBT、パワートラ
ンジスタ、サイリスタおよびダイオードなどの縦形半導
体装置についても同様の測定方法で精度よく主電極間
(例えばトランジスタではコレクタ電極−エミッタ電極
間、サイリスタではアノード電極−カソード電極間な
ど)の電圧を測定できる。
According to the present invention, in a vertical MOSFET arranged on a semiconductor wafer, a measuring electrode for measuring the potential of the drain electrode is provided on the surface of the semiconductor wafer having the source electrode, so that a large main current is applied. However, the voltage between the drain electrode and the source electrode can be accurately measured. In addition to MOSFETs, vertical semiconductor devices such as IGBTs, power transistors, thyristors, and diodes are also accurately measured by the same measurement method between main electrodes (for example, between a collector electrode and an emitter electrode in a transistor, between an anode electrode and a cathode electrode in a thyristor). The voltage of can be measured.

【図面の簡単な説明】[Brief description of drawings]

【図1】測定電極を設けたMOSFETの断面図FIG. 1 is a sectional view of a MOSFET provided with a measurement electrode.

【図2】一実施例の平面図で、同図(a)は半導体ウエ
ハの平面図、同図(b)は半導体装置の拡大図、同図
(c)はスクライブラインの拡大図
2A and 2B are plan views of an embodiment, FIG. 2A is a plan view of a semiconductor wafer, FIG. 2B is an enlarged view of a semiconductor device, and FIG. 2C is an enlarged view of a scribe line.

【図3】電位分布を示す図FIG. 3 is a diagram showing a potential distribution

【図4】従来例を示す断面図FIG. 4 is a sectional view showing a conventional example.

【符号の説明】[Explanation of symbols]

1 半導体ウエハ 2 半導体装置 3 n+ 層 4 n- 層 5 pウエル領域 6 ソース領域(n+ ) 7 ゲート絶縁膜 8 ゲート電極 9 ソース電極 10 ドレイン電極 11 n+ 領域 12 測定電極 13 通電プローブ 14 ステージ 15 ソース側測定プローブ 16 ドレイン側測定プローブ 17 ドレイン側測定プローブ 18 電源 19 電圧計 20 スクライブライン 21 外周部 22 ゲート電極パッド I0 主電流 V0 電圧降下1 semiconductor wafer 2 semiconductor device 3 n + layer 4 n layer 5 p well region 6 source region (n + ) 7 gate insulating film 8 gate electrode 9 source electrode 10 drain electrode 11 n + region 12 measurement electrode 13 current probe 14 stage 15 Source-side measurement probe 16 Drain-side measurement probe 17 Drain-side measurement probe 18 Power supply 19 Voltmeter 20 Scribe line 21 Peripheral part 22 Gate electrode pad I 0 Main current V 0 Voltage drop

フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/336 Continuation of the front page (51) Int.Cl. 6 Identification number Office reference number FI technical display location H01L 21/336

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】半導体ウエハの一主面に、主電流を通電す
る一方の第一電極を有し、他主面に、他方の第二電極を
有する複数個の縦形半導体装置が並設されている半導体
ウエハの各半導体装置に主電流を通電した時の第一電極
と第二電極間の電圧を測定する方法において、一主面に
第二電極の電位を測定する測定電極を設けて、第一電極
と該測定電極とで第一電極と第二電極間の電圧に相当す
る電圧を測定することを特徴とする半導体装置の測定方
法。
1. A plurality of vertical semiconductor devices having one first electrode for passing a main current on one main surface of a semiconductor wafer and having the other second electrode on the other main surface are arranged in parallel. In the method of measuring the voltage between the first electrode and the second electrode when a main current is applied to each semiconductor device of a semiconductor wafer, a measurement electrode for measuring the potential of the second electrode is provided on one main surface, and A method for measuring a semiconductor device, wherein a voltage corresponding to a voltage between a first electrode and a second electrode is measured with one electrode and the measurement electrode.
【請求項2】測定電極を半導体装置の第一電極近傍に設
けて、第一電極と第二電極間の電圧に相当する電圧を測
定することを特徴とする請求項1記載の半導体装置の測
定方法。
2. The measurement of a semiconductor device according to claim 1, wherein a measurement electrode is provided in the vicinity of the first electrode of the semiconductor device, and a voltage corresponding to the voltage between the first electrode and the second electrode is measured. Method.
【請求項3】測定電極を半導体装置を形成しない領域上
に形成して、第一電極と該測定電極とで第一電極と第二
電極間の電圧に相当する電圧を測定することを特徴とす
る請求項1記載の半導体装置の測定方法。
3. A measuring electrode is formed on a region where a semiconductor device is not formed, and a voltage corresponding to a voltage between the first electrode and the second electrode is measured by the first electrode and the measuring electrode. The method for measuring a semiconductor device according to claim 1.
【請求項4】測定電極を半導体装置を形成しないスクラ
イブライン上もしくは半導体ウエハの外周部に設けて、
第一電極と該測定電極とで第一電極と第二電極間の電圧
に相当する電圧を測定することを特徴とする請求項1記
載の半導体装置の測定方法。
4. A measuring electrode is provided on a scribe line not forming a semiconductor device or on an outer peripheral portion of a semiconductor wafer,
The method for measuring a semiconductor device according to claim 1, wherein a voltage corresponding to a voltage between the first electrode and the second electrode is measured by the first electrode and the measurement electrode.
JP6296106A 1994-11-30 1994-11-30 Method for measuring semiconductor device Pending JPH08153763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6296106A JPH08153763A (en) 1994-11-30 1994-11-30 Method for measuring semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6296106A JPH08153763A (en) 1994-11-30 1994-11-30 Method for measuring semiconductor device

Publications (1)

Publication Number Publication Date
JPH08153763A true JPH08153763A (en) 1996-06-11

Family

ID=17829219

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JPH08153763A (en)

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US6881597B2 (en) 2001-01-22 2005-04-19 Renesas Technology Corp. Method of manufacturing a semiconductor device to provide a plurality of test element groups (TEGs) in a scribe region
JP2011187880A (en) * 2010-03-11 2011-09-22 Mitsubishi Electric Corp Semiconductor device, and measurement method
DE102011077778A1 (en) 2010-07-15 2012-01-19 Mitsubishi Electric Corp. A method of measuring the characteristics of a semiconductor element and a method of manufacturing a semiconductor device
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6881597B2 (en) 2001-01-22 2005-04-19 Renesas Technology Corp. Method of manufacturing a semiconductor device to provide a plurality of test element groups (TEGs) in a scribe region
JP2011187880A (en) * 2010-03-11 2011-09-22 Mitsubishi Electric Corp Semiconductor device, and measurement method
DE102011077778A1 (en) 2010-07-15 2012-01-19 Mitsubishi Electric Corp. A method of measuring the characteristics of a semiconductor element and a method of manufacturing a semiconductor device
US8519733B2 (en) 2010-07-15 2013-08-27 Mitsubishi Electric Corporation Method of measuring characteristics of a semiconductor element and method of manufacturing a semiconductor device
DE102011077778B4 (en) * 2010-07-15 2017-08-10 Mitsubishi Electric Corp. A method of measuring the characteristics of a semiconductor element and a method of manufacturing a semiconductor device
CN105137318A (en) * 2015-09-21 2015-12-09 中国科学院电工研究所 Crimping type electric power semiconductor module test tooling
CN105137318B (en) * 2015-09-21 2018-01-09 中国科学院电工研究所 A kind of compression joint type power semiconductor module test fixture
CN108037432A (en) * 2017-12-01 2018-05-15 北京华峰测控技术有限公司 A kind of measuring method and device of wafer tube core on-state voltage drop

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