JPH08149419A - Still picture transmitting device - Google Patents

Abstract

PURPOSE: To prevent the change of display caused between the transmission and reception modes by the conversion of data that is carried out by an operation despite the change of quantity of data included in a single line and to be transmitted and received by a still picture transmitting device. CONSTITUTION: A memory block 6 holds the received image data, and a memory block 10 is used for display of images. An arithmetic circuit block 9 calculates the rate between the quantity of data received in the video period of a horizontal period and the quantity of data received for display in the video period of a horizontal period so that true received image data are equal to the quantity of data used for display. When the difference is caused between the transmitting and receiving sides in the quantity of data on the images received in the video period of a horizontal period despite use of the same image data compressing method, the coincidence is secured between the quantity of image data received at the receiving side and the quantity of image data received for display at the receiving side. Thus it is possible to evade such a case where the received images are horizontally expanded or contracted or a level difference is caused between the images due to the unmatch caused between the first horizontal parts of both images and therefore the images cannot be displayed as original.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a still picture transmission apparatus, and more particularly to a still picture transmission apparatus which digitizes an image, compresses the image data, and transmits / receives it through a communication line.

[0002]

2. Description of the Related Art Conventionally, a still image transmission apparatus which digitizes an image, compresses the image data, and transmits / receives it through a communication line sends only a necessary portion of data in order to reduce the amount of data as much as possible. If so, the data of only the video portion of the signal is compressed, and the compressed data is transmitted / received. At this time, for both transmission and reception, the data amount of the image data in one horizontal period of the image data, that is, the number of dots in the image portion and the number of lines in one screen in one horizontal period are matched, and
The same compression method was used.

FIG. 11 is a block diagram of a conventional still image transmission apparatus, in which 41 is a line interface block.
42 is a CPU block, 43 is a memory, 44 is a CPU
(Central processing unit), 45 is a compression / expansion block, 46 is a memory block, 47 is a memory, 48 is a memory control circuit, 49 is a video input / output block, 50 is a D / A conversion output processing circuit, and 51 is a display synchronization signal. A generation circuit, 52 is an input processing A / D conversion circuit, 53 is a display device, and 54 is a camera.

Since the amount of data in the image period of one horizontal period of the image to be transmitted and received is determined, the memory is configured to handle only that amount of data (for example, the amount of data in the image period of one horizontal period). Is 384 dots and one screen is 24
If the number of lines is 0, the memory area for storing an image is fixed even if the memory used has a 512 × 512 area as shown in FIG. Conventionally, first
On the transmitting side, the video signal input from the camera is sent to the memory block 46 which is converted into digital data by the input processing / A / D conversion circuit 53 of the video input / output block 49. In the memory block 46, only the data amount of the determined video period of one horizontal period is stored in the memory 47, and when one screen is stored, the data is passed to the compression / expansion block 45.
The compression / expansion block 45 compresses the data and passes the compressed data to the CPU block 42. The CPU block 4
The second CPU 44 stores it once in the memory 43,
Error correction data is added and passed to the line interface block 41. The line interface block 4
In 1, the data from the CPU 44 is placed on a public line and transmitted.

On the receiving side, the line interface block 41 receives data from the public line and sends it to the CPU.
Pass to block 42. The CPU 44 once stores the data in the memory 43, obtains error correction data, and passes the data to the compression / expansion block 45. The compression / expansion block 45
Then, the compressed data from the CPU 44 is decompressed and passed to the memory block 46. In the memory block 46, the decompressed data is stored in the memory 47 once, and the data is transferred to the video input / output block 49 at the timing from the display synchronization generating circuit 51 of the video input / output block 49. The data is converted into an analog video signal by the D / A conversion / output processing circuit 50 of the video input / output block 49 and displayed on the display device.

In the still picture transmission device, the digital data is a component signal of Y of a luminance signal and Cb.Cr of a color difference signal in order to reduce the data amount.
To transmit this, the ratio of Y: Cb: Cr is 4: 1 :.
The data amount is 1, 4: 2: 2 or 4: 4: 4, and conversion means for converting the difference in the data amount ratio to the data ratio of 4: 2: 2 on the receiving side has already been presented. However, this still image transmission device cannot transmit / receive due to the difference in memory usage efficiency and Cb / Cr data amount.
This is a solution to the problem that the positional relationship of Cr deviates as shown in FIG.

As a known document describing the conventional image transmission device, there is, for example, Japanese Patent Laid-Open No. 5-37909. This publication sets an even field thinning line to a line located approximately in the center between thinning lines set in an odd field with respect to an odd field thinning line, and further, in the next frame, By repeating the operation of shifting the thinning lines one by one, the thinning lines do not overlap each other, and the unnaturalness of the screen can be reduced.

In Japanese Patent Laid-Open No. 5-252483, for example, when converting from the PAL system to the NTSC system, two lines are calculated for every six input lines to form five lines. When converting to a system, two lines are individually calculated for five input lines to form six lines, and one field line of each system actually scanned by the picture tube is converted. The ratio is related to the horizontal synchronizing signal and the vertical blanking signal so that different ratios are given to the respective scanning lines.

Further, the one disclosed in Japanese Unexamined Patent Publication No. 6-86297 uses a video memory capable of storing two fields instead of the field memory, and uses NTSC, PA.
The standard signals of many televisions such as L and SECAM can be mutually converted. further,
The technique disclosed in Japanese Patent Laid-Open No. 6-164924 discloses a method of accumulating image data for 8 × 8 pixels (64 pixels) and a sampling rate detection unit for code data, which is a very simple circuit. The simple pixel interpolation and pixel thinning function of
It is possible to realize handling of images at a plurality of sampling rates in a natural image communication device having a display scan control circuit.

[0010]

As described above, in the conventional still image transmission apparatus, the transmission and reception of images cannot be performed even if the compression methods are different from each other. 1
Considering the case where the data amount of the video period of the horizontal period is different, if the compression method of the image data is the same for both transmission and reception and the data amount of the video period of one horizontal period is different, the compressed data Even if the data can be expanded normally and the data of the video period of one horizontal period is stored for each line in the memory, the number of data is different from the number of data in the video period of one horizontal period originally intended to be displayed. Therefore, in the actual display image, the image expands or contracts in the horizontal direction.

For example, when the number of data in the video period of one horizontal period is small and the number of data in the receiving side is large (for example, the number of data in the video period of one horizontal period is 700 dots on the transmitting side and 800 dots on the receiving side). On the receiving side, as shown in FIG. 14 (a), there is no data up to the part that is actually displayed, so the image actually displayed on the monitor is
As shown in FIG. 14B, the image is contracted in the horizontal direction. On the contrary, when the number of data is large on the transmitting side and the number of data on the receiving side is small (for example, the number of data in the video period of one horizontal period is 8 at the transmitting side).
In the case of 00 dots and 700 dots on the receiving side),
As shown in FIG. 15A, since there is more data than the portion actually displayed on the receiving side and the portion to be displayed on the receiving side, the actually displayed image extends horizontally as shown in FIG. 15B. I will end up.

Further, a method of processing the memory on the receiving side (for example, the data sent as shown in FIG. 16A is written so as to be filled in the vacant portion regardless of the line in the display memory. Depending on the case where each line for display is read at the time of reading), the actual display image has a step in the display position between the lines as shown in FIG. It was displayed diagonally and could not be displayed like the original image.

In the method of converting the Y / Cb / Cr ratios different from each other, the Y / Cb / Cr display cannot be transmitted or received due to the difference in the memory use efficiency and the Cb / Cr data amount.
Although the problem that the positional relationship of No. shifts as shown in FIG. 13 can be solved, the problem that the display position shifts due to the difference in the Y (luminance) data amount could not be solved. That is, when the data amount (data amount of the luminance signal Y) in the video period of one horizontal period is different, the data is stored in the memory for display as described above at a position different from the original, and When it is displayed as it is, there is a problem that the display image is largely different from the original image or is not displayed, so that normal display cannot be performed.

As described above, the one disclosed in the above publication is PAL → NTSC conversion by thinning out lines, and
The one disclosed in the above publication gives different ratios to the scanning lines, and the one disclosed in the above publication relates to the conversion of the number of scanning lines.
This is a conversion of SC240 lines ← → PAL288 lines, and the memory can be constructed at a low cost because it has only one screen of memory. Further, the above-mentioned publication relates to conversion of the image data amount (sampling rate), and the pixel ratio configuration conversion of Y: Cb: Cr (for example, Y:
Cb: Cr = 4: 1: 1 to Y: Cb: Cr = 4: 2:
However, in the present invention, the pixel conversion (for example, 720do) occurs.
t → 768 dot).

The present invention has been made in view of such a situation, and even if the amount of data in one line transmitted / received in the still image transmission device is different, the data conversion by calculation or the conversion by interpolation / thinning is performed. An object of the present invention is to provide a still image transmission device in which the display does not change during transmission / reception, and the display does not change during transmission / reception by conversion by calculation even if the number of lines to be transmitted / received differs.

[0016]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides (1) converting a video signal into a component video signal, digitizing the component video signal, and compressing the digitized data for communication. In a still image transmission device that transmits and receives via a line, a means for mutually understanding the data amount of the image period of one horizontal period of the transmitted and received image data, a memory circuit for holding the received image data, and an image display Memory circuit and the ratio of the data amount of the video period of one horizontal period of the received image data to the data amount of the video period of one horizontal period for display in order to match the received image data with the data amount for display And a calculation means for converting the data amount of the received image data in the video period of one horizontal period to display the data amount of the video period of one horizontal period for display. Display without changing the screen size even if the amount of data is different, or (2) a video signal is converted into a component video signal, the component video signal is digitized, and the digitized data is compressed to a communication line. And a memory circuit for holding the image data received by the still image transmission device, in the still image transmission device transmitted and received through the means for mutually understanding the data amount of the image period of one horizontal period of the transmitted and received image data. And a memory circuit for display, and a data amount for a video period of one horizontal period of the received image data and a display memory for adjusting the received image data to the data amount for display.
A conversion unit for thinning and complementing and converting according to the ratio of the data amount of the video period of the horizontal period, and the data of the video period of one horizontal period of the received image data or 1 for display.
The feature is that the image size is displayed without changing even when the data amount is different from the video period in the horizontal period.

[0017]

The still image transmission apparatus of the present invention having the above-mentioned structure is
Even if the same image data compression method is used, the amount of image data received on the receiving side is displayed on the receiving side even if the amount of image data in the video period of one horizontal period differs on the transmitting side and the receiving side. In order to match the amount of image data of the received image, the display of the received image may be expanded or contracted in the horizontal direction, or the first part of the horizontal may not match so that the image may be stepped and the display may not be the same as the original image. The original image can be displayed without any problem.

[0018]

Embodiments will be described below with reference to the drawings. FIG. 1 is a configuration diagram for explaining an embodiment of a still image transmission apparatus according to the present invention, in which 1 is a line interface block, 2 is a CPU block, 3 is a memory, and 4 is a block diagram.
Is a CPU (Central Processing Unit), 5 is a compression / expansion block, and 6
Is a memory block, 7 is a memory, 8 is a memory control circuit, 9 is an arithmetic circuit block, 10 is a memory block, 11 is a memory control circuit, 12 is a memory, 1
3 is a video input / output block, 14 is a D / A conversion output processing circuit, 15 is a display synchronizing signal generating circuit, 16 is input processing /
A / D conversion circuit, 17 is a display device, and 18 is a camera.

The line interface block 1 is connected to an external public line through the line interface block 1. The CPU block 2 comprises a CPU 4 and a work memory 3, controls the system, transfers data from the compression / expansion block 5 to the line I / F block 1, and transfers data from the line I / F block 1. Transfer to the compression / expansion block 5 is being performed. The compression / expansion block 5 is a block for compressing / expanding data. The memory block 6 is composed of a memory 7 for storing data for compression / expansion and for actually storing the data, and a memory control circuit 8 for controlling the memory 7.

When the data is compressed, the input image data from the video input / output block 13 is once stored in the memory block 10 and compressed by the compression / expansion block 5, and the CPU
It is stored in the work memory 3 of the block 2. The data that has been compressed once is decompressed by the compression / decompression block 5,
The expanded data is once stored in the memory block 6 and then sent to the arithmetic circuit block 9. The arithmetic circuit block 9 converts the data stored in the memory block 6 into display data.

The memory block 10 is a display memory block and comprises a memory 12 for storing data and a memory control circuit 11 for controlling the memory 12. The video input / output block 13 includes an input processing A / D conversion circuit 16 that converts an input analog video signal into digital data,
D for converting digital data into analog signals for display
The A / A conversion output processing circuit 14 and the display synchronization signal generation circuit 15 are included. The display device 17 displays the output of this system. The camera 18 is a camera for inputting an image to this system.

Next, examples will be described. When transmitting and receiving image data, the CPU 4 on the transmitting side puts information on the amount of data in the video period of one horizontal period of the image on the transmitting side at the beginning of the image data and transmits it. In the present invention, the amount of data displayed on the receiving side is the amount of data in which the video portion in one horizontal period is 768 dots, as shown in FIG. , Fig. 2 (b)
As described above, the video portion in one horizontal period is 720 dots. When the image data is sent through the line I / F block 1 on the receiving side, the CPU 4 of the CPU block 2 confirms the reception, and 1 of the image data sent from the first data of the image data is confirmed. It is judged whether the data amount of the video period of the horizontal period is several, and the image data is passed to the compression / expansion block 5 and the information of the data amount of the video period of one horizontal period is passed to the memory block 6.

At this time, the CPU 4 calculates how much data is converted into what data. The image data is expanded through the compression / expansion block 5 and stored in the memory block 6. Here, the memory control circuit 8 of the memory block 6 stores the data in the memory 7 as shown in FIG. 3A based on the information on the data amount of the video period of one horizontal period from the CPU 4. In memory 7, it is actually horizontal 768d
720 in horizontal direction even though there is an area for ot
There is data only for dot, and the memory for the remaining 48 dots will be stored in an empty state.

After that, the image data stored in the memory block 6 is transferred to the arithmetic circuit 9 under the control of the CPU 4. The arithmetic circuit 9 receives from the CPU 4 information on how many conversions are to be performed, converts the data based on the information, and stores the data in the memory block 10 as shown in FIG. 3B.
In the memory 12, as shown in FIG. 3B, data is stored exactly in the area for horizontal 768 dots prepared for display. Considering the analog time axis, the conversion is shown in Fig. 2.
As you can see, the image data of 768dot is 72
Since the image data of 0dot is the same part,
As shown in (a) and (b), two adjacent image data for all image data are data amount of one horizontal period video period on the transmitting side and data amount of one horizontal period video period on the receiving side display. It is converted by adding at the ratio obtained by the ratio of.

The image data stored in the display memory block 10 is sent to the video input / output block 13 at the timing of the control signal from the CPU 4 and the signal from the display sync signal generation circuit 15 of the video input / output block 13. In the video input / output block 13, the image data is D / A converted.
The output signal processing unit 14 converts the analog video signal.
The converted signal and the display synchronizing signal from the display synchronizing signal generating circuit 15 are sent to the monitor 17, and the monitor 17
Then, the video is displayed by the sent video signal and the display synchronization signal.

FIG. 5 is a flow chart for explaining the operation of the first embodiment. Hereinafter, each step (S) will be described in order. First, reception is confirmed (S1), and data indicating the data amount is extracted (S2). Next, the data amount is instructed to the memory block 6 (S3), and the image data is transferred to the compression / expansion block 5 (S4). Next, the data conversion ratio is calculated (S5), and the data conversion ratio is instructed to the arithmetic circuit 9 (S6). Next, the memory block 6
It is determined whether or not the memory is Full (S9), and if it is Full, the memory block 10 is instructed to transfer data (S10).

Next, a second embodiment will be described. Figure 6
Is a block diagram for explaining another embodiment of the still image transmission apparatus according to the present invention, in which 21 is a line interface block, 22 is a CPU block, 23 is a memory,
24 is a CPU, 25 is a memory block, 26 is a memory block, 27 is a memory, 28 is a memory control circuit, 29 is an arithmetic (interpolation / decimation) circuit block, 30 is a memory block, 31 is a memory control circuit, 32
Is a memory, 33 is a video input / output block, 34 is a D / A conversion output processing circuit, 35 is a display synchronizing signal generating circuit, and 36 is
Is an input processing A / D conversion circuit, 37 is a display device, and 38 is a camera.

The difference between Example 1 and Example 2 is that Example 1 is different.
The arithmetic circuit block 9 in FIG.
It is a circuit block 29, and the operation of each of the other blocks is the same. When transmitting and receiving image data, the CPU 24 on the transmitting side puts information on the amount of data in the video period of one horizontal period of the image on the transmitting side at the beginning of the image data and transmits it. According to the present invention, the data amount of the display on the receiving side is as shown in FIG.
Assuming that the data amount is 68 dots, the data amount in the video period of one horizontal period of the image on the transmission side is 1 as shown in FIG.
The video portion in the horizontal period is 720 dots. When the image data is sent through the line I / F block 21 on the receiving side, the CPU 24 confirms the reception, and the video period of one horizontal period of the image data transmitted from the top data of the image data. , The image data is sent to the compression / expansion block 25, and information of the data amount of the video period of one horizontal period is passed to the memory block 26.

Further, at this time, the CPU 24 calculates how many and what data is to be complemented or thinned. The image data is expanded through the compression / expansion block 25 and stored in the memory block 26. Here, the memory control circuit 28 of the memory block 26 stores the memory 2 based on the information of the data amount of the video period of one horizontal period from the CPU 24.
Data is stored in 7 as shown in FIG. Memory 2
In the case of 7, although there is actually an area for 768 dots in the horizontal direction, there is only data for 720 dots in the horizontal direction, and the remaining 48 dots of memory will be stored empty.

Thereafter, the image data stored in the memory block 26 is transferred to the arithmetic (complementing / thinning) circuit 29 under the control of the CPU 24. In the arithmetic circuit 29, the CP
Information about how many to what to complement / thinning conversion is received from U24, data is converted based on the information and stored in the memory block 30 as shown in FIG. 8B. In the memory 32, as shown in FIG. 8B, data is stored exactly in the area for horizontal 768 dots prepared for display. Considering the conversion on the analog time axis, as can be seen from FIG. 7, since the image data of 768 dots and the image data of 720 dots are the same part, they are sent as shown in FIGS. 9 (a) and 9 (b). In order to match the received data to the display on the receiving side, the ratio calculated by the ratio of the data amount of the video period of one horizontal period on the transmitting side to the data amount of the video period of one horizontal period on the receiving side (in this case Is converted by performing interpolation or thinning (interpolation in this example) according to 15:16).

The image data stored in the display memory block 30 is sent to the video input / output block 33 at the timing of the control signal from the CPU 24 and the signal from the display sync signal generation circuit 35 of the video input / output block 33.
In the video input / output block 33, the D / A conversion / output signal processing unit 34 converts the image data into an analog video signal. The converted signal and the display synchronization signal generation circuit 35
To the monitor 37, and the monitor 37 displays an image by the transmitted video signal and the display synchronization signal.

FIG. 10 is a flow chart for explaining the operation of the third embodiment shown in FIG. Hereinafter, each step (S) will be described in order. First, check the reception (S
11), data indicating the data amount is extracted (S1)
2). Next, the data is instructed to the memory block 26 (S
13) The image data is transferred to the compression / expansion block 25 (S14). Next, the ratio of data conversion is calculated (S1
5) Instruct the arithmetic circuit 24 of the rate of data conversion (S
16). Next, the memory of the memory block 26
If it is Full, it is instructed to transfer data to the memory block 26 (S18). Next, the memory of the memory block 30 determines whether it is Full (S19), and instructs the memory block 30 to transfer data (S20).

[0033]

As is apparent from the above description, according to the present invention, when the same image data compression method is used, a different Y: Cb: Cr ratio is converted on the transmitting and receiving sides, and Y: Cb: Cr is converted. -When the display positions of Cb and Cr are aligned (that is, conversion of the data amount of Cb and Cr), the data amount of the video period (data amount of luminance signal Y) of one horizontal period on the transmitting side and the receiving side is different. The amount of image data received on the receiving side matches the amount of image data for display on the receiving side, the display of the received image may expand or contract in the horizontal direction, or the first horizontal part may not fit It is possible to display in the same manner as the original image without causing a step to occur and the display cannot be displayed like the original image. Further, since the claim (2) can be realized with a simpler configuration than the claim (1), the price can be suppressed.

[Brief description of drawings]

FIG. 1 is a block diagram for explaining an embodiment of a still image transmission apparatus according to the present invention.

FIG. 2 is a diagram showing a period of image data for an image according to the present invention.

FIG. 3 is a diagram showing a data area stored in a memory block according to the present invention.

4 is a conceptual diagram of conversion in the arithmetic circuit block of FIG.

5 is a flowchart of a CPU in FIG.

FIG. 6 is a block diagram for explaining another embodiment of the still image transmission apparatus according to the present invention.

FIG. 7 is a diagram showing a period of image data for an image according to the present invention.

FIG. 8 is a diagram showing a data area stored in a memory block according to the present invention.

9 is a conceptual diagram of interpolation in the arithmetic circuit block of FIG.

10 is a flowchart of the CPU in FIG.

FIG. 11 is a block diagram of a conventional still image transmission device.

FIG. 12 is a diagram showing a data area stored in a conventional memory.

FIG. 13 is a diagram showing a conventional image at the time of reception.

FIG. 14 is a diagram showing a case where a received image is displayed in a contracted manner due to a difference in the amount of transmitted / received data.

FIG. 15 is a diagram showing a case where a received image is stretched and displayed due to a difference in the amount of transmitted / received data.

FIG. 16 is a diagram showing a case where a received image is skewed due to a difference in transmission / reception data amount.

[Explanation of symbols]

1 ... Line interface block, 2 ... CPU block, 3 ... Memory, 4 ... CPU (central processing unit), 5 ... Compression / decompression block, 6 ... Memory block, 7 ... Memory, 8
... memory control circuit, 9 ... arithmetic circuit block, 1
0 ... memory block, 11 ... memory control circuit,
12 ... Memory, 13 ... Video input / output block, 14 ... D /
A conversion output processing circuit, 15 ... Display sync signal generation circuit,
16 ... Input processing / A / D conversion circuit, 17 ... Display device, 1
8 ... Camera, 21 ... Line interface block, 2
2 ... CPU block, 23 ... Memory, 24 ... CPU, 2
5 ... Memory block, 26 ... Memory block, 27 ... Memory, 28 ... Memory control circuit, 29 ... Operation (interpolation / decimation) circuit block, 30 ... Memory block, 3
DESCRIPTION OF SYMBOLS 1 ... Memory control circuit, 32 ... Memory, 33 ... Video input / output block, 34 ... D / A conversion output processing circuit, 3
5 ... Display sync signal generation circuit, 36 ... Input processing A / D conversion circuit, 37 ... Display device, 38 ... Camera.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI Technical display location H04N 5/92 7/24 11/04 Z 9185-5C H04N 5/92 H 7/13 Z

Claims (2)

[Claims] 1. A still image transmission apparatus for converting a video signal into a component video signal, digitizing the component video signal, compressing the digitized data and transmitting / receiving the compressed data through a communication line, in one horizontal period of image data to be transmitted / received. In order to make the data amount of the video period mutually understandable, a memory circuit for holding the received image data, a memory circuit for image display, and to adjust the received image data to the data amount for display The image data of one horizontal period of the received image data and the calculation means for converting the ratio of the data amount of the video period of one horizontal period for display by calculation are provided, and one horizontal period of the received image data Even if the amount of data in the video period is different from the amount of data in the video period of one horizontal period for display, it can be displayed without changing the screen size. Still image transmission device characterized by. 2. A still image transmission apparatus for converting a video signal into a component video signal, digitizing the component video signal, compressing the digitized data, and transmitting / receiving the same through a communication line, in one horizontal period of image data to be transmitted / received. Means for mutually understanding the data amount of the video period, a memory circuit for holding the image data received by the still image transmission device, a display memory circuit, and the received image data for display data A conversion means for performing conversion by performing thinning and complementing according to the ratio of the data amount of the video period of one horizontal period of the received image data to the amount of the image data and the data amount of the video period of one horizontal period for display. An image is displayed even if the data amount of the video period of one horizontal period of the received image data is different from the data amount of the video period of one horizontal period for display. Still image transmission device characterized by displaying without changing the size.