JP2846421B2 - Frame format conversion circuit with screen freeze function - Google Patents

Description

DETAILED DESCRIPTION [Summary] With a screen freeze function for converting a first frame format in which two fields in one frame are non-interlaced into a second frame format in which both fields are interlaced Regarding a frame format conversion circuit, the first frame format is provided with a field memory, a field switching selector, and a conversion circuit, and is intended to realize a screen freeze function with a simple configuration without having a dedicated memory. In a frame format circuit for converting to a frame format, an image signal of the first frame format input to the input side of the field memory when the screen is not frozen is selected and output, but is stored in the field memory when the screen is frozen. 1st A screen freeze selector for selecting and outputting a frame format image signal is provided.

The present invention relates to an image signal of a first frame format such as a CIF signal in which two fields in one frame are non-interlaced, and an NT in which both fields are interlaced.
Regarding a frame format conversion circuit for converting into an image signal of a second frame format such as SC,
The present invention relates to a frame format conversion circuit having a screen freeze function for obtaining a still image.

[Prior Art] FIG. 6 is a block diagram showing a configuration of a conventional screen freeze circuit. In FIG. 6, reference numeral 11 denotes a predetermined format conversion (CIF / NTSC, A / D, or any other conversion may be used). A frame memory 12 in which the input image signal is written when the screen is not frozen, and is stored in the frame memory 11 when the screen is frozen. A selector 13 is provided on the output side of the frame memory 11 for selecting and outputting a selected image signal. The selector 13 selects and outputs an image signal (moving image) that does not pass through the frame memory 11 when the screen is not frozen, but when the screen is frozen. Frame memory 11
Is a selector which selectively outputs the image signal stored in the selector 12, and the selectors 12, 13 are switched by a freeze instruction signal from the outside.

With such a configuration, when the screen is not frozen, that is, when displaying a moving image on a television receiver or the like, the selector 13 selects and outputs an image signal that does not pass through the frame memory 11. At this time, the image signal is also sequentially input to the frame memory 11 via the selector 12, and the frame data in the frame memory 11 is sequentially rewritten.

On the other hand, when the screen freezes to display a still image on a television receiver or the like, the freeze instruction signal causes the selectors 12 and 13 to freeze.
Are switched to the frame memory 11 side, and the image signal stored in the frame memory 11 circulates from the output side to the input side of the frame memory 11 via the selector 12, and the same image signal is held in the frame memory 11. Will continue. The same image signal continues to be transmitted from the selector 13 for selecting the output from the frame memory 11 unless the freeze instruction is released, so that a still image is displayed on the television receiver or the like.

[Problems to be Solved by the Invention] However, in such a conventional screen freeze circuit, in order to perform screen freeze, it is necessary to newly add a dedicated frame memory 11, and the circuit scale and cost increase. There is a problem that.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a frame format conversion circuit capable of realizing a screen freeze function with a simple configuration without having a dedicated memory.

[Means for Solving the Problems] FIG. 1 is a principle block diagram of the present invention.

In FIG. 1, reference numeral 1 denotes a field memory for storing an input image signal (CIF signal) of a first frame format, and 2 denotes an image signal of a first frame format or a field memory 1 which does not pass through the field memory 1. The field switching selector 3 for selectively outputting any of the image signals of the first frame format stored in the second frame format performs a required conversion process on the output from the field switching selector 2. A conversion circuit 4 for outputting an image signal (NTSC signal) of the image memory 4 is a screen freeze selector provided on the input side of the field memory 1, and this selector 4 is used for the first frame format input when the screen is not frozen. An image signal is selected and output, but is stored in the field memory 1 when the screen freezes. This is to select and output the stored image signal of the first frame format.

[Operation] With the configuration described above, when the screen is not frozen, the screen freeze selector 4 selects and outputs the input image signal of the first frame format, and this image signal is input to the field memory 1. The data is sequentially rewritten for each frame, and is also input to the field switching selector 2. The image signal once stored in the field memory 1 is also input to the selector 2.

The conversion from the first frame format to the second frame format is performed by a switching operation of the field switching selector 2. That is, when an image signal is input, first, the selector 2 selects and outputs an image signal that does not pass through the field memory 1 to thereby output data of one field in the non-interlaced first frame format. Is used as one field data of the interlaced second frame format. Thereafter, the same field data stored in the field memory 1 is selected by the selector 2 and output, so that the same field data becomes
The second, interlaced, delayed by one field
Is used as the other field data of the frame format. Then, the conversion circuit 3 performs a required conversion process on the output from the selector 2 to obtain an image signal in the second frame format.

On the other hand, at the time of screen freeze, the screen freeze selector 4 is switched to a side for selecting and outputting the image signal of the first frame format stored in the field memory 1. As a result, the image signal stored in the field memory 1 at this time is
From the output side to the input side, the same image signal continues to be held in the field memory 1, and the image signal of the first frame format which does not pass through the field memory 1 and is input to the selector 2 The output from the memory 1 is the same.

In this state, if the same frame format conversion as described above is performed by the switching operation of the selector 2, the same image signal is always obtained from the conversion circuit 3, and the screen freeze state is maintained.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing one embodiment of the present invention. As shown in FIG.
One field is non-interlace
The field memory 1, the field switching selector 2, and the conversion circuit 3 convert the converted first frame format CIF signal into a second frame format NTSC signal in which both fields are interlaced.
Is provided.

The field memory 1 stores the input CIF signal, and the selector 2 stores the CIF signal.
The conversion circuit 3 selectively outputs either the CIF signal that does not pass through the CIF signal or the CIF signal stored in the field memory 1. The conversion circuit 3 performs a required conversion process on the output from the selector 2 to convert the NTSC signal. The output unit includes a filter 3a having an interpolation function and a line number conversion unit 3b for performing a line number conversion process.

On the input side of the field memory 1, a screen freeze selector 4 is provided. This selector 4
Is to select and output the input CIF signal when the screen is not frozen, and to select and output the CIF signal stored in the field memory 1 when the screen is frozen.

FIG. 3 is a block diagram showing a frame format control signal freeze circuit in one embodiment of the present invention.
In FIG. 3, reference numeral 5 denotes a flip-flop (memory) for storing a frame format control signal, and reference numeral 6 denotes a selector for a frame format control signal provided on the input side of the flip-flop 5. While the selected frame format control signal is selected and output, when the screen is frozen, the frame format control signal stored in the flip-flop 5 is selected and output in conjunction with the screen freeze selection mode by the selector 4. . The flip-flop 5 and the selector 6 constitute a frame format control signal freeze circuit 7.

With the above configuration, when the screen is not frozen, the selector 4 selects and outputs the input CIF signal, and outputs the selected CIF signal.
The IF signal is input to the field memory 1 and sequentially rewritten for each frame, and is also input to the selector 2. The image signal once stored in the field memory 1 is also input to the selector 2.

The conversion from the CIF signal to the NTSC signal is performed by the switching operation of the selector 2 as follows.

In the frame format of a CIF signal standardized for digital encoding processing, as shown in FIG.
The data in one frame has a format in which two fields, an odd field and an even field, are non-interlaced. In order to convert this CIF signal into an NTSC signal in which both odd and even fields are interlaced as shown in FIG.
It is necessary to use the CIF signal twice in a case where the CIF signal is used for an odd field and in a case where the CIF signal is delayed by one field and used for an even field. For this purpose, the field memory 1 is provided.

More specifically, the conversion process will be described. First, during the odd field period, the selector 2 selects and outputs a CIF signal that does not pass through the field memory 1 to thereby output one field of the non-interlaced CIF signal. Are used as odd field data of the NTSC signal. Thereafter, during the even field period, the same field data stored in the field memory 1 is selected and output by the selector 2 so that the same field data is delayed by one field, and the even field data of the NTSC signal is delayed. Used as

By such switching operation of the selector 2, the CIF signal is converted into a format (output of the selector 2) as shown in FIG. Then, in the conversion circuit 3, interpolation processing by the filter 3a (processing before line number conversion)
The line number conversion processing is performed by the line number conversion unit 3b, and the interlaced NT as shown in FIG.
SC signal is obtained.

On the other hand, when the screen freezes, the selector 4 selects and outputs the CIF signal stored in the field memory 1. As a result, the CIF signal stored in the field memory 1 at this time circulates from the output side to the input side of the field memory 1, and the CIF signal having the same field data continues to be held in the field memory 1, The CIF signal input to the selector 2 that does not pass through the field memory 1 is always the same and the same as the output from the field memory 1.

In this state, if the same format conversion as described above is performed by the switching operation of the selector 2, the same NTSC signal is always obtained from the conversion circuit 3, and the screen freeze state is maintained. If the selector 4 selects a newly input CIF signal by a freeze release instruction,
The freeze state is released.

By the way, as shown in FIGS. 5A and 5B, the CIF signal includes a full CIF signal and a QCIF signal, and the resolution of the QCIF signal is reduced to a quarter of the full CIF signal. Has become. In FIGS. 5 (a) and 5 (b), Y is a luminance signal, RY and BY are color difference signals, and a full CIF signal has a period of 4 pels (pixels) in the horizontal direction and a luminance signal in the vertical direction. Y are all valid data, and the vertical color difference signals RY and BY are 6
In the QCIF signal, the horizontal direction is
The luminance signal Y in the vertical direction has 8 periods and the luminance signal Y in the vertical direction has two periods, and the color difference signals RY and BY in the vertical direction have four periods.

Usually, the number of scanning lines and the number of pixels in the frame format are the same, but the luminance signal Y and the color difference signals R-Y,
Since the arrangement of BY is different as shown in FIGS. 5A and 5B, the parameters for the filtering process change. For this reason, each field data contains full CIF / QCIF
A unique frame format control signal for switching instruction is required. Since the field data and the frame format control at that time must match, when the screen is frozen, the frame format control signal also needs to be frozen.

Therefore, in this embodiment, the frame format control signal freeze circuit 7 shown in FIG. 3 is provided. In the frame format control signal freeze circuit 7, when the screen is not frozen, the input frame format control signal is selected and output by the selector 6, and is sequentially stored in the flip-flop 5. When the screen is frozen, the frame format control signal stored in the flip-flop 5 is selected and output by the selector 6 in conjunction with the screen freeze selection mode by the screen freeze selector 4.

As described above, according to the frame format conversion circuit of the present embodiment, a normal conversion circuit that converts a CIF signal in which two fields in one frame are non-interlaced into an NTSC signal in which both fields are interlaced is used. , A screen freeze selector 4 is provided on the input side of the field memory 1, and the screen freeze is performed only by switching the selector 4. Therefore, the field memory 1 for format conversion is also used for screen freeze,
A memory dedicated to screen freeze as in the prior art (reference numeral in FIG. 6)
11), and the screen freeze function can be realized simply and at low cost.

[Effects of the Invention] As described in detail above, according to the frame format conversion circuit with a screen freeze function of the present invention, the first frame format in which two fields in one frame are non-interlaced is converted to the two fields. In a normal conversion circuit for converting to an interlaced second frame format, a screen freeze selector is provided on the input side of the field memory, and screen freeze can be performed simply by switching this selector. So
The field memory for format conversion can also be used for screen freeze, and there is no need to provide a dedicated memory for screen freeze as in the prior art. This has the advantage that the screen freeze function can be realized with an extremely simple configuration and at low cost.

[Brief description of the drawings]

1 is a block diagram showing the principle of the present invention, FIG. 2 is a block diagram showing one embodiment of the present invention, FIG. 3 is a block diagram showing a frame format control signal freeze circuit in one embodiment of the present invention, 5A to 5C are diagrams specifically illustrating a frame format conversion state according to an embodiment of the present invention. FIGS. 5A and 5B are data of a full CIF signal and a QCIF signal, respectively. FIG. 6 is a block diagram showing a conventional example. In the figure, 1 is a field memory, 2 is a field switching selector, 3 is a conversion circuit, 3a is a filter, 3b is a line number converter, 4 is a screen freeze selector, 5 is a flip-flop (memory), and 6 is a frame format. A control signal selector 7 is a frame format control signal freeze circuit.

Of the front page Continued (72) inventor Kiichi Matsuda, Kanagawa Prefecture, Nakahara-ku, Kawasaki, Kamikodanaka 1015 address Fujitsu within Co., Ltd. (58) investigated the field (Int.Cl. ^6, DB name) H04N 7/01

Claims (2)

(57) [Claims] 1. A first frame format which has been input to convert a first frame format in which two fields in one frame are non-interlaced into a second frame format in which both fields are interlaced. A field memory (1) for storing an image signal in a frame format, and an image signal in the first frame format that does not pass through the field memory (1) or the first frame stored in the field memory (1) A field switching selector (2) for selectively outputting any of the image signals of the format, and a required conversion process for the output from the field switching selector (2) to perform the image signal of the second frame format. In a frame format conversion circuit including a conversion circuit (3, 3a, 3b) that outputs At the input side of the field memory (1), the image signal of the first frame format which has been input is selected and output when the screen is not frozen, but is stored in the field memory (1) when the screen is frozen. A frame format conversion circuit with a screen freeze function, comprising a screen freeze selector (4) for selecting and outputting an image signal of a first frame format. 2. A memory (5) for storing a frame format control signal, which is provided on the input side of the memory (5) and selects and outputs the input frame format control signal when the screen is not frozen. A frame format control signal selector (6) for selecting and outputting the frame format control signal stored in the memory (5) in conjunction with a screen freeze selection mode by the screen freeze selector (4) at the time of freeze; 2. A frame format conversion circuit with a screen freeze function according to claim 1, further comprising a frame format control signal freeze circuit (7) comprising: