JPH08148673A - Semiconductor device - Google Patents

Abstract

PURPOSE: To reduce the resistance at the heterojunction interface in a semiconductor device which includes heterojunction consisting of a semiconductor having a wide band gap and a semiconductor having a narrow band gap. CONSTITUTION: An n-GaAs cap layer 8 having a narrow band gap is made on an n-Al0.22 Ga0.78 barrier layer 7 having a wide band gap. In the n-Al0.22 Ga0.78 AS barrier layer 7, an n-type impurity layer 70 δ-doped with Si donor is made in the vicinity of the heterojunction interface with an n-GaAs cap layer 8. Accordingly, a p-type impurity layer 80 δ-doped with Be acceptor is made in the vicinity of the heterojunction interface with the n-Al0.22 Ga0.78 AS barrier layer 7. The interval between the n-type impurity layer 70 and the p-type impurity layer 80 is set to a 10 molecular layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device including a heterojunction composed of a semiconductor having a wide bandgap and a semiconductor having a narrow bandgap.

[0002]

2. Description of the Related Art Heterojunctions composed of a semiconductor having a wide bandgap and a semiconductor having a narrow bandgap are used in various semiconductor devices. As an example of a semiconductor device using such a heterojunction, FIG. 4 shows a field effect semiconductor device having both low noise operation characteristics and high output operation characteristics. This field effect semiconductor device has a TMT (Two Mode)
It is called a channel FET) element.

In FIG. 4, a semi-insulating GaAs substrate 1 is used.
An undoped GaAs buffer layer 2 having a film thickness of 8000 Å and an undoped In _0.2 Ga _0.8 As film having a film thickness of 50 Å
Channel layer 3 and undoped In _{X with a} film thickness of 70 Å
The Ga _1-X As channel layer 4 is sequentially formed. In
The composition ratio x of In of the _X Ga _1-X As channel layer 4 is In
_0.2 Ga _0.8 As Gradient decreases from 0.2 to 0 from the interface with the channel layer 3 toward the upper side.

On the In _X Ga _1-X As channel layer 4,
An undoped GaAs spacer layer 5 having a film thickness of 20Å, an n-GaAs channel layer 6 having a film thickness of 200Å, an n-Al _0.22 Ga _0.78 As barrier layer 7 having a film thickness of _200Å , and a film thickness of 100.
The n-GaAs cap layer 8 of Å is sequentially formed.
Here, “n” means an n-type semiconductor having a narrow forbidden band (band gap), and “N” means an n-type semiconductor having a wide forbidden band.

The N-Al _0.22 Ga _0.78 As barrier layer 7 and the n-GaAs cap layer 8 each have a concentration of 2 × 10 ^18.
cm ⁻³ of Si donor is doped. n-Ga
N-Al _0.22 Ga _0.78 As is formed in the center of the As cap layer 8.
A recess reaching the barrier layer 7 is formed, and N-Al _0.22 Ga is formed.
A gate electrode 9 that is in Schottky contact with the _0.78 As barrier layer 7 is formed in the center of the barrier layer 7. Further, a source electrode 10 and a drain electrode 11 which are in ohmic contact with the cap layer 8 are formed on the n-GaAs cap layer 8 on both sides of the gate electrode 9, respectively.

In the TMT element of FIG. 4, when the gate potential is deep, the depletion layer extends downward, and electrons supplied from the n-GaAs channel layer 6 are mainly In _0.2 Ga.
_It runs through the _0.8 As channel layer 3 and the In _X Ga _1-X As channel layer 4. In this case, the electrons are In _0.2 Ga
_Since it is well confined in the quantum wells of the _0.8 As channel layer 3 and the In _x Ga ₁ -x As channel layer 4, it is less affected by impurities in the heavily doped n-GaAs channel layer 6, Ultra low noise characteristics can be obtained. On the other hand, when the gate potential is shallow, the depletion layer shrinks,
The electrons mainly travel in the n-GaAs channel layer 6.
Therefore, the heavily doped n-GaAs channel layer 6 acts as a channel, and a high and flat transconductance is obtained, so that a high output characteristic is obtained.

In the TMT element of FIG. 4, the source electrode 1
The resistance composed of the resistance R1 from 0 to the channel and the resistance R2 from the lower end of the gate electrode 9 in the channel is called the source resistance. This source resistance causes a problem of becoming a thermal noise source and deteriorating the noise characteristic, and lowering the mutual conductance representing the driving capability of the element. Therefore, in order to improve the performance of the semiconductor device such as the TMT element of FIG. 4, it is necessary to make the source resistance as small as possible.

Generally, in order to reduce the source resistance,
Forming a semiconductor layer having a narrow forbidden band between a semiconductor layer having a wide forbidden band and an electrode to reduce the contact resistance between the metal forming the electrode and the semiconductor layer having a wide forbidden band, and contact with the electrode. The impurity concentration of the semiconductor layer is increased.

In the case of the TMT element shown in FIG. 4, an n-GaAs cap layer having a narrow forbidden band between the N-Al _0.22 Ga _0.78 As barrier layer 7 having a wide forbidden band and the source electrode 10 and the drain electrode 11. 8 and N
The -Al _0.22 Ga _0.78 As barrier layer 7 and the n-GaAs cap layer 8 are doped with Si at 2 × 10 ¹⁸ cm ⁻³ . In other N-AlGaAs / GaAs system modulation-doped heterojunction field effect transistors, the same thing is done to reduce the source resistance.

[0010]

However, when the semiconductor layer having a narrow bandgap is formed between the semiconductor layer having a wide bandgap and the electrode as described above, the following problems occur. .

FIG. 5 shows the energy band structure of the conduction band and the electron distribution state in the TMT element of FIG. Figure 5
In, the solid line A indicates the potential distribution of the conduction band,
The broken line B shows the electron distribution.

The forbidden band of the n-GaAs cap layer 8 is N-
Al_0.22Ga_0.78Narrower than the forbidden band of As barrier layer 7
Then, as shown in FIG. 5, n-GaAs cap layer 8 and N
-Al _0.22Ga_0.78At the heterojunction interface with the As barrier layer 7
The notch 20 is formed. This notch 20
Movement is hindered, and n-GaAs cap layer 8 and N-Al
_0.22Ga_0.78When the resistance value between the As barrier layer 7 increases
I have a problem. Due to the notch 20 at the heterojunction interface
The resistance value accounts for about one quarter of the total source resistance value.

On the other hand, there is a limit to the amount of impurities that can be uniformly doped in the semiconductor layer without impairing its crystallinity. For example, when Si is doped in the n-GaAs layer, the limit is about 3 × 10 ¹⁸ cm ^-3 .

An object of the present invention is to reduce the resistance value at the junction surface in a semiconductor device including a heterojunction composed of a semiconductor having a wide bandgap and a semiconductor having a narrow bandgap.

[0015]

A semiconductor device according to the present invention includes a first semiconductor of a first conductivity type having a first forbidden band width and a second forbidden band width narrower than the first forbidden band width. In a semiconductor device including a heterojunction made of a second semiconductor of the first conductivity type having a first conductivity type impurity, the first conductivity type impurity is δ-function-doped near the heterojunction interface in the first semiconductor. In addition to forming the layer, a second impurity layer is formed in the vicinity of the heterojunction interface in the second semiconductor by doping the second conductivity type impurity in a δ function.

Here, "d-functional doping" means
Doping into a few molecular layers of a semiconductor layer, preferably into one molecular layer, is also called atomic planar doping. In particular, it is preferable that the distance between the first impurity layer and the second impurity layer be one fourth or less of the de Broglie wavelength of electrons. Further, the doping concentration of impurities in the first and second impurity layers is preferably such that the band bends so that band discontinuity at the heterojunction interface is reduced.

[0017]

In the semiconductor device according to the present invention, by narrowing the narrow bandgap by doping the second conductivity type impurity in the vicinity of the heterojunction interface of the second semiconductor of the first conductivity type having a narrow bandgap by the δ function. The energy band on the band side is lifted up, and the notch formed at the heterojunction interface disappears substantially.

Further, the first impurity layer and the second impurity layer formed in the vicinity of the heterojunction interface form electric dipoles, but they are electrically neutral when viewed as a semiconductor device as a whole. Therefore, the first and second impurity layers have almost no effect on the electron distribution of the semiconductor device.

Further, since the delta function doping is used, high concentration impurity doping can be performed in the first impurity layer and the second impurity layer. In particular, when the distance between the first impurity layer and the second impurity layer is equal to or less than a quarter of the de Broglie wavelength of the electron, the electron is
It is possible to freely pass through the heterojunction interface without being substantially affected by the potential change of the energy band due to the impurity layer and the second impurity layer. Therefore,
The resistance component at the heterojunction interface becomes almost zero.

[0020]

1 is a schematic sectional view showing the structure of a TMT element according to an embodiment of the present invention. In FIG. 1, an undoped GaAs buffer layer 2 having a film thickness of 8000Å and an undoped I film having a film thickness of 50Å are formed on a semi-insulating GaAs substrate 1.
An n _0.2 Ga _0.8 As channel layer 3 and an undoped In _X Ga _1-X As channel layer 4 having a film thickness of 70Å are sequentially formed. In _X Ga _1-X As Channel Layer 4 In
The composition ratio x of the is gradually decreased from 0.2 to 0 from the interface with the In _0.2 Ga _0.8 As channel layer 3 toward the upper side.

On the In _X Ga _1-X As channel layer 4,
An undoped GaAs spacer layer 5 having a film thickness of 20Å, an n-GaAs channel layer 6 having a film thickness of 200Å, an N-Al _0.22 Ga _0.78 As barrier layer 7 having a film thickness of _200Å , and a film thickness of 100.
The n-GaAs cap layer 8 of Å is sequentially formed.

At the center of the n-GaAs cap layer 8, N is formed.
A recess reaching the -Al _0.22 Ga _0.78 As barrier layer 7 is formed, and a gate electrode 9 that is in Schottky contact with the barrier layer 7 is formed in the center of the N-Al _0.22 Ga _0.78 As barrier layer 7. A source electrode 10 and a drain electrode 11 that are in ohmic contact with the cap layer 8 are formed on the n-GaAs cap layer 8 on both sides of the gate electrode 9, respectively. N-Al _0.22 Ga _0.78 As barrier layer 7 and n-
The GaAs cap layer 8 has an S concentration of 2 × 10 ¹⁸ cm ⁻³ .
Each i donor is uniformly doped.

In particular, in the TMT element of this embodiment, N-A
l_0.22Ga_0.78In the As barrier layer 7, n-GaAs
Si donors near the heterojunction interface with the cap layer 8
Δ doping of only one molecular layer (atomic planar dope
N-type impurity layer 70 is formed.
In addition, in the n-GaAs cap layer 8, N-Al
_0.22Ga_0.78Near the heterojunction interface with the As barrier layer 7
In addition, Be acceptor is δ-doped for only one molecular layer.
The p-type impurity layer 80 is formed. n-type impurities
The concentration of the Si donor in the layer 70 is 1 × 10^-13cm^-2
Is. Further, Be accepting in the p-type impurity layer 80
The concentration of tar is also 1 × 10^-13cm^-2Is. n-type impurity layer
The distance d between 70 and the p-type impurity layer 80 is 10 molecular layers.
(About 28Å). In the TMT element of FIG. 1 in FIG.
The conduction band energy band structure and electron distribution
Show. In FIG. 2, C is the potential distribution of the conduction band.
, D shows the electron distribution.

As shown in FIG. 2, in the vicinity of the heterojunction interface on the n-GaAs cap layer 8 side, the energy band potential is raised by the p-type impurity layer 80 as shown by an arrow 81. Also, N-Al _0.22 G
In the vicinity of the hetero junction interface on the a _0.78 As barrier layer 7 side, the energy band potential is lowered by the n-type impurity layer 70, as indicated by an arrow 71. As a result, the notch 20 shown in FIG. 5 disappears and the potential valley 30 is formed.

Since the distance between the p-type impurity layer 80 and the n-type impurity layer 70 is sufficiently shorter than the de Broglie wavelength, the size of the potential valley 30 is also sufficiently smaller than the de Broglie wavelength. Therefore, the electrons supplied from the n-GaAs cap layer 8 side can freely pass through the heterojunction interface without being affected by the potential valley 30. Therefore, the resistance component at the heterojunction interface becomes almost zero. Since the resistance component due to the notch 20 shown in FIG. 5 occupies a quarter of the total source resistance, T of the present embodiment.
In the MT element, the source resistance is reduced by about 25%.

The n-type impurity layer 70 and the p-type impurity layer 80 formed by δ-doping form electric dipoles, but are neutral as a whole. Therefore,
The change in energy band due to the n-type impurity layer 70 and the p-type impurity layer 80 has almost no effect on the electron distribution of the device. The electron distribution shown by the broken line D in FIG. 2 is equal to the electron distribution shown by the broken line B in FIG.

In the above embodiments, the case where the present invention is applied to the TMT element has been described, but the present invention, as shown in FIG. 3, has the first semiconductor 100 having a wide forbidden band and the first semiconductor 100 having a narrow forbidden band. The present invention can be applied to various semiconductor devices including a heterojunction composed of two semiconductors 200.

In the first semiconductor 100, a first impurity layer 101, which is δ-doped with impurities, is formed near the heterojunction interface with the second semiconductor 200. In addition, in the second semiconductor 200, a second impurity layer 201 formed by δ-doping with an impurity is formed in the vicinity of the heterojunction interface with the first semiconductor 100. The first semiconductor 100 and the second semiconductor 200 are n
In the case of a type, the first impurity layer 101 is also an n-type and the second impurity layer 201 is a p-type. On the other hand, when the first semiconductor 100 and the second semiconductor 200 are p-type, the first impurity layer 101 is also p-type and the second impurity layer 201 is n-type.

The first impurity layer 101 and the second impurity layer 102 are formed so that electrons can freely pass through the potential valley of the energy band.
It is preferable to set the distance L between the impurity layer 101 and the second impurity layer 102 of 1/4 or less (about 100Å or less) of the de Broglie wavelength of electrons.

Table 1 shows examples of combinations of the first semiconductor 100 and the second semiconductor 200.

[0031]

[Table 1]

As the n-type dopant, Si, Se,
Te, Sn, Ge, or the like can be used, and Si, Ge, C, Zn, Be, or the like can be used as the p-type dopant.

The present invention is not limited to the above TMT element,
EMT (High Electron mobile)
y FET) and other modulation doped heterojunction field effect transistors. The present invention can also be applied to, for example, an emitter portion having a wide forbidden band of a heterojunction bipolar transistor.
Furthermore, the present invention can be applied to various compound semiconductor transistors used as microwave elements and ultrahigh-speed digital elements, and also to various semiconductor devices such as diodes having a heterojunction and semiconductor laser devices. You can

[0034]

According to the present invention, since the notch generated at the heterojunction interface composed of a semiconductor having a wide bandgap and a semiconductor having a narrow bandgap disappears, the resistance at the heterojunction interface can be reduced. Therefore, the source resistance can be reduced in a semiconductor device having a heterojunction.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing a structure of a TMT element according to an embodiment of the present invention.

FIG. 2 is a diagram showing an energy band structure and an electron distribution state of the TMT element of FIG.

FIG. 3 is a diagram showing a basic configuration of the present invention.

FIG. 4 is a schematic cross-sectional view showing the structure of a conventional TMT element.

5 is a diagram showing an energy band structure and an electron distribution state of the TMT element of FIG.

[Explanation of symbols]

1 GaAs substrate 3 In _0.2 Ga _0.8 As channel layer 4 In _X Ga _1-X As channel layer 6 n-GaAs channel layer 7 N-Al _0.22 Ga _0.78 As barrier layer 8 n-GaAs cap layer 9 Gate electrode 10 Source electrode 11 Drain electrode 70 n-type impurity layer 80 p-type impurity layer 100 first semiconductor 101 first impurity layer 200 second semiconductor 201 second impurity layer

Claims (2)

[Claims] 1. A first semiconductor of a first conductivity type having a first bandgap and a second semiconductor of a first conductivity type having a second bandgap narrower than the first bandgap. In a semiconductor device including a heterojunction consisting of, a first impurity layer formed by doping a first conductivity type impurity in a δ function is formed in the vicinity of the heterojunction interface in the first semiconductor, and the second semiconductor layer is formed. A semiconductor device having a second impurity layer formed by doping a second conductivity type impurity in a δ function in the vicinity of the heterojunction interface of the semiconductor. 2. The semiconductor device according to claim 1, wherein the distance between the first impurity layer and the second impurity layer is not more than a quarter of the de Broglie wavelength of electrons. .