JPH08148660A - Manufacture of soi substrate - Google Patents

Abstract

PURPOSE: To improve the property of interface between an Si active layer and an insulating layer, and lessen the diffusion to an Si active layer of impurities caused by the heat treatment at the time of lamination by forming the said Si active layer, which has an equal thickness with small dispersion and has small surface roughness, on an insulating layer. CONSTITUTION: An Si active layer 14, where the concentration of impurities is less than 1×10<18> /cm<3> or which does not contain impurities, is made on the first Si substrate 11 which contains As or Sb by 1×10<18> /cm<3> or over, and an insulating layer 16 is made on this Si active layer 14, and the main face of a support substrate 17 is stuck onto this insulating layer 16. Next, a great part of the first Si substrate 11 is removed to make it into an Si film 11a 5μm or less in thickness, and then this Si film 11a is removed in specified chemical etchant, leaving the insulating layer 16 and the Si active layer 14 on the main face of the support substrate 17.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a Si on SiO ₂ insulation layer
The present invention relates to a method for manufacturing an SOI (Silicon-On-Insulator) substrate for forming an active layer. More specifically, it relates to a method for manufacturing an SOI substrate based on a bonded wafer method in which silicon wafers are bonded to each other via an insulating film.

[0002]

2. Description of the Related Art In order to break the limit of VLSI using silicon (Si), SOI technology for forming a single crystal Si layer on an insulating substrate has been widely studied worldwide. This S
As OI technology, SIMOX (Separation by
Implanted Oxygen) method and bonded wafer method are attracting attention. Among them, the SIMOX method is a method of ion-implanting oxygen into a Si substrate at a high concentration to form an SOI (Si active layer on a SiO ₂ insulating layer). In this way, oxygen is ion-implanted at a high concentration. As a result, crystal defects such as dislocations generated in the Si active layer limit the performance of devices (for example, CMOS) formed using this Si active layer. On the other hand, in the bonded wafer method, one or two of the two wafers are thermally oxidized, then the two wafers are bonded to each other, and one wafer is thinned to form an SOI. Techniques such as grinding and polishing are used as the technique for thinning the wafer, but the current mechanical polishing method has a limitation in polishing precision, and the film thickness is about 1 μm ± 10% and the film thickness is It was possible to obtain only a Si active layer with a large variation in

In order to solve this point, a method of manufacturing an SOI substrate shown in FIG. 4 has been conventionally proposed (Japanese Patent Laid-Open No. 5-23).
4985). In this manufacturing method, a high-concentration B layer 2 is formed by implanting boron (B) ions into a Si substrate 1 that is a seed wafer so that a concentration peak appears at a certain depth from the surface (see FIGS. b)), on the other hand, the insulating layer 6 is formed on the supporting substrate 7 of another Si substrate also called a handle wafer (FIGS. 4C and 4D), and the Si active layer 1a and the upper Si active layer 1a of the high concentration B layer 2 are formed. Both substrates 1 and 7 are superposed on each other via the insulating layer 6 and heat-treated to bond them together (see FIG.
(E)), the back surface of the bonded Si substrate 1 is mechanically ground to the vicinity of the high-concentration B layer 2 to form the Si substrate 1 into the Si thin film 1.
b (FIG. 4 (f)), and then the Si thin film 1b is removed by using an etching solution having a lower etching rate as the B concentration is higher (FIG. 4 (g)). By removing the B layer 2, the insulating layer 6 and the Si active layer 1a are left on the supporting substrate 7. According to this manufacturing method, an Si active layer having excellent surface smoothness and film thickness uniformity can be formed.

[0004]

However, in the above-described conventional method for manufacturing an SOI substrate, since the interface between the Si active layer and the insulating layer is the bonding surface of the two substrates, S
There is a drawback that the characteristics of the interface between the i active layer and the insulating layer are not good. If the B ion concentration in the high-concentration B layer 2 is increased in order to increase the selective etching ratio, the high-concentration B layer 2
There is a problem that crystal defects such as dislocations occur in the layer 2. Furthermore, since the diffusion coefficient of B in Si is relatively large, high concentration B can be obtained by high temperature heat treatment during wafer bonding.
B in the layer 2 diffuses into the Si active layer 1a, and the TTV (Total Thickness Variation) of the film of the Si active layer is set to 1
There was a problem that it was difficult to set it to 0% or less.

An object of the present invention is to obtain a film thickness variation (TT
It is an object of the present invention to provide a method for manufacturing an SOI substrate in which an Si active layer having a small V) and a uniform Si active layer and having a small surface roughness is formed on an insulating layer. Another object of the present invention is that the characteristics of the interface between the Si active layer and the insulating layer are good, and the impurity Si caused by the high temperature heat treatment during wafer bonding is used.
An object of the present invention is to provide a method for manufacturing an SOI substrate with less diffusion into the active layer.

[0006]

The inventors of the present invention have proposed the conventional S
As a result of intensive studies to solve the above-mentioned problems of the method for manufacturing an OI substrate, in the conventional method for manufacturing an SOI substrate, the diffusion coefficient in Si is smaller than B, and the diffusion coefficient in Si is smaller than that in Si in the conventional high concentration B layer. The present invention has been achieved by using a layer containing As or Sb at a high concentration that can increase the etching rate.

(A) First SOI Substrate Manufacturing Method As shown in FIG. 1, the first SOI substrate manufacturing method according to the first embodiment of the present invention includes a first SOI substrate containing As or Sb of 1 × 10 ¹⁸ / cm ³ or more.
A step of forming the Si active layer 14 having an impurity concentration of less than 1 × 10 ¹⁸ / cm ³ on the Si substrate 11 (FIG. 1A), and a step of forming the insulating layer 16 on the Si active layer 14 ( FIG. 1B), a step of bonding the main surface of the support substrate 17 onto the insulating layer 16 (FIGS. 1C and 1D), and the first Si
A step of removing most of the substrate 11 to form a Si thin film 11a having a thickness of 5 μm or less (FIG. 1 (e)).
It is characterized by including a step of removing a with a predetermined chemical etching solution to leave the insulating layer 16 and the Si active layer 14 on the main surface of the supporting substrate 17 (FIG. 1F).

The first Si substrate 11 is an n ⁺ type Si single crystal substrate containing As or Sb having a relatively small diffusion coefficient in Si of 1 × 10 ¹⁸ / cm ³ or more. The concentration of As or Sb is preferably 10 ¹⁹ / cm ³ or more. This S
If the As or Sb concentration of the i substrate 11 and the impurity concentration of the Si active layer 14 are not the above values, a sufficient etching selection ratio cannot be obtained. When As and Sb are compared as impurities contained in the Si substrate 11, As is preferable because As has a higher solid solubility in Si and a smaller diffusion coefficient than Sb. The Si active layer 14 is made of B, P, As, Sb.
It may be a so-called “non-doped” layer having an impurity concentration of less than 1 × 10 ¹⁸ / cm ³ and containing no impurities. The thickness of the Si active layer is formed in the range of 3 nm to 3 μm depending on the application of the SOI substrate. As a method of forming this Si active layer, a CVD (chemical vapor deposition) method, MB
There is a method of performing epitaxial growth by an E (Molecular Beam Epitaxial Growth) method or the like, or a method of heat-treating the Si substrate 11 to outwardly diffuse As or Sb in Si of the substrate surface layer.

Insulating layer 16 formed on Si active layer 14
Is a SiO ₂ layer and is formed by thermal oxidation or a CVD method. In the case of thermal oxidation, As or S in the Si substrate 11
The thermal oxidation temperature is preferably 950 ° C. or lower in order to prevent b from being thermally diffused into the Si active layer 12. 700-900
A temperature of about ° C is more preferable. In order to bond the main surface of the supporting substrate 17 onto the insulating layer 16, the surfaces of both substrates 11 and 17 should be S.
After cleaning and activation with a cleaning liquid such as C1 and the like, they are heat-laid on each other and fixed. The heat treatment temperature is preferably 950 ° C. or lower for the same reason as thermal oxidation, 700 to 900 ° C.
The degree is more preferable. The first Si substrate 11 is ground and polished to be removed to form a Si thin film 11a having a high concentration of As or Sb. The Si thin film 11a has a thickness of 5 μm or less, preferably 1 μm.
m or less. The final flatness of the Si active layer is improved as the thickness is reduced and the variation in the thickness is reduced. S
By completely removing the i thin film 11a with a predetermined chemical etching solution, an SOI substrate having the Si active layer 14 as a final active layer is obtained. Examples of the predetermined chemical etching solution include a mixed solution of hydrofluoric acid-nitric acid-acetic acid.
Si single crystal with an impurity concentration of 1 × 10 ¹⁷ / cm ³ or less and 1
An etching selection ratio of 1: 100 or more can be obtained with a Si single crystal of × 10 ¹⁹ / cm ³ or more. The final Si
The active layer is thermally oxidized to form a SiO ₂ film, removal of the SiO ₂ film by hydrofluoric acid treatment, it can be thinner the active layer. Moreover, after forming the Si active layer 14, it is preferable to polish the layer surface in a depth range of 5 to 200 nm because the surface roughness is further improved.

(B) Second SOI Substrate Manufacturing Method As shown in FIG. 2, the second SOI substrate manufacturing method according to the second embodiment of the present invention has a second Si substrate having an impurity concentration of less than 1 × 10 ¹⁸ / cm ³ .
A step of forming an impurity-rich Si layer 19 containing As or Sb of 1 × 10 ¹⁸ / cm ³ or more on the substrate 18 (see FIG.
(A)), a step of forming the Si active layer 14 having an impurity concentration of less than 1 × 10 ¹⁸ / cm ³ on the impurity-rich Si layer 19 (FIG. 2B), and insulating on the Si active layer 14. The step of forming the layer 16 (FIG. 2C), the insulating layer 16
A step of bonding the main surface of the support substrate 17 on top (see FIG.
(D), (e)), the entire second Si substrate 18 and a part of the impurity-rich Si layer 19 are removed to remove S having a thickness of 5 μm or less.
a step of forming the i thin film 19a (FIG. 3 (f)), and a step of removing the Si thin film 19a with a predetermined chemical etching solution to leave the insulating layer 16 and the Si active layer 14 on the main surface of the supporting substrate 17. (FIG. 2 (g)).

The second Si substrate 18 has an impurity concentration of B, P, As, Sb, etc. less than 1 × 10 ¹⁸ / cm ³ .
If the impurity concentration is less than this value, the Si substrate 18 is n
Type Si single crystal substrate or p type Si single crystal substrate. The impurity-rich Si layer 19 is the first S of FIG.
It corresponds to the i substrate 11. Impurity rich layer 19
Impurities are so-called "dopants". As a method for forming the impurity-rich Si layer 19, there are an epitaxial growth method such as a thermal diffusion method, a CVD method, and an MBE method, in addition to the ion implantation method. After forming the impurity-rich Si layer 19, it is preferable to polish the layer surface in the depth range of 5 to 200 nm because the surface roughness is further improved.

(C) Third SOI Substrate Manufacturing Method As shown in FIG. 3, the third SOI substrate manufacturing method according to the third embodiment of the present invention has an impurity concentration of less than 1 × 10 ¹⁸ / cm ³ of the third Si substrate.
Embedded Si embedded in the substrate 21 to a predetermined depth from the substrate surface so as to contain As or Sb of 1 × 10 ¹⁸ / cm ³ or more.
The step of forming the layer 22 (FIGS. 3A and 3B) and the step of forming the insulating layer 16 on the Si active layer 21a of the third Si substrate 21 above the embedded Si layer 22 (FIG. 3A).
(C)), a step of bonding the main surface of the support substrate 17 onto the insulating layer 16 (FIGS. 3D and 3E), and embedded Si
Third Si substrate 21 and buried Si layer 2 below layer 22
A step of removing a part of 2 to form a Si thin film 22a having a thickness of 5 μm or less (FIG. 3 (f)); A step of leaving the insulating layer 16 and the Si active layer 21a (see FIG.
(G)) is included. Buried Si layer 22
Is a high concentration of As or Sb ions in the third Si substrate 2
After being injected into the inside of No. 1, it is formed by annealing treatment.
The embedded Si layer 22 has a predetermined depth from the surface of the Si substrate 21, for example, 500 nm to 3 μm in a region of 3 nm to 3 μm.
Formed with a thickness of.

[0013]

In the prior art, when a high-concentration B layer in which B having a large diffusion coefficient in Si is ion-implanted is used as an etching stop layer, the surface roughness is large, and further, thermal oxidation for forming an insulating layer or after bonding is performed. However, in the present invention, the diffusion coefficient in B is smaller than B or the flatness of the layer surface after chemical etching is poor and the uniformity of the layer thickness is poor. Since a Si substrate or Si layer containing a high concentration of Sb is used in place of the high concentration B layer, A
In order to keep the concentration profile of s or Sb steep,
Thickness variation of active layer after chemical etching (TTV)
Is small, and the flatness of the layer surface is good.

[0014]

Embodiments of the present invention will now be described in detail with reference to the drawings. Example 1 First, an SOI substrate obtained by the first manufacturing method will be described with reference to FIG. As shown in FIGS. 1 (a) to 1 (f), for example, a first wafer containing As having a (100) plane orientation of 1 × 10 ²⁰ / cm ³ becomes a seed wafer.
CVD of non-doped Si active layer 14 on Si substrate 11
Formed by the method. Specifically, in a H ₂ atmosphere, 3 Tor
After pretreatment at 900 ° C for 3 minutes at r, S as a reaction gas
An iH ₄ gas or a Si ₂ H ₆ gas was used to grow at a temperature of 700 ° C. to form a Si active layer 14. The thickness of the Si active layer 14 was 500 nm in this example.

Next, the surface of the Si active layer 14 is cut to a depth of 1
After polishing to 00 nm, it was thermally oxidized at 900 ° C. in a water vapor atmosphere to form a SiO ₂ insulating layer 16 on the Si active layer 14. After cleaning the Si substrate 11 and another supporting substrate 17 to be the handle wafer with the cleaning liquid of SC1 to activate the bonding surface of both substrates, the insulating layer 16 is superposed on the main surface of the supporting substrate 17, and at 900 ° C. Heat treated.

Next, the Si substrate 11 was ground and polished from the surface opposite to the bonding surface of the Si substrate 11 to remove most of the thin film, and a thin film of about 1 μm was left. The Si thin film 11a is removed by chemical etching with a mixed solution of hydrofluoric acid-nitric acid-acetic acid, leaving the insulating layer 16 and the Si active layer 14 on the main surface of the supporting substrate 17 as shown in FIG. An SOI substrate was obtained. In this example, S with high As concentration
The selective etching ratio between the i substrate 11 and the Si active layer 12 is
I was able to get about 1: 150. This SOI substrate is S
The film thickness of the i active layer 14 was 200 nm, TTV was 3% of the film thickness, and the surface roughness was 0.2 nm.

<Embodiment 2> Next, an SOI substrate obtained by the second manufacturing method will be described with reference to FIG. As shown in FIGS. 2A to 2G, for example, P in the (100) plane direction, which becomes the seed wafer, is 1 × 10 ¹⁵ / cm ^3.
An impurity-rich Si layer 19 containing 1 × 10 ²⁰ / cm ³ of As and a non-doped Si active layer 1 on the second Si substrate 18 containing
4 was formed by the CVD method. Specifically, H ₂
After pretreatment in an atmosphere at 10 Torr at 900 ° C. for 3 minutes, AsH ₃ gas and SiH ₄ gas or As as reaction gases
After forming the impurity-rich Si layer 19 at a temperature of 700 ° C. by using H ₃ gas and Si ₂ H ₆ gas, Si active layer 1 is formed at a temperature of 700 ° C. by using SiH ₄ gas or Si ₂ H ₆ gas.
4 was formed. In this example, the thickness of the impurity-rich Si layer 19 was 1.5 μm.

Thereafter, in the same manner as in Example 1, the Si active layer 1
4, an insulating layer 16 is formed on the insulating layer 16 and the insulating layer 16 is superposed on the main surface of the supporting substrate 17 and heat-treated at 900 ° C.
The Si substrate 18 is ground and polished from the surface opposite to the bonding surface of the substrate 18 to remove most of it and reduce the thickness to about 1 μm.
The Si thin film 19a of m was left. This Si thin film 19a was removed by chemical etching in the same manner as in Example 1,
As shown in (g), the insulating layer 16 is formed on the main surface of the supporting substrate 17.
An SOI substrate in which the Si active layer 14 and the Si active layer 14 were left was obtained. This S
In the OI substrate, the film thickness of the Si active layer 14 was 500 nm, TTV was 3% of the film thickness, and the surface roughness was 0.2 nm.

<Embodiment 3> Furthermore, an SOI substrate obtained by the third manufacturing method will be described with reference to FIG. As shown in FIGS. 3A to 3G, first, for example, P in the (100) plane direction which becomes the seed wafer is 1 × 10 ¹⁵ / c.
As ions were implanted into the ^third Si substrate 21 containing m ³ at an accelerating voltage of 750 keV and a dose amount of 1 × 10 ¹⁶ / cm ² . The Si substrate 21 is placed in a mixed gas atmosphere of Ar and O _{2 in} an atmosphere of 11
Annealing was performed at 00 ° C. to change the region into which As ions were implanted into the buried Si layer 22. This embedded Si layer 2
No. 2 was 300 nm from the substrate surface and had a thickness of 1 μm. Two
1a is a Si active layer on the front surface side of the substrate.

Thereafter, in the same manner as in Example 1, the Si active layer 2
An insulating layer 16 is formed on 1a, and the insulating layer 16 is superposed on the main surface of the supporting substrate 17 and heat-treated at 900 ° C.
The Si substrate 21 is ground and polished from the surface opposite to the bonding surface of the i substrate 21 to remove most of the Si substrate 21 to form a thin film.
The Si thin film 22a of μm was left. This Si thin film 22a is removed by chemical etching in the same manner as in Example 1,
As shown in (g), the insulating layer 16 is formed on the main surface of the supporting substrate 17.
An SOI substrate having the Si active layer 21a and the Si active layer 21a was obtained. In this SOI substrate, the Si active layer 21a has a thickness of 150 nm, the TTV is 10% of the thickness, and the surface roughness is 0.5 nm.
Met.

[0021]

As described above, according to the method of manufacturing an SOI substrate of the present invention, the Si substrate or Si layer containing As or Sb having a diffusion coefficient in Si smaller than B in a high concentration is used as the conventional high concentration. Since it is used in place of the B layer, the profile of the concentration of As or Sb can be kept steep even in the high temperature heat treatment as compared with the conventional method, so that the variation in thickness (TTV) of the Si active layer after chemical etching is small, Moreover, the flatness of the layer surface is improved. Further, since the surface roughness of the bonded surface is small, the probability of occurrence of voids in the bonded surface can be reduced. Further, since the bonding surface is not the interface between the Si active layer and the insulating layer, the characteristics of the interface between the Si active layer and the insulating layer are good, and the impurities caused by the high temperature heat treatment during wafer bonding to the Si active layer Little diffusion, super L
A semiconductor integrated circuit substrate suitable for SI / CMOS can be obtained.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a method of manufacturing a first SOI substrate of the present invention in the order of steps.

2A to 2D are cross-sectional views showing a method of manufacturing a second SOI substrate of the present invention in the order of steps.

3A to 3C are cross-sectional views showing a method of manufacturing a third SOI substrate of the present invention in the order of steps.

FIG. 4 is a cross-sectional view showing a method of manufacturing a conventional SOI substrate in the order of steps.

[Explanation of symbols]

 11 First Si Substrate 11a Si Thin Film 14 Si Active Layer 16 Insulating Layer 17 Supporting Substrate 18 Second Si Substrate 19 Impurity Rich Si Layer 19a Si Thin Film 21 Third Si Substrate 21a Si Active Layer 22 Embedded Si Layer 22a Si Thin Film

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[Procedure amendment]

[Submission date] December 11, 1995

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Correction content]

[Claims]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0004

[Correction method] Change

[Correction content]

[0004]

However, in the above-described conventional method for manufacturing an SOI substrate, since the interface between the Si active layer and the insulating layer is the bonding surface of the two substrates, S
There is a drawback that the characteristics of the interface between the i active layer and the insulating layer are not good. If the B ion concentration in the high-concentration B layer 2 is increased in order to increase the selective etching ratio, the high-concentration B layer 2
There is a problem that crystal defects such as dislocations occur in the layer 2. Furthermore, since the diffusion coefficient of B in Si is relatively large, high concentration B can be obtained by high temperature heat treatment during wafer bonding.
B in the layer 2 diffuses into the Si active layer 1a,
It is difficult to suppress the thickness variation of the active layer to 10% or less
There is a problem that is.

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0005

[Correction method] Change

[Correction content]

An object of the present invention, provides a method for producing an SOI substrate to form a Si active layer with Baratsu Kiga smaller have a uniform Si active layer and small surface roughness of the film thickness on the insulating layer To do. Another object of the present invention is to provide a method for manufacturing an SOI substrate, which has good characteristics of the interface between the Si active layer and the insulating layer and has less diffusion of impurities into the Si active layer due to high temperature heat treatment during wafer bonding. To do.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0007

[Correction method] Change

[Correction content]

(A) First SOI Substrate Manufacturing Method As shown in FIG. 1, the first SOI substrate manufacturing method according to the first embodiment of the present invention includes a first SOI substrate containing As or Sb of 1 × 10 ¹⁸ / cm ³ or more.
Impurity concentration on Si substrate 11 is less than 1 × 10 ¹⁸ / cm ^3.
Or a step of forming a Si active layer 14 containing no impurities (FIG. 1A), a step of forming an insulating layer 16 on the Si active layer 14 (FIG. 1B), Layer 1
And a step of attaching the main surface of the support substrate 17 onto the substrate 6 (see FIG.
(C), (d), a step of removing most of the first Si substrate 11 to form a Si thin film 11a having a thickness of 5 μm or less (FIG.
(E)), the Si thin film 11a is removed by a predetermined chemical etching solution to remove the insulating layer 16 and Si on the main surface of the supporting substrate 17.
The method is characterized by including a step of leaving the active layer 14 (FIG. 1F).

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction content]

(B) Second SOI Substrate Manufacturing Method As shown in FIG. 2, the second SOI substrate manufacturing method according to the second embodiment of the present invention has a second Si substrate having an impurity concentration of less than 1 × 10 ¹⁸ / cm ³ .
A step of forming an impurity-rich Si layer 19 containing As or Sb of 1 × 10 ¹⁸ / cm ³ or more on the substrate 18 (see FIG.
(A)), on the impurity-rich Si layer 19, the impurity concentration is less than 1 × 10 ¹⁸ / cm ³ or no impurity is contained.
Forming a have Si active layer 14 and (FIG. 2 (b)), forming an insulating layer 16 on the Si active layer 14 (FIG. 2 (c)), the supporting substrate 17 on the insulating layer 16 And the step of bonding the main surfaces of the second Si (FIGS. 2D and 2E).
A step of removing the entire substrate 18 and a part of the impurity-rich Si layer 19 to form a Si thin film 19a having a thickness of 5 μm or less (FIG. 3 (f)), and removing the Si thin film 19a with a predetermined chemical etching solution. The insulating layer 16 on the main surface of the supporting substrate 17.
And the step of leaving the Si active layer 14 (FIG. 2 (g)).

[Procedure correction 6]

[Document name to be amended] Statement

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[Correction method] Change

[Correction content]

[0012] (c) a third method of the SOI substrate manufacturing the third SOI substrate manufacturing method of the present invention, as shown in FIG. 3, or the impurity concentration is less than 1 × 10 ¹⁸ / cm ³ The
Is a step of forming a buried Si layer 22 in which a third Si substrate 21 containing no impurities is buried to a predetermined depth from the substrate surface so as to contain As or Sb at 1 × 10 ¹⁸ / cm ³ or more (see FIG. a) and (b)), the insulating layer 1 is formed on the Si active layer 21a of the third Si substrate 21 above the embedded Si layer 22.
6 (FIG. 3C), and a step of bonding the main surface of the support substrate 17 onto the insulating layer 16 (FIG. 3C).
(D), (e)), the third S below the buried Si layer 22.
a step of removing a part of the i substrate 21 and the embedded Si layer 22 to form a Si thin film 22a having a thickness of 5 μm or less (see FIG.
(F)), the Si thin film 22a is removed by a predetermined chemical etching solution to remove the insulating layer 16 and Si on the main surface of the supporting substrate 17.
It is characterized by including a step of leaving the active layer 21a (FIG. 3 (g)). The embedded Si layer 22 is As ions or S
It is formed by implanting a high concentration of b ions into the inside of the third Si substrate 21 and then performing an annealing treatment. This embedded Si layer 2
2 is a predetermined depth from the surface of the Si substrate 21, for example, 3 nm to
It is formed in a region of 3 μm with a thickness of 500 nm to 3 μm.

[Procedure Amendment 7]

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[0013]

In the prior art, when a high-concentration B layer in which B having a large diffusion coefficient in Si is ion-implanted is used as an etching stop layer, the surface roughness is large, and further, thermal oxidation for forming an insulating layer or after bonding is performed. However, in the present invention, the diffusion coefficient in B is smaller than B or the flatness of the layer surface after chemical etching is poor and the uniformity of the layer thickness is poor. Since a Si substrate or Si layer containing a high concentration of Sb is used in place of the high concentration B layer, A
In order to keep the concentration profile of s or Sb steep,
Small-out Baratsu the thickness of the active layer after the chemical etching,
Moreover, the flatness of the layer surface is improved.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

[0021]

As described above, according to the method of manufacturing an SOI substrate of the present invention, the Si substrate or Si layer containing As or Sb having a diffusion coefficient in Si smaller than B in a high concentration is used as the conventional high concentration. since used in place of the B layer, since even if the high temperature heat treatment as compared with conventional methods kept steep profile of the concentration of as or Sb,-out Baratsu thickness of the Si active layer after the chemical etching is small and The flatness of the layer surface becomes good. Also, since the surface roughness of the bonding surface is small,
It is possible to reduce the probability of occurrence of voids on the bonding surface. Further, since the bonding surface is not the interface between the Si active layer and the insulating layer, the characteristics of the interface between the Si active layer and the insulating layer are good, and the impurities caused by the high temperature heat treatment during wafer bonding to the Si active layer Little diffusion, VLSI / C
A semiconductor integrated circuit substrate suitable for MOS can be obtained.

Claims (3)

[Claims] 1. An impurity concentration of 1 × 10 ¹⁸ / c on a first Si substrate (11) containing 1 × 10 ¹⁸ / cm ³ or more of As or Sb.
a step of forming a Si active layer (14) of less than m ³ ; a step of forming an insulating layer (16) on the Si active layer (14); and a step of forming a support substrate (17) on the insulating layer (16). A step of bonding the main surfaces, a step of removing most of the first Si substrate (11) to form a Si thin film (11a) having a thickness of 5 μm or less, and a step of etching the Si thin film (11a) with a predetermined chemical etching solution. The insulating layer (16) and the S are removed on the main surface of the supporting substrate (17).
and a step of leaving an i active layer (14). 2. As or Sb on the second Si substrate (18) having an impurity concentration of less than 1 × 10 ¹⁸ / cm ³ and 1 × 10 ¹⁸ / cm.
A step of forming an impurity-rich Si layer (19) containing ³ or more, and an impurity concentration of 1 × 10 on the impurity-rich Si layer (19).
A step of forming a Si active layer (14) of less than ¹⁸ / cm ^3, a step of forming an insulating layer (16) on the Si active layer (14), and a support substrate (17) on the insulating layer (16). ) Bonding the main surfaces of the second Si substrate (18) and the whole of the second Si substrate (18) and the impurity-rich Si
By removing a part of the layer (19), a Si thin film (19
a) and removing the Si thin film (19a) with a predetermined chemical etching solution to form the insulating layer (16) and the S on the main surface of the supporting substrate (17).
and a step of leaving an i active layer (14). Wherein Umakon as impurity concentration containing As or Sb 1 × 10 ¹⁸ / cm ³ or more at a predetermined depth from the substrate surface during the 3Si substrate of less than ^{1 × 10 18 / cm 3 (} 21) A step of forming a buried Si layer (22), and S of the third Si substrate (21) above the buried Si layer (22).
a step of forming an insulating layer (16) on the i active layer (21a), a step of bonding the main surface of the support substrate (17) on the insulating layer (16), and a layer lower than the embedded Si layer (22) A step of removing a part of the third Si substrate (21) and the embedded Si layer (22) to form a Si thin film (22a) having a thickness of 5 μm or less, and the Si thin film (22a) with a predetermined chemical etching solution. The insulating layer (16) and the S are removed on the main surface of the supporting substrate (17).
and a step of leaving the i active layer (21a).