JPH08147893A - Digital signal processing method and device therefor - Google Patents

Abstract

PURPOSE: To restrain an error propagation by recording a digital signal on a recording medium while converting it into NRZI codes without using a pre- coder and applying Viterbi decoding to a reproducing signal. CONSTITUTION: Decoding errors to be generated in Viterbi decoding circuits for NRZI codes 12a, 12b are always even number. Moreover, also in the output signal of a Viterbi decoding circuit for interleaved NRZI code 10 in which these decoding signals are time-multiplexed, decoding errors become even number. Then, when the output is inputted to a pre-coder 14, error propagations are generated in the output of the pre-coder 14 by the decoding errors of odd number-th and error propagations are stopped by decoding errors of even number-th. Thus, there is not a fear that endless error propagations are generated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal processing method and apparatus for recording a digital signal and reproducing and decoding the digital signal, and more particularly to an apparatus for detecting the reproduced signal by Viterbi decoding. Related to effective technology.

[0002]

2. Description of the Related Art The transfer characteristic of a magnetic recording system is a differential type,
Further, since the rotary transformer is used for exchanging the signal between the magnetic head and the recording / reproducing circuit, the low frequency component of the signal cannot be recorded / reproduced.

For this reason, an operation called modulation or recording coding for converting a signal to be recorded to reduce low frequency components is performed.

Up to now, modulation systems with various characteristics have been proposed.

Among these, Partial Response (PR) Class IV
There is a modulation scheme called NRZI or PR (1, -1) belonging to the same category, and a modulation scheme called interleaved NZRI or PR (1,0, -1) also belonging to PR class IV.

These codes are described in, for example, the following document I.

I Yoshizumi Eto et al., "Digital Video Recording Technology" (August 1990, Nikkan Kogyo Shimbun, p.46-4
8) As described above, since the magnetic recording / reproducing system has a differential characteristic, when data is recorded / reproduced, the signal waveform spreads and intersymbol interference occurs.

The PR system can be said to be a system for positively utilizing this intersymbol interference to shape the power spectrum of the code so as to be suitable for the transfer characteristics of the transmission path.

The impulse response characteristic f (D) of the partial response class IV is expressed by the following (1).

[0010]

F (D) = (1-D) (1 + D) ** n
(1) (D: 1-bit delay operator; **: exponentiation) n is an integer value of 0 or more, and when n = 0, PR (1,-
1), PR (1,0, -1) when n = 1 (simply PR4
It is also called).

The frequency characteristic of PR (1, -1) is suitable for limiting low frequency components, which have a small gain in the low frequency region and are difficult to record and reproduce.

The frequency characteristic of PR (1, 0, -1) has a band-pass type characteristic of suppressing high frequency components in addition to the low frequency region, and has an effect of attenuating high frequency components of noise.

FIG. 5 shows a conventional P belonging to PR class IV.
It is a block diagram showing a schematic structure of a magnetic recording and reproducing system using R (1, 0, -1).

In FIG. 5, first, the recording is to be made. "
Digital signals represented by 0 "and" 1 "are input from the recording signal input terminal 1, passed through the NRZI encoder 2, and converted into NRZI code.

The NRZI code is a code whose polarity is inverted when "1" appears in the recording signal.

The polarity reversal here means that the signal value is "1".
To "0" or from "0" to "1".

The NRZI encoder 2 comprises a 1-bit delay element 3 and a "modulo 2" digital adder 4.

The NRZI encoder 2 has a characteristic expressed by 1 / (1 + D).

Next, the NRZI code is input to the precoder 14.

In the PR system, the reproduced waveform includes intersymbol interference as described above, and it is necessary to remove the intersymbol interference in order to reproduce the original data.

The precoder 14 is for adding in advance to the NRZI code the intersymbol interference opposite to that given by the recording / reproducing system.

The precoder 14 is a circuit having the same configuration as the NRZI encoder 2 and its characteristic is represented by 1 / (1 + D).

In general, the NRZI encoder 2 and the precoder 14 may be collectively referred to as a precoder, but in this specification, these are distinguished and expressed.

The output signal of the precoder 14 is sent to the recording / reproducing system 5, recorded on the magnetic medium 7 by the magnetic head 6a, and reproduced by the magnetic head 6b.

It is known that the recording / reproducing system 5 has a (1-D) differential characteristic.

The reproduced signal is input to the PR equalizer 8.

The PR equalizer 8 is a circuit having a (1 + D) characteristic, which includes a 1-bit delay element 3 and an adder 9.

Together with the characteristic (1-D) of the recording / reproducing system 5, it becomes (1-D) (1 + D), and the impulse response f (D) of PR class IV is realized.

The output of the PR equalizer 8 is the data discrimination circuit 31.
Is input to

Since the PR equalizer 8 uses the adder 9, its output is a multilevel signal, and "1", "0", "-1".
Is a three-valued signal.

The data discriminating circuit 31 converts the addition in the PR equalizer 8 into an output signal in the case of "modulo 2" addition. If the input signal is "0", it is "0".
If "1" or "-1", "1" is output.

Since addition and subtraction are equivalent in the operation of "modulo 2", the entire characteristic from the NRZI encoder 2 to the data discriminating circuit 31 becomes 1, and the recorded signal can be obtained.

However, a system requiring replacement of the magnetic medium 7, such as a VTR (Video Tape), is used.
Recorder) and MT (Magnetic) for computers
In the Tape device, the format of the recording signal on the magnetic medium 7 is determined by the standard or the like.

Therefore, in a system decided to record the output signal of the NRZI encoder 2 on the magnetic medium 7,
The precoder 14 cannot be placed between the NRZI encoder 2 and the recording / reproducing system 5.

Therefore, as a conventional technique for applying the PR system to a recording system without using a precoder, for example, Japanese Patent Laid-Open No. Hei.
No. 325425, “Code detecting device”, Japanese Patent Application Laid-Open No. 5-307837, “Digital signal recording / reproducing system and device”, Japanese Patent Application No.
"Digital signal reproducing system and digital signal recording / reproducing apparatus" described in No. 221950 are known.

In addition to the PR system, the S / N ratio (Sig
There is a technique called Viterbi decoding or maximum likelihood decoding that is used as a technique effective for improving the nal to noise ratio.

Regarding this method, for example, the above-mentioned document I is used.
P. 72-84.

Viterbi decoding utilizes the fact that reproduced signals have correlation due to intersymbol interference, and improves the S / N ratio by using the total power of signal components for decoding.

In the channel of the memory length L, 2 ** L (** represents a power) different combinations of intersymbol interference occur, and each combination is called a state.

Viterbi decoding is decoding by selecting the most probable state from the reproduced signal at each time.

Since the Viterbi decoding circuit has different combinations of inter-code interference depending on the recording code used, the number of registers required and the configuration of the arithmetic unit are various, and the circuit scale is also various.

Among them, it is known that the Viterbi decoding circuit for the NRZI code or the interleaved NRZI code can be realized by a relatively small scale circuit.

[0043]

The frequency characteristic of PR class IV is close to the characteristic of the magnetic recording system and is a technique effective for improving the S / N ratio.

However, since the signals recorded on the medium differ depending on the presence or absence of the precoder on the recording side, the VTRs and computer MTs that require medium compatibility have PRs that have not been adopted in the standard.
There was a problem that the method could not be used.

On the other hand, since the magnetic recording / reproducing system of FIG. 5 is a linear system, the characteristics of the system do not change even if the order of blocks is changed.

Therefore, the precoder 14 can be placed after the data discriminating circuit 31.

However, if an error occurs even in one bit in the recording / reproducing system 5, the error may propagate infinitely due to the feedback loop in the precoder 14, and it is not used in an actual device.

Further, Japanese Patent Laid-Open No. 5-325425, which is known as a conventional technique for applying the PR system without using a precoder, is known.
In the "code detecting device" described in the publication, since the property of the interleaved NRZI code is used, PR
It is applicable only to (1, 0, -1), and the decoding circuit is complicated.

Further, in the "digital signal recording / reproducing system and apparatus" described in Japanese Patent Laid-Open No. 307837/1993, signal processing is performed by using the PR channel output signal as a multilevel signal, so that it has a high-order response characteristic. When applied to the PR system, there is a problem in that the multi-level discrimination circuit and the arithmetic circuit become complicated.

Further, in Japanese Patent Application No. 5-221950, "Digital signal reproducing system and digital signal recording / reproducing apparatus", the reproducing side includes an NRZI encoding circuit, so that it is applied to recording / reproducing of NRZI code. Then, the reproduction side will have an NRZI encoding circuit and a decoding circuit,
There is a problem that the device becomes complicated.

In addition, the Viterbi decoding is S / S along with the PR system.
This is an effective technique for improving the N ratio, but there is a problem that the circuit scale becomes enormous depending on the recording code used.

The present invention has been made to solve the above-mentioned problems of the prior art, and an object of the present invention is to provide a digital signal processing method and apparatus thereof, in which error propagation is performed while a precoder is not required on the recording side. PR that can limit
An object of the present invention is to provide a technique capable of applying the method to a magnetic recording / reproducing system.

Another object of the present invention is to apply a Viterbi decoding circuit which can be realized by a small-scale circuit to a magnetic recording / reproducing system using a recording code of NRZ or NRZI recording in a digital signal processing method and its apparatus. It is to provide the technology that can.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[0055]

Of the inventions disclosed in the present application, a representative one will be briefly described below.
It is as follows.

(1) In a digital signal processing method for converting a digital signal into an NRZI code, recording it on a recording medium, and obtaining a decoded signal of the digital signal from a reproduced signal reproduced from the recording medium, reproduction from the recording medium The signal is subjected to signal processing whose frequency characteristic is represented by (1 + D) (D is a 1-bit delay operator) to obtain a multilevel signal, and the multilevel signal is subjected to Viterbi decoding of an interleaved NRZI code, It is characterized in that the decoded signal of the digital signal is obtained by taking the exclusive OR of the Viterbi decoded signal and the decoded signal of the digital signal one bit before.

(2) In a digital signal processing method of recording a digital signal on a recording medium and obtaining a decoded signal of the digital signal from the reproduced signal reproduced from the recording medium, an NRZI code is applied to the reproduced signal from the recording medium. Is subjected to Viterbi decoding and the exclusive OR of the Viterbi decoded signal and the decoded signal of the digital signal one bit before is obtained to obtain the decoded signal of the digital signal.

(3) In a digital signal processing device for converting a digital signal into an NRZI code, recording it on a recording medium, and obtaining a decoded signal of the digital signal from a reproduced signal reproduced from the recording medium, reproduction from the recording medium A signal is input, an equalization circuit that outputs a multilevel signal by performing signal processing whose frequency characteristic is represented by (1 + D) (D is a 1-bit delay operator), and a multilevel signal from the equalization circuit are A Viterbi decoding circuit for the input interleaved NRZI code, and an exclusive OR of the Viterbi decoding signal from the Viterbi decoding circuit and the decoded signal of the digital signal one bit before are output as the decoded signal of the digital signal. And a precoder.

(4) In a digital signal processing device for recording a digital signal on a recording medium and obtaining a decoded signal of the digital signal from the reproduced signal reproduced from the recording medium, the NRZ to which the reproduced signal from the recording medium is input.
It has a Viterbi decoding circuit for I code, and a precoder for taking the exclusive OR of the Viterbi decoded signal from the Viterbi decoding circuit and the decoded signal of the digital signal one bit before and outputting the decoded signal of the digital signal. It is characterized by

[0060]

According to the means (1) or (3), the digital signal is converted into the NRZI code and recorded on the recording medium without using the precoder, and the reproduced signal is subjected to the Viterbi decoding of the interleaved NRZI code. After that, it is input to the PR equalizer and the digital signal is decoded.

According to the means (2) or (4),
A digital signal is directly recorded on a recording medium without using a precoder, the reproduced signal is subjected to Viterbi decoding of an NRZI code, and then input to a PR equalizer to decode the digital signal.

Next, a Viterbi decoding circuit for interleaved NRZI code will be described.

It is known that the interleaved NRZI code can be handled as an NRZI code when every other time slot is viewed.

Therefore, the interleaved NRZI code can be decoded using the Viterbi decoding circuit for the NRZI code.

The Viterbi decoding circuit for NRZI code will be described.

FIG. 6 is a diagram showing a recording / reproducing system of the NRZI code, and is a diagram showing a schematic configuration of a digital signal recording / reproducing apparatus to which the NRZI code is applied.

The recording signal (ak) is converted into the NRZI code (bk) by the precoder 2.

The NRZI code (bk) becomes a reproduction signal (zk) through the recording / reproduction system 5 having the characteristic of (1-D), and the noise (nk) added to this is the actual reproduction signal. (Yk).

The state (sk) at time (k) is changed to (sk = b
k), the state (sk) at time (k) and the time (k)
+1) NRZI code (bk + 1) to time (k + 1)
Reproduction signal (zk + 1) is determined.

The state (sk) is the NRZI code (bk).
Is "1" or "0", the number of states is 2.

FIG. 7 shows this state transition diagram, and FIG. 8 shows a trellis diagram in which the state transition diagrams are connected in time series.

Here, the state where the NRZI code (bk) is "1" is S1, and the state where the NRZI code (bk) is "0" is S.
It is set to 0.

Viterbi decoding is a method of selecting the most probable path among the paths between the states shown in the trellis diagram of FIG.

For details of the path selection method, refer to 7 of Document I above.
Since it is described on pages 7 to 83, it is omitted.

When a certain path is confirmed, the state (S
If "1" is output on the path that transits from 1) to the state (S0) or from the state (S0) to the state S1 and "0" is output as the decoded signal on the path where the state transition does not occur,
A recording signal (ak) is obtained.

At time (k), in the state (S0),
It is assumed that the state (S0) is reached at time (k + i) after T state transitions.

At this time, T is an even number.

This is because, as is clear from the trellis diagram of FIG. 8, if the state (S0) makes one state transition, the state becomes the state (S1), and at the time (k + i), the state becomes (S0). This is because the state must be changed at least once.

Here, it is assumed that a decoding error occurs between time (k) and (k + i).

If the number of state transitions is T times, it means that there is an error in the transition time, and one transition time error occurs, and in the decoded signal, an error occurs twice at the original transition time and at the time when the transition is erroneously made. Will occur.

If the number of state transitions is T ′ (≠ T) and there is no error in transition time, T ′ is also an even number, so the number of state transition errors | T′−T | (where | ｜
The absolute value of ha is even.

Therefore, the number of errors in the decoded signal is even.

Similarly, from the state (S0) at time (k) to T
When the state (S1) is changed to the state (S1) at time (k + i) after the number of state transitions, the state (S1) is changed to the state (S1) from the state (S1) at the time (k) to the time (k + i) after T times of state transition ,
Even if the state (S1) at the time (k) changes to the state (S0) at the time (k + i) after T times of state transitions, the number of errors generated in the decoded signal is an even number. It is clear from the diagram.

From the above, if an error occurs in the Viterbi decoding of the NRZI code, an even number of errors will always occur.

Further, in the Viterbi decoding of the interleaved NRZI code, it is divided into two sequences at every other time slot, each is decoded by the Viterbi decoding circuit of the NRZI code, and again time-multiplexed as one decoded signal. There is.

Since the decoded signal of each NRZI code contains an even number of errors, the Viterbi decoded signal of the interleaved NRZI code also contains an even number of errors.

The state transition diagram of FIG. 7 is also a state transition diagram of the precoder showing the relationship between the recording signal (ak) and the NRZI code (bk = Sk).

From this, regardless of the state at that time, the state transition is made when the recording signal (ak) is "1", and the state transition is not made when it is "0".

Therefore, once an erroneous state transition is made due to an erroneous input, the erroneous state transition continues as it is, and when an erroneous input is made again, an erroneous state transition is performed, and as a result, the normal state transition is restored. Become.

From this fact, if there are an odd number of errors in the input of the precoder, the error will eventually transition to an erroneous state transition, but the error will propagate infinitely. It is a transition, and it can be seen that the error does not propagate.

Therefore, if the precoder is not arranged on the recording side but is arranged after the Viterbi decoding circuit for the NRZI code on the reproducing side, the number of errors input to the precoder is an even number, so that the error propagation by the precoder is prevented. You can

[0092]

Embodiments of the present invention will be described below in detail with reference to the drawings.

In all the drawings for explaining the embodiments, parts having the same functions are designated by the same reference numerals, and the repeated description thereof will be omitted.

[Embodiment 1] FIG. 1 is a diagram showing a schematic configuration of a digital signal recording / reproducing apparatus according to an embodiment (Embodiment 1) of the present invention.

In FIG. 1, 1 is a recording signal input terminal, 2
Is an NRZI encoding circuit, 3 is a 1-bit delay element, 4 is a "modulo 2" adder, 5 is a magnetic recording / reproducing system, 6a and 6b are magnetic heads, 7 is a magnetic medium, 8 is a PR equalizer, 9 Is an adder, 10 is a Viterbi decoding circuit for interleaved NRZI code, 11 is a demultiplexer, 12a and 12b are Viterbi decoding circuits for NRZI code, 13 is a multiplexer, 14 is a precoder, and 15 is a reproduction signal output terminal.

FIG. 2 is a diagram showing an example of a time chart of the digital signal recording / reproducing circuit shown in FIG.

In FIG. 2, CLK is a clock, 2a is a recording signal input from the recording signal input terminal 1, and 2b is N.
NRZI signal output from RZI encoding circuit 2, 2c
Is a reproduction signal reproduced from the magnetic medium 7 by the magnetic head 6b, 2d is an equalization signal output from the PR equalizer 8, 2d
e and 2f are equalized signals (2
d) equalized signal for each time slot, 2g and 2h are N
Viterbi (NRZI) decoded signal of Viterbi decoding circuit (12a, 12b) for RZI code, 2i is interleaved NRZ
I-NRZI decoded signal of the Viterbi decoding circuit 10 for I code,
2j is an output signal of the precoder 14.

In the time chart shown in FIG. 2, the Viterbi (NRZI) decoded signals (2g, 2h) of each series are
Delayed by the number of memory bits (n bits) in the NRZI Viterbi decoding circuit (12a, 12b).
The RZI decoded signal (2i) and the output signal (2j) of the precoder 14 are also delayed by n bits from FIG.

The operation of the first embodiment will be described below with reference to FIGS. 1 and 2.

The recording signal (2a) input from the recording signal input terminal 1 is input to the NRZI encoding circuit 2 and
It is converted into a ZI signal (2b).

The characteristic of the NRZI encoding circuit 2 is 1 / (1 + D) where D is a 1-bit delay operator.

The NRZI signal (2b) is input to the magnetic recording / reproducing system 5 and recorded on the magnetic medium 7 by the magnetic head 6a.

The NRZI signal (2b) recorded on the magnetic medium 7 is reproduced by the magnetic head 6b and becomes a reproduced signal (2c).

The response characteristic of the magnetic recording / reproducing system 5 is (1-D).
It is known that it is a differential characteristic expressed by.

The reproduction signal (2c) is input to the PR equalizer 8.

The PR equalizer 8 has a response characteristic of (1 + D), and the response characteristic combined with the recording / reproducing system 5 is (1-D) (1
+ D), which is the PR (1, 0, -1) channel.

The reproduced signal (2c) is added to the reproduced signal (2c) delayed by the 1-bit delay element 3 in the PR equalizer 8 and added in the adder 9 and output as an equalized signal (2d).

The equalized signal (2d) is an interleaved NR
It is input to the Viterbi decoding circuit 10 for ZI code.

The interleaved NRZI code Viterbi decoding circuit 10 separates the input equalized signal (2d) by the demultiplexer 11 into two series of signals (2e, 2f) for each time slot, and separates each by NRZI code. It is input to the for-use Viterbi decoding circuits 12a and 12b.

Viterbi decoding circuit for NRZI code (12a,
12b) is when the input signal is "1" or "-1"
It is a circuit that outputs 1 "and" 0 "when the input signal is" 0 "and uses Viterbi decoding for the determination of the input signal.

Viterbi decoding circuit for NRZI code (12a,
12b) is known as described on page 83 of document I.

The Viterbi (NRZI) decoded signal (2) of each of the Viterbi decoding circuits 12a and 12b for NRZI code is used.
g, 2h) is time-multiplexed into one decoded signal by the multiplexer 13 and output as an I-NRZI decoded signal (2i).

The I-NRZI decoded signal (2i) of the interleaved NRZI code Viterbi decoding circuit 10 is input to the precoder 14, and the precoder 14 outputs the recording signal (2j) which is the decoded signal.

The precoder 14 uses the NRZI encoding circuit 2
The configuration is the same as the above, and the characteristic is 1 / (1 + D).

From the NRZI encoding circuit 2 to the precoder 14
The overall characteristic up to is a characteristic of 1 because addition and subtraction are equivalent in the operation of "modulo 2", and the recording signal is decoded.

There is always an even number of decoding errors occurring in the Viterbi decoding circuits 12a and 12b for NRZI code.

Even in the output signal of the interleaved NRZI code Viterbi decoding circuit 10 in which these decoded signals are time-multiplexed, the decoding error is always an even number.

When this output signal is input to the precoder 14, the output signal of the precoder 14 causes error propagation due to the odd-numbered decoding error, and the error propagation stops due to the even-numbered decoding error.

Therefore, according to this embodiment, there is no risk of infinite error propagation.

According to the first embodiment, PR (1, 0, -1) can be realized without using a precoder on the recording side, and VTRs and computer MTs that require medium compatibility are not adopted in the standard. It becomes possible to use the PR (1, 0, -1) method.

Also, the S / N ratio can be improved by the Viterbi decoding circuit.

[Embodiment 2] FIG. 3 shows a schematic configuration of a digital signal recording / reproducing apparatus which is another embodiment (Embodiment 2) of the present invention.

In FIG. 3, 1 is a recording signal input terminal, and 3 is
Is a 1-bit delay element, 4 is a "modulo 2" adder, 5
Is a magnetic recording / reproducing system, 6a and 6b are magnetic heads, 7 is a magnetic medium, 12 is a Viterbi decoding circuit for NRZI code, and 14
Is a precoder, and 15 is a reproduction signal output terminal.

FIG. 4 is a diagram showing an example of a time chart of the digital signal recording / reproducing circuit shown in FIG.

In FIG. 4, 4a is a recording signal input terminal 1
From the magnetic medium 7 by the magnetic head 6b, 4c is a Viterbi (NRZI) decoded signal of the Viterbi decoding circuit 12 for NRZI code, and 4d is an output signal of the precoder 14.

In the time chart shown in FIG. 4, the Viterbi (NRZI) decoded signal (4c) is delayed by the number of memory bits (n bits) in the NRZI Viterbi decoding circuit 12, so that the output of the precoder 14 is delayed. The signal (4d) is also delayed by n bits from FIG.

The clock CLK is omitted in FIG.

The operation of the second embodiment will be described below with reference to FIGS. 3 and 4.

The recording signal (4a) inputted from the recording signal input terminal 1 is inputted to the magnetic recording / reproducing system 5 and recorded on the magnetic medium 7 by the magnetic head 6a.

The signal recorded on the magnetic medium 7 is reproduced by the magnetic head 6b and becomes a reproduced signal (4b).

The response characteristic of the magnetic recording / reproducing system 5 is (1-D).
It is known that the differential characteristic is expressed by
It is the (1, -1) channel.

The reproduced signal is input to the Viterbi decoding circuit 12 for NRZI code.

The Viterbi decoding circuit 12 for NRZI code outputs "1" when the input signal is "1" or "-1" and outputs "0" when the input signal is "0". It is a circuit that uses Viterbi decoding for the determination of.

The Viterbi (NRZI) decoded signal (4c) of the Viterbi decoding circuit 12 for NRZI code is input to the precoder 14, and the precoder 14 outputs the recording signal (2j) which is the decoded signal.

The precoder 14 includes the NRZI encoding circuit 2
The configuration is the same as the above, and the characteristic is 1 / (1 + D).

From the NRZI encoding circuit 2 to the precoder 14
The overall characteristic up to is 1 because addition and subtraction are equivalent in the operation of "modulo 2", and the recording signal is decoded.

Also in the second embodiment, as in the first embodiment, there is no possibility that the error is propagated infinitely by the precoder 14.

In the second embodiment, the recording code is N
Codes using RZ recording, such as block codes and MFM
(Modified Frequency Modula
It is applicable to a code.

Generally, since these codes have complicated state transition rules, the circuit scale of the Viterbi decoding circuit becomes large, and it is difficult to apply Viterbi decoding.

However, according to the second embodiment, the Viterbi decoding circuit 12 for NRZI code, which is known to be feasible with a small-scale circuit, can be applied to the above code, and the S / N ratio of data detection can be increased. It is possible to improve.

Although the present invention has been specifically described based on the embodiments, it is needless to say that the present invention is not limited to the above embodiments and various modifications can be made without departing from the scope of the invention.

[0142]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

(1) According to the present invention, a digital signal is converted into an NRZI code and recorded on a recording medium without using a precoder, and the reproduced signal is subjected to Viterbi decoding of an interleaved NRZI code and then PR Since the digital signal is decoded by being input to the equalizer, it is possible to apply the PR system capable of limiting error propagation to the magnetic recording / reproducing system without requiring a precoder on the recording side.

As a result, the compatibility of the recording medium can be maintained, and the PR system which is not adopted in the standard is applied to the magnetic recording / reproducing apparatus such as the VTR or the computer MT which requires the compatibility of the recording medium. It becomes possible.

(2) According to the present invention, a digital signal is directly recorded on a recording medium without using a precoder, the reproduced signal is subjected to Viterbi decoding of an NRZI code, and then input to a PR equalizer. Since the digital signal is decoded, it is possible to apply the PR system capable of limiting error propagation to the magnetic recording / reproducing system without requiring a precoder on the recording side.

As a result, the compatibility of the recording medium can be maintained, and the PR system which is not adopted in the standard is applied to the magnetic recording / reproducing apparatus such as the VTR or the computer MT which requires the compatibility of the recording medium. It becomes possible.

(3) According to the present invention, the Viterbi decoding circuit which can be realized by a small-scale circuit can be applied to the magnetic recording / reproducing system using the recording code of NRZ or NRZI recording.

[Brief description of drawings]

FIG. 1 is a diagram showing a schematic configuration of a digital signal recording / reproducing apparatus which is an embodiment (Embodiment 1) of the present invention.

FIG. 2 is a diagram showing an example of a time chart of the digital signal recording / reproducing circuit shown in FIG.

FIG. 3 is a diagram showing a schematic configuration of a digital signal recording / reproducing apparatus which is another embodiment (second embodiment) of the present invention.

4 is a diagram showing an example of a time chart of the digital signal recording / reproducing circuit shown in FIG.

FIG. 5 is a diagram showing a schematic configuration of a conventional digital signal recording / reproducing device to which PR (1, 0, -1) is applied.

FIG. 6 is a diagram showing a schematic configuration of a conventional digital signal recording / reproducing apparatus to which an NRZI code is applied.

7 is an NR of the digital signal recording / reproducing apparatus shown in FIG.
It is a figure which shows the state transition diagram of ZI code.

8] NR of the digital signal recording / reproducing apparatus shown in FIG.
It is a figure which shows the trellis diagram of ZI code.

[Explanation of symbols]

1 ... Recording signal input terminal, 2 ... NRZI encoding circuit, 3 ...
1-bit delay element, 4 ... "modulo-2" adder, 5 ...
Magnetic recording / reproducing system, 6a, 6b ... Magnetic head, 7 ... Magnetic medium, 8 ... PR equalizer, 9 ... Adder, 10 ... Interleaved NRZI code Viterbi decoding circuit, 11 ... Demultiplexer, 12, 12a, 12b ... Viterbi decoding circuit for NRZI code, 13 ... Multiplexer, 14 ... Precoder, 1
5 ... Reproduction signal output terminal, 31 ... Data discrimination circuit.

Claims (4)

[Claims] 1. A digital signal processing method for converting a digital signal into an NRZI code, recording the same on a recording medium, and obtaining a decoded signal of the digital signal from the reproduced signal reproduced from the recording medium, wherein the reproduced signal from the recording medium is used. To the multivalued signal by subjecting the multivalued signal to the multivalued signal whose frequency characteristic is represented by (1 + D) (D is a 1-bit delay operator), and performing the Viterbi decoding of the interleaved NRZI code to A digital signal processing method, wherein an exclusive OR of a Viterbi decoded signal and a decoded signal of the digital signal one bit before is obtained to obtain a decoded signal of the digital signal. 2. A digital signal processing method for recording a digital signal on a recording medium and obtaining a decoded signal of the digital signal from a reproduced signal reproduced from the recording medium,
The reproduced signal from the recording medium is subjected to Viterbi decoding of an NRZI code, and the decoded signal of the digital signal is obtained by taking the exclusive OR of the Viterbi decoded signal and the decoded signal of the digital signal one bit before. A digital signal processing method characterized by the above. 3. A digital signal processing apparatus for converting a digital signal into an NRZI code, recording the same on a recording medium, and obtaining a decoded signal of the digital signal from the reproduced signal reproduced from the recording medium, in the reproduced signal from the recording medium. Is input and the frequency characteristic is subjected to signal processing represented by (1 + D) (D is a 1-bit delay operator) and outputs a multilevel signal, and a multilevel signal from the equalization circuit is input. The interleaved NRZI code Viterbi decoding circuit, the Viterbi decoding signal from the Viterbi decoding circuit, and the decoded signal of the digital signal one bit before are subjected to exclusive OR to output the decoded signal of the digital signal. A digital signal processing device having a precoder. 4. A digital signal processing apparatus for recording a digital signal on a recording medium and obtaining a decoded signal of the digital signal from a reproduced signal reproduced from the recording medium,
The NRZI code Viterbi decoding circuit to which the reproduction signal from the recording medium is input, the exclusive OR of the Viterbi decoding signal from the Viterbi decoding circuit and the decoded signal of the digital signal one bit before are used to obtain the digital signal. And a precoder that outputs a decoded signal of the signal.