JPH08147193A - Cpu acknowledge monitoring circuit - Google Patents

Abstract

PURPOSE: To prevent the bus error of a CPU from being generated when an acknowledge signal for live line removal is not returned to a CPU package corresponding to a select signal to be CPU packaged from the CPU package. CONSTITUTION: Concerning communication equipment for which a CPU package 1 equipped with an asynchronous CPU 4 and plural objects 2 to be CPU packaged are connected through a pack wiring board 3, the select signal to be CPU packaged decoding a strobe signal for selecting any object 2 to be CPU packaged is received from the asynchronous CPU 4 and the CPU package 1 is provided with an acknowledge monitoring circuit 7 for transmitting a pseudo acknowledge signal to the CPU 4 before the lapse of fixed time to turn the CPU 4 to bus error when the acknowledge signal is not returned to the CPU package 1 for the live line removal of the object 2 to be CPU packaged corresponding to the select signal. Thus, even when the object 2 to be CPU packaged is set in a live line removing state and no acknowledge signal is returned to the CPU package 1, the CPU 4 does not turn to the bus error and the communication equipment is recovered to a normal state in the manner of software.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication device, and more particularly to communication control at the time of data input / output from a CPU package to a CPU package.

[0002]

2. Description of the Related Art In various devices used in communication systems, C
It is known that a CPU package including a PU and a plurality of CPU-received packages controlled by the CPU of the CPU package are provided, and the packages are connected by a back wiring board (BWB) for communication. . FIG. 2 is a block diagram showing a conventional example of such an apparatus, and a conventional example of the present invention will be described below with reference to this figure. In FIG. 2, 101 is a CPU package, and 102 is a CPU receiving package. These C
The PU package 101 and the CPU package 102 are connected via a back wiring board (BWB) 103. CPU package 101 is an asynchronous CP
U104 (For example, 68K CPU of Motorola)
And an address decoder 105 for decoding the address of the strobe signal from the CPU 104. Multiple CPU packages 102 are provided in the apparatus (only one package is shown in FIG. 2 for simplification).
The PU package 102 is an acknowledge signal generation circuit 10
When it receives the strobe signal from the CPU 104 of the CPU package 101, it sends back an acknowledge signal, which is a confirmation signal indicating that the strobe signal has been received, to the CPU 104.

The operation of this conventional example is as follows. CP
The CPU 104 of the U package 101 outputs a strobe signal to the address decoder 105, and the address decoder 1
05 decodes this signal and sends a package (PKG) selection signal to the corresponding CPU package (PKG) 102 via the back wiring board (BWB) 103. When the CPU package (PKG) 102 receives the selection signal of this package (PKG), the CPU package (PKG) 102 sends an acknowledge signal, which is a confirmation signal indicating that the strobe signal is received from the acknowledge generation circuit 106, to the CPU package (PKG).
KG) 101 and send it back. CPU package (PKG)
The CPU 104 of 101 determines that a series of operations is completed at the time of inputting this acknowledge signal, and shifts to the next operation. By the way, in the above various devices, it may be desired to remove any of the CPU package (PKG) 102 for maintenance and inspection. In this case, after the power of the device is turned off, the CPU package 10 is removed.
I was trying to remove 2.

However, if the entire power source is turned off while the other CPU package 102 is operating only to remove one CPU package 102, the efficiency of the apparatus is reduced. There was a problem to do. Therefore, in order to solve such a problem, the CPU package 1 with the entire device powered on
A method for removing 02 has been demanded, and recently, for example, a device such as NTT has been required to have a function of hot-plugging and unplugging. This hot-plugging / unplugging function is a problem for CPUs that are problematic while the power of the entire device is on.
The package 102 is inserted and removed.

However, if the CPU package (PKG) 102 is removed while the power of the apparatus is on, the CP
Even if the U103 outputs the strobe signal to the CPU package (PKG) 102, the acknowledge signal is not returned to the CPU 1 because the CPU package (PKG) 102 is removed. Therefore, C
The PU 103 is in a bus error state, and it is difficult to recover from this state to a software-like normal state. It is determined that the entire device has failed, the entire device is temporarily stopped, and the function of hot-plugging / unplugging can be fully performed. There was the problem of not having it.

[0006]

SUMMARY OF THE INVENTION In order to overcome the above-mentioned drawbacks of the conventional apparatus, the present invention provides a CPUP under control during a data input / output operation.
Even if the KG is removed, the CPU on the CPU package (PKG) side does not enter the bus error state, and the software (S /
It is an object of the present invention to provide a communication device including an acknowledge monitoring circuit that can easily perform data input / output operation in W).

[0007]

SUMMARY OF THE INVENTION In order to achieve the above object, a communication device equipped with a CPU acknowledge monitoring circuit according to the present invention includes a CPU package equipped with an asynchronous CPU and the CPU.
The package includes a plurality of CPU packages to be selected in a package and a back wiring board that connects these packages, and the CPU package includes the asynchronous C
The CPU package includes a PU and an address decode circuit that decodes a strobe signal for selecting a CPU package from the asynchronous CPU and sends a PKG selection signal to the CPU package. When a PKG selection signal from the CPU package is received, the CPU package further includes an acknowledge generation circuit that generates an acknowledge signal indicating the fact, and the CPU package further includes a pseudo acknowledge when the acknowledge signal from the CPU package is not obtained within a predetermined time. Generate a signal, C
It is configured to include an acknowledge monitoring circuit for sending to PU.

In the communication device configured as described above, the PKG is transferred from the CPU package to the CPU package.
When the acknowledge signal is not returned from the CPU package despite the selection signal being sent, the pseudo-acknowledge signal is sent to the CPU within a predetermined time from the acknowledge monitoring circuit of the CPU package. As a result, the C
With the PU package powered on, (insert)
Even if it is removed, the bus error of the CPU package is avoided, and the device can be easily returned to the normal state by software.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a communication device according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of a communication device according to the present invention. In the figure, 1
Is a CPU package, and 2 is a CPU package. Similar to the conventional example, the CPU package 1 and the CPU package 2 are back wiring boards (B
WB) 3. CPU package 1
Is an asynchronous CPU 4 (eg Motorola 68K
CPU) and the address decoder 5 for decoding the address of the strobe signal from the CPU 4. A large number of CPU packages 2 are provided in the device (only one package is shown in FIG. 1 for simplification).

The CPU package 2 is provided with an acknowledge signal generation circuit 6, and when it receives a strobe signal from the CPU 4 of the CPU package 11, it returns an acknowledge signal which is a strobe signal to the CPU 4. Furthermore, CPU
The package 1 includes the acknowledge monitoring circuit 7, which is a feature of the present invention, and functions to send back a pseudo acknowledge signal to the CPU 4 when there is no acknowledge signal from the CPU package 2.

The operation of this embodiment is as follows. CP
The CPU 4 of the U package 1 outputs a strobe signal to the address decoder 5, the address decoder 5 decodes this signal, and the package (PK) is sent to the corresponding CPU package 2 through the back wiring board (BWB) 3.
G) Send a selection signal. Upon receiving this package (PKG) selection signal, the CPU package 2 returns an acknowledge signal, which is a confirmation signal indicating that the strobe signal has been received from the acknowledge generation circuit 6, to the CPU package 1. The CPU 4 of the CPU package 1 shifts to the next operation on the assumption that a series of operations has been completed at the time when this acknowledge signal is input.

By the way, when the CPU package 2 is removed for maintenance or inspection, the strobe signal from the CPU package 1 is not received by the CPU package 2, and therefore the strobe signal from the CPU package 1 is not received. In such a case, the acknowledge signal indicating that the strobe signal has been received is not returned to the CPU package 1. In order to solve such a problem, in this embodiment, the CPU package 1 is provided with an acknowledge monitoring circuit 7, and the acknowledge monitoring circuit 7 sends a pseudo acknowledge signal to the CPU 4. This pseudo acknowledge signal is
It is sent within a fixed time earlier than the time of returning a bus error. As a result, the CPU 4 can recognize that a monitoring error (a signal generated when there is no acknowledge) by checking the signal input state of the acknowledge monitor circuit by software (S / W) processing. Therefore, the bus error of the CPU 4 does not occur.

As described above, according to the present invention, C
When the PU package selects the CPU target package,
By providing an acknowledge monitor circuit that monitors the selection signal to the CPU package and gives a pseudo acknowledge signal to the CPU when the acknowledge is not obtained from the CPU package within a fixed time, hot plugging and unplugging can be easily coped with. The effect is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional example.

[Explanation of symbols]

 1 CPU package (PKG) 2 CPU package (PKG) 3 Back wiring board 4 (68K) CPU 5 Address decoder 6 Acknowledge generation circuit 7 Acknowledge monitoring circuit

Claims (1)

[Claims] 1. A CPU package having an asynchronous CPU and a plurality of CPs selected by the CPU package.
The CPU package includes a U package and a back wiring board that connects these packages. The CPU package includes the asynchronous CPU and an address decoding circuit that decodes a strobe signal from the asynchronous CPU that selects a CPU-received package. The CPU package includes an acknowledge generation circuit that generates an acknowledge signal indicating that when the package selection signal obtained by decoding the strobe signal from the address decode circuit of the CPU package is received, The CPU package generates a pseudo acknowledge signal based on a package selection signal from the address decoding circuit when the acknowledge signal from the CPU package is not obtained within a predetermined time, and the asynchronous CPU
A communication device comprising an acknowledge monitoring circuit for sending to