JP3022971B2 - Terminal control failure monitoring method in electronic exchange - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a failure monitoring method for monitoring whether a failure has occurred in a terminal control device in an electronic exchange.

[Prior Art] FIG. 2 is a block diagram showing a configuration example of a conventional electronic exchange.

In FIG. 2, n (n is, for example, 100 or 1000) terminal devices 11 to 1n represent a subscriber circuit or a trunk circuit of the electronic exchange, and these terminal devices 11 to 1n are connected to a network in the electronic exchange. They can be interconnected via 31. The terminal devices 11-1n are directly controlled by the corresponding terminal control devices 21-2n, and the network 31 is directly controlled by the corresponding network control device 32. ing. The terminal control devices 21 to 2n and the network control device 32 are responsible for the overall control of the electronic exchange, that is, the terminal devices corresponding to the instructions of the central processing unit 33 for executing the switching operation process.
It controls 11-1n and network 31. Note that the terminal device 11
The transfer of information between .about.1n or the network 31 and the central processing unit 33 is performed via a bus interface device 34 for distributing and supplying control information and the like.

In the electronic exchange having such a configuration, occurrence of a failure in the terminal control devices 21 to 2n (including the terminal devices 11 to 1n in some cases) has conventionally been detected through an exchange control operation as follows.

For example, when the central processing unit 33 controls the terminal device 11, the control information is transmitted to the terminal control device 21 corresponding to the terminal device 11 via the bus interface device. Upon receiving the control information, the terminal control device 21 controls the terminal device 11 according to the control information, and sends a reception confirmation signal notifying that the control information has been received to the bus interface device 34.

The bus interface device 34 transfers the received acknowledgment signal to the central processing unit 33. The central processing unit 33 determines that the terminal control device 21 is operating normally by receiving the reception confirmation signal from the terminal control device 21 via the bus interface device 34.

If a failure such as a failure has occurred in the terminal control device 21,
The above-mentioned reception confirmation signal cannot be transmitted.
The central processing unit 33 monitors whether or not the reception confirmation signal has been returned within a predetermined time when transmitting the control information to the terminal control device 21, and when the control information has not been returned, the terminal control device It is determined that a failure has occurred in the switch 21 and the electronic exchange is not downed, but is notified by a display device or the like (not shown), and returns to the normal exchange operation.

Fault monitoring for the other terminal control devices 22 to 2n is performed in the same manner.

[Problems to be Solved by the Invention] By the way, even in the case of a private branch exchange, the number of terminal devices in one electronic exchange is actually on the order of 100 or 1000, which is very large. Therefore, the central processing unit 33
It is desired that the unit time required for the control operation performed by one terminal control device be short. Therefore, conventionally, it is possible to speed up the processing without confirming whether or not a failure has occurred in the terminal control device to which the control information is to be transmitted, that is, eliminating the time required for the confirmation time. As described above, there has been an electronic exchange which immediately transmits control information.

However, in such an electronic exchange, the central processing unit 33 sends control information to the terminal control unit 1i (i is 1 to n) even after the failure is detected. After waiting for the reception confirmation signal from the terminal control device 1i for a predetermined time, the failure detection notification operation is performed. The processing of the central processing unit 33 has already been devoted to the failure detection notification operation for the detected failure again, and the processing capability of the central processing unit 33 has been reduced.

In order to avoid such inconvenience due to the duplication of the acknowledgment signal, it is conceivable that the control information is not sent to the terminal control device in which the failure has occurred, but in this case, as described above, when the control information is sent, It is necessary to check whether or not a failure has occurred in the destination terminal control device, and the processing capacity of the central processing unit 33 is reduced by the check time.

The present invention has been made in view of the above points,
It is an object of the present invention to provide a terminal control failure monitoring method for an electronic exchange that can monitor a failure that has occurred in a terminal control device without lowering the processing capacity of a central processing unit.

[Means for Solving the Problems] The present invention provides a central processing unit, a plurality of terminal control devices,
A bus interface device is provided between the terminal control device and the central processing unit, and the central processing unit repeatedly sends out control information to monitor the failure regardless of whether any of the terminal control devices has a failure. The present invention relates to a terminal control failure monitoring method in an electronic exchange which detects a failure based on the fact that a reception confirmation signal is not returned from the terminal control device, and thereafter continuously performs a normal switching operation. Are provided with the following circuits.

That is, based on an instruction from the central processing unit, the bus interface device has a storage circuit for storing information for identifying the failed terminal control device, and a terminal control device for transmitting the stored information and the control information to the central processing unit. And a matching circuit for matching the information to be specified. Also, a signal generation circuit for outputting a pseudo reception confirmation signal to a switching circuit when the bus interface device obtains a result that the terminal control device for transmitting control information from the central processing unit is in a fault occurrence state as a result of the comparison. And a switching circuit that outputs a pseudo reception confirmation signal to the central processing unit as an alternative to the reception confirmation signal from the terminal control device in accordance with an instruction from the matching circuit.

[Operation] In the terminal control failure monitoring method in which the central processing unit sends control information to one of the terminal control devices and detects the occurrence of a failure based on the fact that no acknowledgment signal is returned from the terminal control device, the failure has already been detected. Each time a control signal is sent to the terminal control device in which the error has occurred, the central processing unit performs a new fault detection process. In order to avoid such inconvenience without changing the processing of the central processing unit as much as possible, a pseudo reception certainty signal may be generated when a control signal is transmitted to a terminal control device in which a failure has already occurred. That is, in this case, since the reception confirmation signal is given to the central processing unit, the failure detection processing is not started.

Of course, such a pseudo reception confirmation signal cannot be generated by a terminal control apparatus in which a failure has occurred. Therefore, the bus interface device is caused to perform the generating operation.

In order to detect the case where a pseudo reception confirmation signal is generated,
There is provided a storage circuit for storing information for specifying a terminal control device in which a failure has occurred, and a matching circuit for comparing the stored information with information for specifying a terminal control device to which the central processing unit sends control information.

When a case where a pseudo reception confirmation signal is to be transmitted is detected by these configurations, the signal generation circuit generates a pseudo reception confirmation signal. Usually, the reception confirmation signal output from the terminal control device is supplied to the central processing unit, and the pseudo reception confirmation signal is supplied to the central processing unit only in the specific case described above. Was provided.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing a detailed configuration of the bus interface device 34a in this embodiment.

In this embodiment as well, the electronic exchange comprises a plurality of terminal devices, a plurality of terminal control devices, a network, a network control device, a bus interface device, and a central processing unit, as shown in FIG. However, the bus interface device 34a has a configuration related to fault monitoring as shown in FIG. 1, and the central processing unit stores information identifying the failed terminal control device in a storage circuit in the bus interface device 34a. It differs from the conventional device in that a process for storing is performed. The latter difference will be described in detail in the description of the operation.

Here, a detailed configuration of the bus interface device 34a in this embodiment will be described.

In FIG. 1, the bus interface device 34a
Has three input / output terminals A1, A2, A3 for connection to the respective terminals of the central processing unit. That is, it has an address information terminal A1, a control information terminal A2, and a reception confirmation signal terminal A3. These terminals A1 to A3 are connected to the central processing unit interface circuit 1, and the central processing unit interface circuit 1 performs an interface function with the central processing unit such as level adjustment.

The address information via the address information terminal A1 is given to the faulty device number storage circuit 2, the number verification circuit 6, and the terminal control interface circuit 5. The control information via the control information terminal A2 is provided to the faulty device number storage circuit 2 and the terminal control interface circuit 5.

As will be described later, when the address information indicates the circuit, the faulty device number storage circuit 2 stores the faulty device control information under the control of the central processing unit. Store the number of The number verification circuit 6 can access the number stored in the faulty device number storage circuit 2, and the central processing unit outputs address information for instructing one of the terminal control devices, and outputs the control information to the device. Is transmitted, it is checked whether the number of the terminal control device indicated by the address information is already stored.

This collation result is given to the switching circuit 3 and the pseudo reception confirmation signal generation circuit 4. The switching circuit 3 includes a reception confirmation signal terminal A3 via the central processing unit interface circuit 1 and a reception confirmation signal terminal B3 via the pseudo reception confirmation signal generation circuit 4 or the terminal control interface circuit 5 according to the collation result.
Is to select the connection. The pseudo reception confirmation signal generation circuit 4 generates a pseudo reception confirmation signal and outputs it to the switching circuit 3 when the collation result indicates a match.

The terminal control interface circuit 5 performs an interface function such as level adjustment with the terminal control device. The terminal address interface line, the control information line, and the reception acknowledgment signal line are connected to corresponding terminals of the terminal control device. Are connected to the input / output terminals B1 to B3.

Next, an operation related to fault monitoring of the electronic exchange having the bus interface device 34a shown in FIG. 1 will be described focusing on the operation of the bus interface device 34a.

When the central processing unit specifies the terminal control unit based on the address information and sends out the control information in a state where the faulty device number is not stored, the control information is transmitted to the bus interface unit 34a by the central processing unit interface circuit 1 and the terminal unit. The data is output to the destination terminal control device via the control interface circuit 5 sequentially. Also in this case,
The number matching circuit 6 performs the matching process, but does not affect the basic operation because the numbers do not match.

If the terminal control device that has received the control information operates normally, the terminal control device returns a control information reception confirmation signal. This reception confirmation signal is transmitted to the bus interface device 34.
In a, the signal is sent to the central processing unit through the terminal control interface circuit 5, the switching circuit 3, and the central processing unit interface circuit 1 in that order.

On the other hand, if a failure has occurred in the terminal control device to which the control information has been given, the reception confirmation signal is not returned to the central processing unit, and the central processing unit determines that the terminal control device has failed. At this time, the central processing unit performs a notification process such as activating the display device as in the related art. At this time,
Unlike the conventional central processing unit, the central processing unit recognizes a number (address information) identifying the terminal control device in which the failure has occurred,
A process for storing the number in the faulty device number storage circuit 2 in the bus interface device 34a is performed.

That is, the central processing unit stores the faulty device number storage circuit 2
Is transmitted to the terminals A1 and A2. These pieces of information are given to the faulty device number storage circuit 2 via the central processing unit interface circuit 1, and the faulty device number is set in the faulty device number storage circuit 2. This setting data is stored and held in the faulty device number storage circuit 2.

When the faulty device number is stored in the faulty device number storage circuit 2 in this way and the CPU returns to the normal operation state and the central processing unit designates the faulty terminal control device by the address information and sends out the control information. These address information and control information are transmitted to terminals A1 and A2 in the bus interface.
Are output to the terminal control device via the central processing unit interface circuit 2, the terminal control interface circuit 5, and the terminals B1 and B2. The address information is provided to the failed device number storage circuit 2 and the number collating circuit 6, and the control information is provided to the failed device number storage circuit 2.

Since the address information at this time does not indicate the faulty device number storage circuit 2, the faulty device number storage circuit 2 does not execute the storing operation even if the information is given.

The number verification circuit 6 verifies the terminal control device number information (address information) provided from the central processing unit with the faulty device number set in the faulty device number storage circuit 2.
If they do not match, no output signal is sent. On the other hand, if they match, the pseudo reception confirmation signal generation circuit 4 is activated, and the switching circuit 3 is switched to the pseudo reception confirmation signal generation circuit 4 side.

The pseudo reception confirmation signal generation circuit 4 generates a pseudo reception confirmation signal upon activation from the number verification circuit 6. This pseudo reception confirmation signal is supplied to the central processing unit via the switching circuit 3, the central processing unit interface circuit 1, and the terminal A3. The central processing unit continues the processing by receiving the pseudo reception confirmation signal.

Therefore, according to the above-described embodiment, a pseudo reception confirmation signal is provided to the central processing unit when the control operation is again performed on the control terminal device in which the failure has occurred. Since the configuration is mainly changed for the bus interface device, the processing capacity of the central processing unit can be increased as compared with the conventional case.

The present invention is particularly suitable for a private branch exchange, but can be applied to other electronic exchanges.

In the above description, the case where a failure has occurred in the terminal control device has been described. However, the failure includes a failure in which the terminal control device cannot transmit a reception confirmation signal due to a failure in the terminal device itself.

[Effects of the Invention] As described above, according to the present invention, a faulty device number storage circuit for storing a faulty device number is provided in a bus interface device, and each time a central processing unit sends control information to a terminal control device. The device number to be transmitted is compared with the faulty device number, and when they match, a pseudo reception confirmation signal is sent from the bus interface device to the central processing unit. Since the reception confirmation signal is always returned and the reception confirmation signal is not returned to the central processing unit, it is possible to prevent extra processing which has been performed since the reception confirmation signal is not returned to the central processing unit.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a detailed configuration of a bus interface device of an electronic exchange to which the present invention is applied, and FIG. 2 is a block diagram showing an electronic exchange to which a conventional system is applied. 2 ... failure device number storage circuit, 3 ... switching circuit, 4 ...
Simulated reception acknowledgment signal generation circuit, 6 ... number verification circuit, 34a
.... Bus interface device.

──────────────────────────────────────────────────の Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 11/28-11/34 H04M 3/08-3/14 H04M 3/22-3/26 H04Q 1 / 20-1/26 H04Q 3/54-3/56

Claims (1)

(57) [Claims] A central processing unit, a plurality of terminal control units,
A bus interface device provided between the terminal control device and the central processing unit, wherein the central processing unit repeatedly transmits control information regardless of whether any of the terminal control devices has a failure. In the terminal control failure monitoring method in an electronic exchange which performs failure monitoring, detects the occurrence of a failure based on the fact that a reception acknowledgment signal is not returned from the terminal control device, and subsequently performs a normal switching operation, the bus interface device A storage circuit for storing information for identifying a failed terminal control device based on an instruction from the central processing unit; identifying the storage information and the terminal control device to which the central processing device sends control information; A verification circuit for verifying the information; and, as a result of the verification, the terminal control device to which the central processing unit sends control information is in a failure state. A signal generation circuit that outputs a pseudo reception confirmation signal to the switching circuit when a result is obtained, and the pseudo reception confirmation signal as an alternative to the reception confirmation signal from the terminal control device according to an instruction from the matching circuit. A terminal control failure monitoring method in an electronic exchange, comprising: a switching circuit that outputs the signal to the central processing unit.