JPH08139543A - Limiter amplifier - Google Patents

Abstract

PURPOSE: To prevent the amplification of a clock waveform from deviating in timing. CONSTITUTION: Input potentials of the input terminal In and In/ are driven by transistors(TR) 1 and 2 and inputted to the gates of TRs 5 and 6 in a differential couple. The TRs 5 and 6, load resistors 7 and 8, and a TR 30 as a DC current source differentially amplify the potentials of the gates of the TRs 5 and 6, and the voltages which are the amplified results are outputted from output terminals Out and Out/. Here, the low-frequency side limit of the band of the differential amplification is set as the band of high-pass filters 40 and 50. Diodes 43 and 53 of the high-pass filters 40 and 50 which form capacitive circuits vary in capacitance with control voltages applied from control terminals T1 and T2. Consequently, the band and phase difference of the limiter amplifier vary.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a limiter amplifier which amplifies an input signal having a frequency within a bandwidth with a constant amplification factor.

[0002]

2. Description of the Related Art Conventionally, techniques in such a field include:
For example, some documents were described in the following documents. Reference 1: The IEICE Autumn National Conference Proceedings Volume 5, (1990), Akagi et al., “HBT Gain Control Amplifier, Limiter Amplifier for 10Gbps Optical Communication” P.77 Figure 2 was shown as a basic circuit in the above reference. It is a circuit diagram of a conventional limiter amplifier. This circuit is an amplifier circuit that does not have a waveform shaping circuit called a clipping circuit by a diode or the like, and includes transistors 1 and 2 forming two input buffers whose bases are connected to two input terminals In and In /, respectively. ing. The collectors of the transistors 1 and 2 are connected to the power supply terminal Tvcc. The emitters of the transistors 1 and 2 and the ground terminal Tve
Transistors 3 and 4 serving as current sources of the transistors 1 and 2 are connected between e and the transistors 3 and 4, respectively.
A current source control terminal Tvc is connected to the base of No. 4. The emitters of the transistors 1 and 2 are connected to the bases of the transistors 5 and 6. The transistors 5 and 6 differentially amplify the potential difference between the signals input to the bases. Load resistors 7 and 8 are connected between the collectors of the transistors 5 and 6 and the power supply terminal Tvcc, respectively.
Nodes between 8 are connected to two output terminals Out and Out /, respectively. High pass filters 10 and 20 are connected to the emitters of the transistors 5 and 6, respectively, and the high pass filters 10 and 20 are connected to the transistors 5 and 6, respectively.
6 is commonly connected to the collectors of the transistors 30 serving as current sources. The base of the transistor 30 is connected to the current source control terminal Tvc, and the emitter of the transistor 30 is connected to the ground terminal Tvee.

The high-pass filter 10 includes a transistor 5
The resistor 11 is connected between the emitter of the transistor and the collector of the transistor 30, and the capacitor 12 in parallel with the resistor 11. Similarly, the high-pass filter 20 also includes a resistor 21 connected between the emitter of the transistor 6 and the collector of the transistor 30, and a capacitor 22 in parallel with the resistor 21. Each of the high-pass filters 10 and 20 has a function of attenuating the low frequency components of the output currents of the transistors 5 and 6 and allowing the high frequency components to pass through, thereby limiting the low frequency side band of the limiter amplifier. FIG. 3 is a diagram showing frequency characteristics of the limiter amplifier of FIG.
The return loss S11 of the input signal and the gain S21 at the output power at n and In / are shown. Each input terminal I
The input signal given from n, In / is the transistor 1,
2 are respectively driven and input to the bases of the transistors 5 and 6. The conduction states of the transistors 5 and 6 change according to the potential of the signal input to the bases, and the output terminals Out and Out / connected to the load resistances 7 and 8 output a voltage obtained by differentially amplifying the input signal. Is output. Here, in the high-pass filter 10, the resistor 11 attenuates the current having a frequency lower than the band, and the capacitor 12 passes the current having a frequency higher than the band. Similarly,
Also in the high-pass filter 20, the resistor 21 attenuates the current of the frequency lower than the band, and the capacitor 22 allows the current of the frequency higher than the band to pass. Therefore, the lower limit of the low frequency component in the output voltage is determined. On the other hand, due to the high frequency characteristics of the transistors 5 and 6, the upper limit of the frequency band of the output voltage is set. That is, as shown in FIG. 3, this amplifier is a limiter amplifier having a large gain in a certain bandwidth.

[0004]

However, the conventional limiter amplifier has the following problems.
FIG. 4 is a characteristic diagram showing the phase deviation with respect to the input power and the gain of the output power in the limiter amplifier of FIG. In the conventional limiter amplifier, the phase of the output signal differs depending on the input power, as shown in FIG. That is, the limiter amplifier circuit of FIG. 2 has a phase deviation. Therefore, when amplifying the clock waveform with such a limiter amplifier,
There was a problem that the timing of the clock was shifted.

[0005]

In order to solve the above-mentioned problems, a first invention is to provide a control electrode and a first electrode and a second electrode whose conduction state changes in accordance with an input potential applied to the control electrode.
First and second transistors forming a differential pair, and loads of the first and second transistors respectively connected to the first electrodes of the first and second transistors. A first resistor and a second resistor, a direct current source for the first and second transistors, a third resistor connected between the second electrode of the first transistor and the current source, and the third resistor. A first high-pass filter that has a first capacitive circuit in parallel with the resistor and attenuates a low-frequency component of a current flowing through the first transistor, the low-frequency component being equal to or lower than a certain frequency, and passing a high-frequency component, A fourth resistor connected to the second transistor and a second capacitive circuit in parallel with the fourth resistor are provided, and a low-frequency component of a current flowing through the first transistor is equal to or lower than a certain frequency. Attenuating and passing high frequency components And a voltage between input potentials applied to each of the first and second transistor control electrodes with a bandwidth in which a low frequency side limit is set by the first and second high pass filters. The limiter amplifier that amplifies has the following configuration. That is, each of the first and second capacitive circuits is provided with a capacitive element whose capacitance value changes based on a control voltage applied from the control terminal.

A second aspect of the present invention is a limiter amplifier for amplifying a voltage between input potentials with a set bandwidth and has the following configuration. That is, the first and second transistors in the first invention, the first and second resistors, the direct current source, and the second electrodes of the first and second transistors and the current source are respectively provided. Between the third and fourth resistors for attenuating low-frequency components below a certain frequency of the current flowing through the first and second transistors and the second electrodes of the first and second transistors. And a high-pass filter that sets a limit on the low frequency side of the bandwidth, and a capacitive circuit that is connected to bypass a high frequency component higher than a certain frequency. Further, the capacitive circuit is provided with a capacitive element whose capacitance value changes based on a control voltage applied from a control terminal. In a third invention, the capacitive element in the first or second invention is a PN junction capacitance of a diode, a gate capacitance of a field effect transistor, or a PN junction capacitance of a bipolar transistor.

[0007]

According to the first aspect of the invention, since the limiter amplifier is configured as described above, the first and second transistors and
The first and second resistors serving as loads of the first and second transistors and the direct current source perform differential amplification with respect to the input potential. In the amplification, the first and second high pass filters attenuate low frequency components below a certain frequency and pass high frequency components higher than the certain frequency. Therefore, the low frequency side of the differential amplification band is set. Here, since the capacitance of the capacitive element provided in the capacitive circuit in the first and second high pass filters changes based on the control signal, the differential amplification set by the first and second high pass filters is performed. The band and phase deviation are changed. According to the second invention, the third and fourth high-pass filters connected to the second electrodes of the first and second transistors are provided.
Of the current flowing through the first and second transistors attenuates low-frequency components below a certain frequency, and high-frequency components higher than the certain frequency are attenuated by the capacitive circuit to the first and second Bypassed between the second electrodes of the transistors. Therefore, the lower limit of the bandwidth of the differential amplification is set. Here, when the control voltage applied from the control terminal changes, the capacitance value of the capacitive element in the capacitive circuit changes, so that the band and phase of the differential amplification set by the high-pass filter are changed. According to the third invention, when the capacitance element in the first or second invention is a PN junction capacitance of a diode, a gate capacitance of a field effect transistor, or a PN junction capacitance of a bipolar transistor, these are capacitance by a control signal. The value changes. Therefore, the above problem can be solved.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment FIG. 1 is a circuit diagram of a limiter amplifier showing a first embodiment of the present invention, and elements common to those in FIG. 2 are designated by common reference numerals. Similar to FIG. 2, this limiter amplifier
Two input terminals In and In / are respectively connected to bases which are control electrodes, and transistors 1 and 2 forming a buffer are provided. The collectors, which are the first electrodes of the transistors 1 and 2, are connected to the power supply voltage control terminal Tvcc. Transistors 3 and 4 which are direct current sources of the transistors 1 and 2 are connected between the emitters which are the second electrodes of the transistors 1 and 2 and the ground terminal Tvee, respectively.
The current source control terminal Tvc is connected to the bases of the transistors 3 and 4. The emitters of the transistors 1 and 2 are respectively connected to the bases of the transistors 5 and 6 which are the first and second transistors forming a differential pair. The transistor 5 and the transistor 6 perform differential amplification of the potential difference between the signals input to the base,
The collectors of the transistors 5 and 6 and the power supply voltage control terminal T
Load resistors 7 and 8 are connected between vcc and vcc, respectively. Nodes between the transistors 5 and 6 and the resistors 7 and 8 are connected to two output terminals Out and Out /, respectively. The first and second high-pass filters 40 and 50 are connected to the emitters of the transistors 5 and 6, respectively, and these high-pass filters 40 and 50 are connected to the collector of the transistor 30, which serves as a direct current source of the transistors 5 and 6. It is connected. The base of the transistor 30 is connected to the current source control terminal Tvc, and the emitter of the transistor 30 is connected to the ground terminal Tvee.

The high pass filter 40 includes a transistor 5
And a resistor 41 connected between the emitter of the transistor and the collector of the transistor 30, and a capacitor 42 and a diode 43 in parallel with the resistor 41. The capacitor 42 and the diode 43 form a capacitive circuit, and the connection node of the capacitor 42 and the diode 43 has a control terminal T1 for the control voltage V ₁ for controlling the capacitance value of the diode.
Is connected. Similarly, the high-pass filter 50 also includes a resistor 51 connected between the emitter of the transistor 6 and the collector of the transistor 30, and a capacitor 52 and a diode 53 in parallel with the resistor 21. A control terminal T2 for a control voltage V ₂ for controlling the capacitance value of the diode 53 is connected to a connection node between the capacitor 52 and the diode 53. The terminals T1 and T2 are used as phase adjustment terminals. Capacitor 52 and diode 5
3 also constitutes a capacitive circuit. The resistance value of the resistor 41 and the capacitance values of the capacitor 42 and the diode 43 are configured to set the band of the high pass filter 40.
The resistance value and the capacitance values of the capacitor 52 and the diode 53 are configured to set the band of the high pass filter 50. Each of the high-pass filters 40 and 50 has a function of attenuating the low frequency components of the output currents of the transistors 5 and 6 and allowing the high frequency components to pass therethrough, thereby limiting the low frequency band of the limiter amplifier.

Next, the operation of the limiter amplifier of FIG. 1 will be described. The potentials v1 and v2 of opposite phases given from the two input terminals In and In / are respectively driven by the transistors 1 and 2 and input to the bases of the transistors 5 and 6. Each of the transistors 5 and 6 changes its conduction state according to the potential of the signal input to the base and performs differential amplification. Therefore, the output terminal Ou connected to the load resistors 7 and 8
Output potentials v3 and v4 having opposite phases are output from t and Out /. The output voltage between the output potentials v3 and v4 is obtained by amplifying the potential difference between the potentials v1 and v2 which is the input voltage. Here, in the high pass filter 40, the resistor 41 attenuates the current having a frequency lower than the band,
The capacitor 42 and the diode 43 pass a current having a frequency higher than the band. Similarly, in the high-pass filter 50, the resistor 51 attenuates a current having a frequency lower than the band, and the capacitor 52 and the diode 53 pass a current having a frequency higher than the band. Therefore, the lower limit of the low frequency component in the output voltage is determined. On the other hand, the high frequency characteristics of the transistors 5 and 6 determine the upper limit of the frequency band at the output voltage.

FIG. 5 is a diagram showing the frequency characteristic of the gain of FIG. 1, and FIG. 6 is a diagram showing the input power characteristic of the phase of FIG. When the values of the control voltages V ₁ and V ₂ applied to the two terminals T1 and T2 are changed, the junction capacitance of the diodes 43 and 53 changes. Therefore, the bands of the high-pass filters 40 and 50 change, and the gain of the output voltage output from the output terminals Out and Out / changes as shown by the broken line in FIG. Further, when the values of the control voltages V ₁ and V ₂ are changed, the phase input power characteristic also changes as indicated by the broken line in FIG. As described above, in this embodiment, the diodes 43 and 53 are provided in the capacitive circuits in the high-pass filters 40 and 50, and the capacitance values of the diodes 43 and 53 are changed by the control voltages V ₁ and V _2. are doing. Therefore, the control voltage V ₁ ,
The band of the high pass filters 40 and 50 can be changed by adjusting V _{2, and} the phase deviation in the limiter amplifier can be adjusted. Therefore, even if the clock signal or the like is amplified, the timing shift, which has been a problem in the past, can be eliminated.

Second Embodiment FIG. 7 is a circuit diagram of a limiter amplifier showing a second embodiment of the present invention, and elements common to those in FIG. 1 are designated by common reference numerals. Similar to the first embodiment, the limiter amplifier includes transistors 1 and 2 whose bases are connected to the input terminals In and In /, and transistors 1 and 2, respectively.
The transistors 3 and 4 serving as the current sources of the above, and the transistors 5 and 6 serving as the first and second transistors forming a differential pair. Load resistors 7 and 8 are respectively connected between the transistors 5 and 6 and Tvcc of the power supply voltage control terminal, and a node between the transistors 5 and 6 and the resistors 7 and 8 serves as two output terminals Out and Out /. Each is connected. A high-pass filter 60 having a structure different from that of the first embodiment is provided between the emitters of the transistors 5 and 6 and the transistor 30 which is a DC current source thereof. The high-pass filter 60 includes each transistor 5,
6, the resistors 61 and 62 connected between the emitter of the transistor 6 and the collector of the transistor 30, and the transistors 5 and 6 respectively.
A capacitor 63 and a diode 64 that are connected in series between the emitters and bypass the high frequency component are provided. At a frequency that can pass through the capacitor 63 and the diode 64, for example, the impedance seen from the emitter terminal of the transistor 5 is a parallel circuit of the resistors 61 and 62. If the resistance values R ₆₁ and R ₆₂ of the resistors ₆₁ and ₆₂ are the same, the impedance is 1/2 of R ₆₁ . Therefore, a high pass filter is constructed. Capacitor 6
3 and the diode 64 constitute a capacitive circuit, and the band of the high pass filter 60 is set by the capacitance value of the capacitor 63 and the diode 64 and the resistance values R ₆₁ and R ₆₂ of the resistors ₆₁ and _62. Is. Capacitor 63
The control terminal T3 is connected to the connection node of the diode 64 and the diode 64. The control voltage V ₃ applied to the terminal T3 changes the junction capacitance of the diode 64 and changes the band and phase of the high pass filter 60. The operation of the limiter amplifier of FIG. 7 is similar to that of the first embodiment, and the potentials v1 and v2 of opposite phases given from the two input terminals In and In / are driven by the transistors 1 and 2, respectively. It is input to the bases of the transistors 5 and 6. Each of the transistors 5 and 6 changes its conduction state according to the potential of the signal input to the base and performs differential amplification. Therefore, the output terminal Ou connected to the load resistors 7 and 8
Amplified output potentials v3, v of opposite phase from t, Out /
4 is output. In the high pass filter 60, the resistor 6
1, 62 attenuates the current having a frequency lower than the band, and the capacitor 63 and the diode 64 pass the current having a frequency higher than the band. Therefore, the lower limit of the low frequency component in the output voltage is determined. On the other hand, the high frequency characteristics of the transistors 5 and 6 determine the upper limit of the frequency band in the output voltage, as in the first embodiment.

Here, the control voltage V applied to the terminal T3
_Since the junction capacitance of the diode 64 changes depending on ₃ ,
The band of the high pass filter 60 changes. Therefore, like the limiter amplifier circuit of the first embodiment, the phase deviation changes. As described above, in this embodiment, since the high-pass filter 60 whose band changes according to the control voltage V ₃ is provided, even if the clock signal or the like is amplified, the timing shift occurs, as in the first embodiment. The problem of can be solved. Further, the high-pass filter 60 is provided with a capacitive circuit having a diode 64 whose junction capacitance changes between the emitters of the transistors 5 and 6. Therefore, the first
The number of capacitors and diodes can be reduced as compared with the above embodiment, and the integration degree of the IC can be improved. The present invention is not limited to the above embodiment, and various modifications can be made. The following are examples of such modifications.

(1) In the first and second embodiments shown in FIGS. 1 and 6, the transistors 1 to 6 and the transistor 30 are all bipolar transistors. Effect transistor (F
ET). (2) In the first and second embodiments, the transistors 1 and 2 serving as the input buffers are provided in front of the transistors 5 and 6 forming the differential pair. However, depending on the signal to be amplified, the input signal may be directly input. It is also possible to input to the bases of the transistors 5 and 6. (3) Capacitors 42, 52, 6 in FIGS. 1 and 7
It suffices that 3 has a capacitance, and it is also possible to use, for example, a junction capacitance of a diode, a gate capacitance of an FET, a PN junction capacitance of a bipolar transistor or the like. In any case, it can be formed as a semiconductor device, and a small limiter amplifier can be obtained. (4) Diodes 43, 53, 64 used as variable capacitance elements in the high pass filters 40, 50, 60
Can be changed to the gate capacitance of the FET or the PN junction capacitance of the bipolar transistor. Also in this case,
It can be formed as a semiconductor device and can be a small limiter amplifier.

[0015]

As described in detail above, according to the first aspect of the invention, the capacitance value is controlled by the control voltage in the first and second high-pass filters that set the limit on the low frequency side in the band of the limiter amplifier. Since the capacitive element that changes is provided, it is possible to change the band and the phase deviation of the first and second high-pass filters and the band and the phase deviation of the limiter amplifier by the control voltage thereof. Therefore, even if the limiter amplifier is used for amplifying the clock waveform, the problem that the clock timing is deviated is solved. According to the second invention, third and fourth resistors are provided between each second electrode of the first and second transistors and the current source, and between the second electrodes of the first and second transistors. And a capacitive circuit that bypasses the high-pass filter, and the capacitive circuit has a capacitive element whose capacitance value changes based on the control voltage. Therefore, as in the first invention, Even if amplification such as is performed, the problem of timing deviation can be solved. Further, the number of circuit constituent elements can be reduced, and the degree of integration of ICs and the like can be improved. According to the third invention, since the capacitive element in the first and second inventions is a PN junction capacitance of a diode, a gate capacitance of a field effect transistor, or a PN junction capacitance of a bipolar transistor, it should be formed as a semiconductor device. Therefore, the size of the limiter amplifier can be reduced.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a limiter amplifier showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional limiter amplifier.

3 is a diagram showing frequency characteristics of the limiter amplifier of FIG.

4 is a characteristic diagram showing a phase deviation with respect to input power and a gain of output power in the limiter amplifier of FIG.

FIG. 5 is a diagram showing frequency characteristics of the gain of FIG.

FIG. 6 is a diagram showing the input power characteristic of the phase of FIG.

FIG. 7 is a circuit diagram of a limiter amplifier showing a second embodiment of the present invention.

[Explanation of symbols]

 5,6 1st and 2nd transistor 7,8 Load resistance 30 Transistor (DC current source) 40,50,60 High pass filter 41,51,61,62 Resistor 42,52,63 Capacitor 43,53,64 Diode T1 , T2, T3 control terminals

Claims (3)

[Claims] 1. A first electrode and a second electrode having a control electrode and a first electrode and a second electrode whose conduction state changes in accordance with an input potential applied to the control electrode, and forming a differential pair. Transistors, first and second resistors connected to the first electrodes of the first and second transistors, respectively, and serving as loads for the first and second transistors, and the first and second transistors A direct current source, a third resistor connected between the second electrode of the first transistor and the current source, and a first capacitive circuit in parallel with the third resistor; A first high-pass filter that attenuates low-frequency components below a certain frequency of the current flowing in the transistor and passes high-frequency components, a fourth resistor connected to the second transistor, and the fourth resistor. A second capacitive circuit in parallel, A second high-pass filter that attenuates low-frequency components below a certain frequency of the current flowing through the transistor to pass high-frequency components, and a limit on the low-frequency side is set by the first and second high-pass filters. A limiter amplifier for amplifying a voltage between the input potentials applied to the respective first and second transistor control electrodes with a given bandwidth, wherein each of the first and second capacitive circuits is provided from a control terminal. A limiter amplifier, wherein each of the capacitors is provided with a capacitance element whose capacitance value changes based on the control voltage. 2. A limiter amplifier for amplifying a voltage between input potentials with a set bandwidth, wherein the first and second transistors, the first and second resistors, and a direct current source according to claim 1, A third electrode provided between the second electrodes of the first and second transistors and the current source, respectively, for attenuating low-frequency components below a certain frequency of the current flowing through the first and second transistors; A fourth resistor and the first and second resistors
A high-pass filter that sets a limit on the low-frequency side in the bandwidth, and a capacitive circuit that is connected between the second electrodes of the transistor and that bypasses high-frequency components higher than a certain frequency. The limiter amplifier is characterized in that the capacitive circuit is provided with a capacitive element whose capacitance value changes based on a control voltage given from a control terminal. 3. The limiter amplifier according to claim 1, wherein the capacitance element is a PN junction capacitance of a diode, a gate capacitance of a field effect transistor, or a PN junction capacitance of a bipolar transistor.